45th week of 2008 patent applcation highlights part 34 |
Patent application number | Title | Published |
20080274524 | METHOD FOR THE PRODUCTION OF 1-BUTANOL - A method for the production of 1-butanol by fermentation using a microbial production host is disclosed. The method employs a reduction in temperature during the fermentation process that results in a more robust tolerance of the production host to the butanol product. | 2008-11-06 |
20080274525 | METHOD FOR THE PRODUCTION OF 2-BUTANOL - A method for the production of 2-butanol by fermentation using a microbial production host is disclosed. The method employs a reduction in temperature during the fermentation process that results in a more robust tolerance of the production host to the butanol product. | 2008-11-06 |
20080274526 | METHOD FOR THE PRODUCTION OF ISOBUTANOL - A method for the production of isobutanol by fermentation using a microbial production host is disclosed. The method employs a reduction in temperature during the fermentation process that results in a more robust tolerance of the production host to the butanol product. | 2008-11-06 |
20080274527 | Hydrolysis of Arabinoxylan - The present invention relates to a process for enzymatic hydrolysis of arabinoxylan, and an enzyme composition suitable for use in such a process. | 2008-11-06 |
20080274528 | BIOFUEL PRODUCTION METHODS AND COMPOSITIONS - The invention provides methods for increasing the level of fermentable carbohydrates in a biofuel crop plant such as alfalfa or switchgrass, by modification of the lignin biosynthetic pathway. Also provided are plants prepared by the methods of the invention. Methods for processing plant tissue and for producing ethanol by utilizing such plants are also provided. | 2008-11-06 |
20080274529 | Photoporation Of Cells - An opening is formed in a cell using laser radiation. A Bessel beam is formed using the laser radiation and the Bessel beam is directed onto the cell to form an opening. The guiding of material towards the opening may be involved using optical trapping/manipulation. The material may change cellular function or analyse cell behaviour. Both pulsed laser radiation and continuous wave radiation may be formed using the same laser. | 2008-11-06 |
20080274530 | PEPTIDE-FORMING ENZYME GENE - DNA and recombinant DNA that encode a peptide-forming enzyme, a method for producing a peptide-forming enzyme, and a method for producing a dipeptide are disclosed. A method for producing a dipeptide includes producing a dipeptide from a carboxy component and an amine component by using a culture of a microbe belonging to the genus | 2008-11-06 |
20080274531 | Exo-Specific Amylase Polypeptides, Nucleic Acids Encoding Those Polypeptides And Uses Thereof - This invention relates to amylase polypeptides, and nucleic acids encoding the polypeptides and uses thereof. The amylases of the present invention have been engineered to have more beneficial qualities. Specifically the amylases of the current invention show an altered exospecifity. | 2008-11-06 |
20080274532 | Blood Coagulation Accelerator and Container for Blood Examination - The present invention provides a blood coagulation accelerator excellent under severe conditions at ordinary or higher temperatures and capable of exhibiting high blood coagulation performance stably over a long period of time, as well as a container for blood examination wherein the blood coagulation accelerator is accommodated. Disclosed is a blood coagulation accelerator comprising an enzyme capable of hydrolyzing in a peptide chain a bond between arginine and an arbitrary amino acid residue and/or a bond between lysine and an arbitrary amino acid residue, an inactivated enzyme product comprising the above-mentioned enzyme inactivated by radiation irradiation, and β-alanine. | 2008-11-06 |
20080274533 | T4 BACTERIOPHAGE BOUND TO A SUBSTRATE - T4 bacteriophages are bound to substrates such as liposomes using a binder. | 2008-11-06 |
20080274534 | Virus Filtration of Liquid Factor VII Compositions - The present invention relates to a novel method for improving the viral safety of liquid Factor VII compositions, in particular those comprising active Factor VII polypeptides (a Factor VIIa polypeptide). | 2008-11-06 |
20080274535 | Hepatocyte Bioreactor System For Long Term Culture of Functional Hepatocyte Spheroids - A rotating wall vessel is used as a culture vessel and bioreactor for the cultivation of hepatocytes in the form of spheroids to generate a culture with many properties of the intact liver. These properties include enzyme activity comparable to fresh cells and long-term maintenance of viability and cellular function for periods on the order of months. The cultures may be used to produce hepatocyte products, evaluate-metabolism of an agent, propagate Hepatitis C virus and test agents as inhibitors of this virus. Thus, the culture system disclosed herein makes long term functional cultivation of human hepatocytes feasible. | 2008-11-06 |
20080274536 | Culture Double Container and a Method of Culture - A culture container and a method of culture which do not require a plurality of incubators in a case where a plurality of cells of different kinds which like different gas concentrations should be cultured simultaneously. | 2008-11-06 |
20080274537 | Tool Head for an Apparatus for the Automatic Isolation and Treatment of Cell Clones - The invention relates to a tool head for a device that is used to automatically isolate and treat cell clones by means of a cloning dome, which isolates the respective cell clone from the environment, said cloning dome being held in a detachable manner by the tip of a pipette and the latter being fixed by a non-positive fit to a conical receiving element of the tool head. To hold the cloning dome on the tip of the pipette, the latter comprises a conical section, over which a complementary conical section of the cloning dome is folded and the tool head is fixed to an arm of a robot system. According to the invention, the end of the arm that is located on the tool head side is equipped with a receiving block ( | 2008-11-06 |
20080274538 | Acoustic Radiation for Ejecting and Monitoring Pathogenic Fluids - The invention relates to methods and devices that use focused radiation to handle and/or monitor pathogenic fluids. In particular, a method is provided for dispensing one or more droplets of a fluid containing a pathogen. The method involves providing the pathogen-containing fluid in a reservoir and applying focused radiation to the pathogen-containing fluid in the reservoir in a manner effective to eject a droplet of the fluid therefrom. Often, a pathogen-impermeable enclosure is used. | 2008-11-06 |
20080274539 | Bioreactor for Studying the Effects of Imposed Stimuli on Cellular Activity - A bioreactor device for studying the effects of physical, chemical, mechanical and electromagnetic stimuli on the cellular activity. In particular, the device uses a sensorized premixing chamber ( | 2008-11-06 |
20080274540 | BLOOD TESTING BOTTOMED TUBE, STOPPER FOR BLOOD TESTING BOTTOMED TUBE AND BLOOD TESTING CONTAINER - The present invention relates to a blood testing bottomed tube, which comprises a tubular member having an open one end and closed another end, and a coating layer formed on at least a part to be contacted with blood on said tubular member, said coating layer being made of a polyoxyalkylene alkyl ether or a polyoxyalkylene glycol ether, the present invention also relates to a stopper for a blood testing bottom tube and a blood testing container. | 2008-11-06 |
20080274541 | Disposable bioreactor system - A cylindrical or annular polymeric bioreactor is disclosed which provides enhanced mixing and aeration of the growth medium while simultaneously offering reduced mechanical shear force. | 2008-11-06 |
20080274542 | Polypeptide - Canine and feline 5T4 polypeptide sequences and nucleotide sequences encoding them are provided. A vector system comprising a nucleic acid encoding 5T4 and a 5T4-specific agent are also provided. | 2008-11-06 |
20080274543 | Neuronal Cell Propagation Using Rotating Wall Vessel - The present invention provides methods of propagating transformed neurons in a simulated microgravity environment generated by a rotating wall vessel (“3-D culture”) so that the phenotype of the transformed neurons so cultured becomes closer to that of non-transformed neurons (primary neurons) and less like the phenotype of transformed neurons cultured via standard cell culture techniques (“2-D culture”). | 2008-11-06 |
20080274544 | Promotor for Introducing Extracellular Substance into Mammalian Ovum and Introduction Method - The present invention provides a method, upon introducing an extracellular substance, such as sperm, a cell nucleus, a nucleic acid, and a protein, into a mammalian oocyte, for introducing the extracellular substance into a mammalian oocyte, which is safe for the mammalian oocyte, enables efficient introduction, and is technically easy. By treating the mammalian oocyte with a tubulin-polymerization inhibitor such as vinblastine, membrane fusion between the oocyte and the sperm is promoted, and the sperm and the oocyte are fused without making a hole in the oolemma and fertilization can be achieved. The method of the present invention can be applied not only to the case of introducing sperm into a mammalian oocyte, but also to the case of introducing an extracellular substance, such as a cell nucleus, a nucleic acid, and a protein, into a mammalian oocyte. | 2008-11-06 |
20080274545 | Bioreactor Chamber Apparatus, and Method and System for Fabricating and Mechanically Stimulating Natural and Engineered Tissues - A bioreactor chamber assembly including a bioreactor chamber and an outer chamber assembly is provided. In one design, the bioreactor chamber includes an upper grip assembly having a plurality of struts extending downward terminating in upper grips, each strut terminating in an upper grip, and a lower grip assembly containing one or more sample compartments and a lower grip. A sample can be formed in situ via injection into a sleeve contained within the sample compartment, where the sleeve encloses the upper and lower grips and enables a construct to form attached to these grips. In a second design, a split mold is received in the bioreactor chamber, the split mold having a cavity for receiving the upper and lower grips. Tissue explants and engineered constructs can be held within these grips. Medium level in the sample compartment is controlled, and different lengths of samples can be accommodated in the sample compartment. The height of the upper grip is adjustable by raising or lowering an extension rod that passes through a dynamic seal to the environment outside the chamber. The bioreactor chamber sample compartment includes a window to permit visualization of the sample as well as light-mediated transformation of biomaterials within the sample compartment. The samples held by grips within these chambers can be subject to uniaxial mechanical stimulation. Medium is perfused around the samples, and medium may be sampled via access ports. | 2008-11-06 |
20080274546 | ARTIFICIAL PHYSIOLOGICAL SALT SOLUTION AND MANUFACTURING METHOD FOR SAME - An artificial physiological salt solution, wherein the active hydrogen reaction value is 0.01 to 1, the pH is 4.0 to 7.9 and the osmotic pressure is 260 mOsm/L to 2560 mOsm/L, as well as a manufacturing method for the same are provided as a novel artificial physiological salt solution, which has active oxygen eliminating activity and anti-inflammation effects, and can be appropriately used in a multitude of applications such as organ cleaning solutions (cleaning solutions for the eyes, cleaning solutions for the nose and the like), artificial infusions, artificial amniotic fluid, protective solutions, cell/tissue cultures and the like, as well as a manufacturing method for the same. | 2008-11-06 |
20080274547 | USE OF NITRIC OXIDE MODULATORS IN AGROBACTERIUM-MEDIATED PLANT TRANSFORMATION - Use of nitric oxide modulators during the transformation process can enhance | 2008-11-06 |
20080274548 | DOPOMINERGIC NEURONS DIFFERENTIATED FROM EMBRYONIC CELLS FOR TREATING NEURODEGENERATIVE DISEASES - Disclosed herein are methods for generating dopaminergic neurons in vitro by inhibiting a pathway component of a TGF-β signaling pathway and overexpressing one or more cell fate-inducing polypeptides in pluripotent cells, causing differentiation of the pluripotent cells into dopaminergic neurons. Also disclosed are methods for treating a neurodegenerative disease in a patient by generating dopaminergic neurons in vitro, and transplanting them into the brain of the patient, such that the dopaminergic neurons are sufficient to reduce or eliminate the symptoms of the neurodegenerative disease. | 2008-11-06 |
20080274549 | System and Method For Electroporating a Sample - A system and method are described for electroporating a sample that utilizes one or more sets of electrodes that are spaced apart in order to hold a surface tension constrained sample between the electrodes. The first electrode is connected to the lower body of the system while the second electrode is connected to the upper body. Both electrodes are connected to a pulse generator. Each electrode has a sample contact surface such that the first electrode and the second electrode may be positioned to hold a surface tension constrained sample between the two sample contact surfaces and the sample may receive a selected electric pulse. | 2008-11-06 |
20080274550 | Use Of Replicators To Prevent Gene Silencing - Regulatory elements, specifically replicators and transgene constructs containing replicator nucleic acid sequences, are disclosed herein. Methods of using replicators and transgene constructs including replicators to inhibit, delay, or prevent gene silencing are also disclosed herein. | 2008-11-06 |
20080274551 | Reagent, system and method for nitrate analysis - A reagent and colorimetric autoanalyzer are provided for determining nitrate concentration using an EPA approved method. Methods of determining nitrate concentration using a reagent and a calorimetric autoanalyzer are also provided. The device and use thereof allows for the automated and accurate determination of nitrate in a sample, resulting in a non-hazardous method that is not labor intensive to determine the amount of nitrate in the sample. | 2008-11-06 |
20080274552 | Dynamic Information Transfer - Disclosed are various preferred embodiments for dynamic transfer of information from a test sensor to an analyte medical test device. Exemplary embodiments include various containers, systems and methods. | 2008-11-06 |
20080274553 | METHOD TO DETECT AND CHARACTERIZE CONTAMINANTS IN PIPES AND DUCTS WITH INTERACTIVE TRACERS - A method and an apparatus for detecting, locating, and quantifying contamination in a fluid flow system like a pipe or duct. This characterization technique uses a conservative and one or more interactive tracers that are injected into the fluid flow system and then monitored at another location in the system. Detection, location, and quantification are accomplished by analysis of the characteristic features of measured curves of tracer concentration. | 2008-11-06 |
20080274554 | OXIMETER FOR SPECTRO-PHOTOMETRIC IN-VITRO DETERMINATION OF HEMOGLOBIN DERIVATIVES - An oximeter for spectro-photometric in-vitro determination of hemoglobin derivatives in a sample, typically a hemolyzed blood sample, is provided comprising a single measurement light source emitting measurement radiation, a sample chamber, for instance a measurement cuvette containing the sample, a detector device, which records a spectrum of the measurement radiation after its interaction with the sample, and an evaluation unit following the detector device, which determines the hemoglobin derivatives and at least one further analyte from the spectrum recorded by the detector device. The measurement light source is a polychromatic LED, which for determination of hemoglobin derivatives emits measurement radiation in at least one spectral region B, in which the hemoglobin derivatives exhibit significant absorbance, and which for determination of the at least one further analyte emits measurement radiation in at least one other spectral region A, in which the at least one further analyte exhibits significant absorbance. | 2008-11-06 |
20080274555 | Separation and Manipulation of a Chiral Object - Among other things, for use in directional motion of chiral objects in a mixture, a field is applied across the chamber and is rotating relative to the chamber to cause rotation of the chiral objects. The rotation of the objects causes them to move directionally based on their chirality. The method applies to sugars, proteins, and peptides, among other things, and can be used in a wide variety of applications. | 2008-11-06 |
20080274556 | DETECTING ISOMERS USING DIFFERENTIAL DERIVATIZATION MASS SPECTROMETRY - Methods of evaluating molecular isomers of branched-chain amino acids are featured. The methods can include: derivatizing one or more molecular isomers of branched-chain amino acids in a sample comprising a branched-chain amino acid labeled with one or more heavy atoms as a first standard; adding, to the sample, after derivatization, a nonderivatized or derivatized branched chain amino acid that is labeled with one or more heavy atoms, as a second standard; evaluating the sample using tandem mass spectrometry; and detecting peaks indicative of derivatized and nonderivatized forms of one or more branched-chain amino acids in the sample. | 2008-11-06 |
20080274557 | Permethylation Of Oligosaccharides - A solid-phase permethylation procedure is described. For example, solid-phase permethylation can be utilized to prepare permethylated linear and branched, neutral and sialylated oligosaccharides, which can be analyzed by MALDI-MS. | 2008-11-06 |
20080274558 | METHOD FOR IDENTIFYING AND SELECTING LOW COPY NUCLEIC SEGMENTS - The present invention relates to a method of identifying low copy nucleic acid segments from within a known nucleic acid sequence and selecting among the identified low copy segments for segments that are thermodynamically suitable for use in hybridization experiments. | 2008-11-06 |
20080274559 | Gas Sensor for Determining Ammonia - The invention relates to a gas sensor which is used to detect ammonia by detecting and evaluating conductivity variations on semi-conductive metal oxides, comprising: a substrate, a gas sensitive layer made of a semi-conductive metal oxide, a catalytic filter which is disposed in front of the metal oxide, said filter being used to convert ammonia, contained in the measuring gas, into a NO/NO2 mixture or to only NO2, measuring electrodes which are arranged on the surface of the substrate in order to detect conductivity variations in the semi-conductive metal oxide which is at least sensitive to NO/NO2, a controllable electric heating device which is used to adjust predetermined temperatures at least for the semi-conductive metal oxide, whereby the formed NO/NO2 can be guided to the metal oxide and the content of ammonia in the measuring gas can be determined from the NO/NO2-measurement by means of the semi-conductive metal oxide. | 2008-11-06 |
20080274560 | REAGENTS FOR DETECTION OF HYPOCHLOROUS ACID - Provided herein are compounds or hypochlorous acid probes which can be used as reagents for measuring, detecting and/or screening, directly or indirectly, hypochlorous acid or hypochlorite. Provided also herein are methods that can be used to measure, directly or indirectly, the amount of hypochlorous acid or hypochlorite in chemical samples and biological samples such as cells and tissues in living organisms. Specifically, the methods include the steps of contacting the hypochlorous acid probes disclosed herein with the samples to form one or more fluorescent compounds, and measuring fluorescence properties of the fluorescent compounds. Provided also herein are high-throughput screening fluorescent methods for detecting or screening hypochlorous acid or compounds that can increase or decrease, directly or indirectly, the level of hypochlorous acid or hypochlorite in chemical and biological samples. | 2008-11-06 |
20080274561 | METHOD AND APPARATUS FOR DETERMINING A TOTAL CONCENTRATION OF A COMPONENT IN A MIXTURE OF COMPONENTS - The invention relates to a method and apparatus for determining a total concentration of a component in a sample, including a reactor for oxidizing or reducing the sample, a chromatographic column coupled to the reactor for separating the component in the sample, and an electrochemical gas sensor coupled to the chromatographic column for detecting the component. In further embodiments, a filter may be used instead of or in addition to the column. Moreover, multiple sensors may be used instead of or in addition to the column for simultaneously detecting multiple components. | 2008-11-06 |
20080274562 | Method of freezing with brine - Improved brine solutions and uses thereof for uncontaminatedly and/or efficiently freezing items such as foods, and biological samples. In accordance with one embodiment, a brine solution containing a sufficient amount of dye in conferring the solution a distinctive color is used in the freezing process. In accordance with another embodiment, a brine solution containing deionized water is used for improving the freezing efficiency and/or freezing capacity. | 2008-11-06 |
20080274563 | DETECTING SUCCINYLACETONE - This invention relates, inter alia, to detecting and/or measuring succinylacetone and one or more additional biological analytes using mass spectrometry. | 2008-11-06 |
20080274565 | Method for the quantitative measurement of analytes in a liquid sample by immunochromatography - The invention concerns a method for the quantitative measurement of at least one analyte of interest in a liquid sample by immunochromatography, said method comprising weighted measurement of the quantity of analyte with respect to a control. | 2008-11-06 |
20080274566 | Method and assay for detection of residues - Embodiments described herein include methods and assays for detecting an analyte in a sample using a plurality of control zone capture agents. Some embodiments include detection of multiple analytes in a sample utilizing a plurality of analyte binders and a control zone containing multiple control zone capture agents. In some embodiments, the multiple control zone capture agents capture a plurality of binders within one control zone. Test results are determined by comparison of the control zone signal to a test zone signal. | 2008-11-06 |
20080274567 | METHOD OF FORMING INTEGRATED CIRCUIT HAVING A MAGNETIC TUNNEL JUNCTION DEVICE - A method for manufacturing an integrated circuit having a magnetic tunnel junction device is disclosed. The method includes depositing a bottom pinning structure above the bottom conductive structure. A first ferromagnetic structure is deposited above the bottom pinning structure in a chamber. A tunnel barrier structure is deposited above the first ferromagnetic layer structure in the chamber, and a second ferromagnetic structure is deposited above the tunnel barrier structure of the magnetic tunnel junction device in another chamber. | 2008-11-06 |
20080274568 | Reticle and method of fabricating semiconductor device - Dicing lines extending longitudinally and transversely, and chip areas surrounded by the dicing lines are formed in a resist mask. Critical-dimension patterns are formed in the dicing lines so as to be paired while placing the center line thereof in between. The dimensional measurement of the resist film having these patterns formed therein is made under a CD-SEM, by specifying a measurement-target chip area out of a plurality of chip areas, and by specifying a position of a critical-dimension pattern on the left thereof. Then, the distance of two linear portions configuring the critical-dimension pattern is measured, wherein a portion at a point of measurement on the measurement-target chip area side as viewed from the center line of the dicing line is measured. | 2008-11-06 |
20080274569 | Method for forming semiconductor ball grid array package - A method for forming a semiconductor package provides a ball grid array, BGA, formed on a package substrate. The apices of the solder balls of the BGA are all at the same height, even if the package substrate is non-planar. Different solder ball pad sizes are used and tailored to compensate for non-planarity of the package substrate that may result from thermal warpage. Larger size solder ball pads are formed at relatively-high locations on the package substrate. An equal amount of solder is formed on each of the solder ball pads to produce solder balls having different heights and coplanar apices. | 2008-11-06 |
20080274570 | Inkjet head, method for producing inkjet head, inkjet recorder and inkjet coater - A method for producing an inkjet head for jetting an ink from a nozzle that is formed on a nozzle main body formed of a metal material, the method includes smoothening a surface of the nozzle main body, applying a silica sol solution to the nozzle main body so as to form a silica sol film, wherein the silica sol solution has a concentration that is controlled to avoid a nozzle clogging in the nozzle main body, heating the silica sol film formed on the nozzle main body to thereby convert the silica sol film into an SiO | 2008-11-06 |
20080274571 | Semiconductor device, LED print head and image-forming apparatus using same, and method of manufacturing semiconductor device - In a method of manufacturing a semiconductor thin film piece device, a plurality of semiconductor thin film pieces ( | 2008-11-06 |
20080274572 | METHOD OF MAKING HIGH EFFICIENCY UV VLED ON METAL SUBSTRATE - A method of fabricating ultraviolet (UV) vertical light-emitting diode (VLED) structures composed of AlInGaN or AlGaN with increased crystalline quality and a faster growth rate when compared to conventional AlInGaN or AlGaN LED structures is provided. This may be accomplished by forming a sacrificial GaN layer above a carrier substrate, and then depositing the light-emitting diode (LED) stack above the sacrificial GaN layer. The sacrificial GaN layer may then be removed in subsequent processing steps. | 2008-11-06 |
20080274573 | Method of fabricating linear cascade high-speed green light emitting diode - Green light emitting diodes (LED) of gallium arsenide (GaAs) are series-connected. The series connection has a small transmission attenuation and a wide bandwidth. The GaAs LED has a big forward bias and so neither extra driving current nor complex resonant-cavity epitaxy layer is needed. Hence, the present invention has a high velocity, a high efficiency and a high power while an uneven current distribution is avoided. | 2008-11-06 |
20080274574 | LASER LIFTOFF STRUCTURE AND RELATED METHODS - Light-emitting devices, and related components, systems, and methods associated therewith are provided. | 2008-11-06 |
20080274575 | Vertical semiconductor light-emitting device and method of manufacturing the same - Provided is a vertical semiconductor light-emitting device and a method of manufacturing the same. The method may include sequentially forming a lower clad layer, an active layer, and an upper clad layer on a substrate to form a semiconductor layer and forming first electrode layers on the upper clad layer. A metal support layer may be formed on each of the first electrode layers and a trench may be formed between the first electrode layers. The substrate may be removed and a second electrode layer may be formed on the lower clad layer. | 2008-11-06 |
20080274576 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A method for improving productivity when manufacturing a semiconductor device. A lower electrode, insulating films, an upper electrode and insulating films are formed on a semiconductor substrate in a sensor region. A cavity is formed between the insulator films above the lower electrode. The lower electrode, insulating film, the cavity and insulating film, and an upper electrode form a variable capacity sensor. The cavity is formed by etching a sacrificial pattern between the insulation films by way of a hole formed in a pair of insulation films. Other than in the above sensor region, a dummy lower electrode and four insulating films are formed on the TEG region on the semiconductor substrate; and a dummy cavity is formed between a pair of insulation films above the lower electrode however no conductive layer on the same layer as the upper electrode is formed on the dummy cavity. | 2008-11-06 |
20080274577 | Method of the Application of a Zinc Sulfide Buffer Layer on a Semiconductor Substrate - A chemical bath deposition method of depositing on a semiconductor substrate a layer of zinc sulfide by dipping the semiconductor substrate into an aqueous solution of zinc sulfate and thiourea and ammonia. | 2008-11-06 |
20080274578 | METHOD OF FORMING A PIXEL SENSOR CELL FOR COLLECTING ELECTRONS AND HOLES - The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input. | 2008-11-06 |
20080274579 | Wafer level image sensor package with die receiving cavity and method of making the same - The present invention provides a structure of package comprising a substrate with a die receiving cavity formed within an upper layer of the substrate, wherein terminal pads are formed on the upper surface of the substrate, the same plain as the micro lens. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. A re-distribution metal layer (RDL) is formed on the dielectric layer and coupled to the die. An opening is formed within the dielectric layer and a top protection layer to expose the micro lens area of the die for Image Sensor chip. A protection layer (film) be coated on the micro lens area with water repellent and oil repellent to away the particle contamination. A transparent cover with coated IR filter is optionally formed over the micron lens area for protection. | 2008-11-06 |
20080274580 | METHOD FOR MANUFACTURING IMAGE SENSOR - A method for manufacturing an image sensor including forming a metal line layer on a semiconductor substrate, and then forming color filters on the metal line layer, and then forming seed microlenses spaced apart on the color filters, and then cleaning the surface of the seed microlenses, and then forming a gapless microlenses on the color filters by depositing an inorganic layer on the seed microlenses and in spaces therebetween. A gapless microlens can prevent crosstalk and noise and enhance the image quality of the image sensor. Forming the microlens of thin inorganic layer can prevent cracking due to physical impacts. The adhesive force can be enhanced between the first and second organic films of the microlens by performing cleaning processes, which in turn, enhances the refractive index and light transmittance for incident light. | 2008-11-06 |
20080274581 | METHOD FOR MANUFACTURING IMAGE SENSOR - A method for manufacturing an image sensor that includes reducing the surface energy of the microlenses to prevent particles generated during a wafer sawing process from damaging the microlens or adhering to the microlens to cause a defective image. | 2008-11-06 |
20080274582 | Method of Making Silicon Solar Cells Containing μC Silicon Layers - The invention relates to a method for producing solar cells comprising at least one p-i-n layer sequence containing micro-crystalline layers with the aid of a PECVD method. Said method is characterised in that all layers of the p-i-n layer sequence are deposited in a single-chamber process. The electrodes are interspaced at a distance of between 5 and 15 mm and the gas is distributed by means of a shower-head gas inlet, which guarantees a homogeneous distribution of the gas over the substrate. SiH | 2008-11-06 |
20080274583 | THROUGH-WAFER VIAS - A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other. | 2008-11-06 |
20080274584 | Method of microwave annealing for enhancing organic electronic devices - A method of microwave annealing for enhancing the properties of organic electronic devices is provided, including the steps of providing organic electronic devices and then microwave annealing the organic electronic devices. Because microwave annealing is non-contact and requires only a short time for annealing, and also because it anneals a target selectively and may anneal only the organic active layer of organic electronic device, microwave annealing allows organic molecules in the organic active layer to be rearranged quickly, so as to improve the arrangement of the organic molecules, and this in turn elevates the quantum efficiency thereof and enhances the properties of the organic electronic devices. | 2008-11-06 |
20080274585 | SPACER ELECTRODE SMALL PIN PHASE CHANGE MEMORY RAM AND MANUFACTURING METHOD - A memory device comprising a first pan-shaped electrode having a side wall with a top side, a second pan-shaped electrode having a side wall with a top side and an insulating wall between the first side wall and the second side wall. The insulating wall has a thickness between the first and second side walls near the respective top sides. A bridge of memory material crosses the insulating wall, and defines an inter-electrode path between the first and second electrodes across the insulating wall. An array of such memory cells is provided. The bridges of memory material have sub-lithographic dimensions. | 2008-11-06 |
20080274586 | SEMICONDUCTOR DEVICE, WAFER AND METHOD OF DESIGNING AND MANUFACTURING THE SAME - A process margin of an interconnect is to be expanded, to minimize the impact of vibration generated during a scanning motion of a scanning type exposure equipment. In a semiconductor device, the interconnect handling a greater amount of data (frequently used interconnect) is disposed in a same orientation such that the longitudinal direction of the interconnects is aligned with a scanning direction of a scanning type exposure equipment, in an interconnect layer that includes a narrowest interconnect or a narrowest spacing between the interconnects. Aligning thus the direction of the vibration with the longitudinal direction of the pattern can minimize the positional deviation due to the vibration. | 2008-11-06 |
20080274587 | Method of Assembling Electronic Components of an Electronic System, and System Thus Obtained - An electronic system comprising: an electronic system support substrate for the attachment of components of the electronic system, the electronic system support substrate including electric signal propagation paths for the propagation of electric signals between the system components; at least a first and a second electronic components, wherein at least the first electronic component is part of a module in mechanical and electrical connection with the electronic system support substrate, the module comprising a module substrate to which the first electronic component is at least mechanically connected, and an electric coupling between the first and the second electronic components, for the electric coupling allowing the first and the second electronic components exchange of electric signals. The electric coupling comprises a direct electric connection, particularly formed by a flexible electrical interconnection member, between the first and the second electronic components, the electric connection being independent of the electronic system support substrate. | 2008-11-06 |
20080274588 | Semiconductor device and method of fabricating the same, circuit board, and electronic instrument - A method of fabricating a semiconductor device, including: preparing a wiring board on which is mounted a first semiconductor chip having a plurality of first pads; electrically connecting each of the first pads to an interconnecting pattern of the first semiconductor chip by a wire; providing resin paste on the first semiconductor chip; mounting a second semiconductor chip having a plurality of second pads on the first semiconductor chip with the resin paste interposed therebetween; and forming a spacer by hardening the resin paste to fix the first and second semiconductor chips together, wherein the spacer is formed to extend under the second pads and further outward; and wherein the highest portion of the wire is disposed on the outer side of the first semiconductor chip. | 2008-11-06 |
20080274589 | Wafer-level flip-chip assembly methods - A method of packaging integrated circuit structures is provided. The method includes providing a wafer having bonding conductors on a surface of the wafer, and applying a compound underfill onto the surface of the wafer. The compound underfill includes an underfill material and a flux material. A die is then bonded on the wafer after the step of applying the compound underfill, wherein solder bumps on the die are joined with the bonding conductors. | 2008-11-06 |
20080274590 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A manufacturing method of the semiconductor device including a step of forming solder balls on the circuit face of a mother chip, a step of making flip chip bonding of the daughter chip after the step of forming solder balls on the circuit face of the mother chip, and a step of making flip chip bonding of the mother chip on a circuit board using the solder balls. | 2008-11-06 |
20080274591 | CARRIER FOR STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING STACKED TYPE SEMICONDUCTOR DEVICES - A carrier for a stacked-type semiconductor device includes an accommodating section for accommodating stacked semiconductor devices, guide portions guiding the stacked semiconductor devices, and grooves through which a fluid may flow to the accommodating section and to sides of the stacked semiconductor devices. These grooves facilitate the flow of gas or liquid on the sides of the accommodating sections, and it is thus expected that the flow of hot wind during the reflow process and cleaning liquid during the cleaning process can be facilitated. This improves the production yield and the cleaning effects. Holes for connecting the accommodating section to the outside may be provided at corners of the accommodating section. Gas may be guided from the lower side of the accommodating section, so that heat can be efficiently applied to the semiconductor devices and bonding failures therebetween can be reduced. Further, grooves connecting adjacent holes may be provided for accommodating sections adjacent to each other. | 2008-11-06 |
20080274592 | Process and apparatus for wafer-level flip-chip assembly - A method of forming an integrated circuit structure is provided. The method includes providing an interposer wafer; mounting the interposer wafer onto a handling wafer; thinning a backside of the interposer wafer; removing the handling wafer from the interposer wafer after the step of thinning; securing the interposer wafer on a fixture; and bonding a die on the interposer wafer. | 2008-11-06 |
20080274593 | Semiconductor device package with multi-chips and method of the same - The present invention provides a semiconductor device package with the multi-chips comprising a substrate with at least a die receiving through hole, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. At least a first die having first bonding pads is disposed within the die receiving through hole. A first adhesion material is formed under the die and a second adhesion material is filled in the gap between the die and sidewall of the die receiving though hole of the substrate. Then, a first bonding wire is formed to couple the first bonding pads and the first contact pads. Further, at least a second die having second bonding pads is placed on the first die. A second bonding wire is formed to couple to the second bonding pads and the first contact pads. A dielectric layer is formed on the first and second bonding wire, the first and second die and the substrate. | 2008-11-06 |
20080274594 | Step height reduction between SOI and EPI for DSO and BOS integration - A semiconductor process and apparatus provides a planarized hybrid substrate ( | 2008-11-06 |
20080274595 | Dual substrate orientation or bulk on SOI integrations using oxidation for silicon epitaxy spacer formation - A semiconductor process and apparatus provide a planarized hybrid substrate ( | 2008-11-06 |
20080274596 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A silicon nitride film is formed between interlayer insulating films covering an upper surface of an element formed on a surface of a semiconductor layer. With this structure, a semiconductor device comprising an isolation insulating film of PTI structure, which suppresses a floating-body effect and improves isolation performance and breakdown voltage, and a method of manufacturing the semiconductor device can be obtained. | 2008-11-06 |
20080274597 | METHOD AND STRUCTURE TO REDUCE CONTACT RESISTANCE ON THIN SILICON-ON-INSULATOR DEVICE - A method (and system) of reducing contact resistance on a silicon-on-insulator device, including controlling a silicide depth in a source-drain region of the device. | 2008-11-06 |
20080274598 | Doped WGe to form dual metal gates - A method of fabricating a dual metal gate structures in a semiconductor device, the method comprising forming a gate dielectric layer above a semiconductor body, forming a work function adjusting layer on the dielectric gate layer in the PMOS region, depositing a tungsten germanium gate electrode layer above the work function adjusting material in the PMOS region, depositing a tungsten germanium gate electrode layer above the gate dielectric in the NMOS region annealing the semiconductor device, depositing a metal nitride barrier layer on the tungsten germanium layer, depositing a polysilicon layer over the metal nitride, patterning the polysilicon layer, the metal nitride layer, the tungsten germanium layer, work function adjusting layer and the gate dielectric layer to form a gate structure, and forming a source/drain on opposite sides of the gate structure. | 2008-11-06 |
20080274599 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A TRENCH SURROUNDING PLURAL UNIT CELLS - A semiconductor device comprises a plurality of unit cells, each comprising a vertical metal oxide semiconductor field effect transistor (MOSFET). The unit cell includes a first source region formed in a first base region, a second source region formed in the first base region and separated from the first source region, and a second base region formed in the first base region and disposed between the first and second source regions. The semiconductor device further comprises a trench gate formed in a vicinity of each of the plurality of unit cells. The second base region of an unit cell is separated from the second base region of an adjacent unit cell, and the first or second source region of an unit cell is separated from the first or second source region of an adjacent unit cell. | 2008-11-06 |
20080274600 | Method to improve source/drain parasitics in vertical devices - A method for making a transistor is provided which comprises (a) providing a semiconductor structure having a gate ( | 2008-11-06 |
20080274601 | METHOD OF FORMING A TRANSISTOR HAVING MULTIPLE TYPES OF SCHOTTKY JUNCTIONS - A gate electrode is formed overlying a substrate. A first angled metal implant is performed at a first angle into the substrate followed by performing a second angled metal implant at a second angle. The first angled metal implant and the second angled metal implant form a first current electrode and a second current electrode. Each of the first current electrode and the second current electrode has at least two regions of differing metal composition. A metal layer is deposited overlying the gate electrode, the first current electrode and the second current electrode. The metal layer is annealed to form two Schottky junctions in each of the first current electrode and the second current electrode. The two Schottky junctions have differing barrier levels. | 2008-11-06 |
20080274602 | METHOD OF MANUFACTURING DYNAMIC RANDOM ACCESS MEMORY - A method of manufacturing a DRAM includes firstly providing a substrate. Many transistors are then formed on the substrate. Next, a first and a second LPCs are formed between the transistors. A first dielectric layer is then formed on the substrate, and a first opening exposing the first LPC is formed in the first dielectric layer. Thereafter, a barrier layer is formed on the first dielectric layer. Afterwards, a BLC is formed in the first opening, and a BL is formed on the first dielectric layer. A liner layer is then formed on a sidewall of the BL. Next, a second dielectric layer having a dry etching rate substantially equal to that of the liner layer and having a wet etching rate larger than that of the liner layer is formed on the substrate. Finally, an SNC is formed in the first and the second dielectric layers. | 2008-11-06 |
20080274603 | Semiconductor Package Having Through-Hole Via on Saw Streets Formed with Partial Saw - A method of forming through-hole vias in a semiconductor wafer involves forming a semiconductor wafer with many die having contact pads disposed on each die. The semiconductor wafer has saw street guides between each die. A trench is formed in the saw streets. The trench extends partially but not completely through the wafer. The uncut portion of the saw street guides below the trench along a backside of the wafer maintains structural support for the semiconductor wafer. The trench is filled with organic material. Via holes are formed in the organic material. Traces are formed between the contact pads and via holes. Conductive material is deposited in the via holes to form metal vias. The uncut portion of the saw streets below the trench along the backside of the semiconductor wafer portion is removed. The semiconductor wafer is singulated along the saw street guides to separate the die. | 2008-11-06 |
20080274604 | SUSCEPTOR WITH BACKSIDE AREA OF CONSTANT EMISSIVITY - Methods and apparatus for providing constant emissivity of the backside of susceptors are provided. Provided is a susceptor comprising: a susceptor plate having a surface for supporting a wafer and a backside surface opposite the wafer supporting surface; a layer comprising an oxide, a nitride, an oxynitride, or combinations thereof located on the backside surface of the susceptor plate, the layer being stable in the presence of a reactive process gas. The layer comprises, for example, silicon dioxide, silicon nitride, silicon oxynitride, or combinations thereof. Also provided is a method comprising: providing a susceptor in a deposition chamber, the susceptor comprising a susceptor plate and a layer comprising an oxide, a nitride, an oxynitride, or combinations thereof, the layer being stable in the presence of the reactive process gases; locating the wafer on a support surface of the susceptor plate. The method can further comprises selectively depositing an epitaxial layer or a non-epitaxial layer on a surface of the wafer. The method further comprises selectively etching to maintain the oxide, nitride, oxynitride, or combinations thereof layer. | 2008-11-06 |
20080274605 | METHOD OF MANUFACTURING SILICON NITRIDE FILM, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE - A method of manufacturing a silicon nitride film that forms a silicon nitride film on a surface of a substrate comprises sequentially repeating first through third steps. The first step includes feeding a first gas containing silicon and nitrogen to the surface of the substrate. The second step includes feeding a second gas containing nitrogen to the surface of the substrate. The third step includes feeding a third gas containing hydrogen to the surface of the substrate. | 2008-11-06 |
20080274606 | Method of manufacturing semiconductor device - Each of channel regions | 2008-11-06 |
20080274607 | Semiconductor device and fabrication process thereof - A method of fabricating a semiconductor device includes the steps of modifying a damaged layer containing carbon and formed at a semiconductor surface by exposing the damaged layer to oxygen radicals to form a modified layer, and removing the modified layer by a wet etching process, wherein the modifying step is conducted by adding an active specie of an element that would obstruct formation of double bond between a Si atom and an oxygen atom by causing a chemical bond with Si atoms on the semiconductor surface. | 2008-11-06 |
20080274608 | STRUCTURE AND METHOD FOR ENHANCING RESISTANCE TO FRACTURE OF BONDING PADS - The present invention provides bond pads structures between semiconductor integrated circuits and the chip package with enhanced resistance to fracture and improved reliability. Mismatch in the coefficient of temperature expansion (CTE) among the materials used in bond structures induces stress and shear on them that may result in fractures within the back end dielectric stacks and cause reliability problems of the packaging. By placing multiple metal pads which are connected to the bond pad through multiple metal via, the adhesion between the bond pads and the back end dielectric stacks is enhanced. | 2008-11-06 |
20080274609 | Method and structure for low-K interlayer dielectric layer - An integrated circuit interconnect structure. The structure includes a substrate and a layer of transistor elements overlying the substrate. A first interlayer dielectric layer is formed overlying the layer of transistor elements. An etch stop layer is formed overlying the first interlayer dielectric layer. A contact structure including metallization is within the first interlayer dielectric layer and a metal layer is coupled to the contact structure. A passivation layer is formed overlying the metal layer. Preferably, an air gap layer is coupled between the passivation layer and the metal layer, the air gap layer allowing a portion of the metal layer to be free standing. Depending upon the embodiment, a portion of the air gap layer may be filled with silicon bearing nanoparticles, which may be oxidized at low temperatures. This oxidized layer provides mechanical support and low k dielectric characteristics. Preferably, a portion of the air gap layer is filled with a low k dielectric material as well. | 2008-11-06 |
20080274610 | METHODS OF FORMING A SEMICONDUCTOR DEVICE INCLUDING A DIFFUSION BARRIER FILM - Methods of forming a semiconductor device that includes a diffusion barrier film are provided. The diffusion barrier film includes a metal nitride formed by using a MOCVD process and partially treated with a plasma treatment. Thus, a specific resistance of the diffusion barrier film can be decreased, and the diffusion barrier film may have distinguished barrier characteristics. | 2008-11-06 |
20080274611 | METHOD AND PROCESS FOR FORMING A SELF-ALIGNED SILICIDE CONTACT - The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO | 2008-11-06 |
20080274612 | SHIELDED CAPACITOR STRUCTURE - A method and apparatus if provided for shielding a capacitor structure formed in a semiconductor device. In a capacitor formed in an integrated circuit, one or more shields are disposed around layers of conductive strips to shield the capacitor. The shields confine the electric fields between the limits of the shields. | 2008-11-06 |
20080274613 | Method for the Protection of Openings in a Component During a Machining Process - The invention relates to a method for the protection of openings in a component, produced from an electrically-conducting material, in particular, from metal or a metal alloy, during a machining process against the ingress of material, whereby the openings are sealed with a filler material before the machining process, which is removed again after the machining process. The machining processes particularly concern coating processes and welding processes. Said method is characterized in that an electrically-conducting filler material is applied, the electrical conductivity of which matches the electrical conductivity of the base material. | 2008-11-06 |
20080274614 | FABRICATING METHOD OF METAL LINE - A method of fabricating a metal line using a dual damascene process which enhances reliability of the semiconductor device. The method includes forming a lower metal line in a first inter metal dielectric layer; and then sequentially forming a first anti-etch layer, a second inter metal dielectric layer and a second anti-etch layer over the first inter metal dielectric layer and the lower metal line, wherein the second inter metal dielectric includes a first trench formed therein; and then forming an oxide film on the second anti-etch layer and in the first trench; and then forming a first via hole by performing a first etching process on the oxide film, the second anti-etch layer and the second inter metal dielectric layer; and then forming a second trench and a second via hole by performing a second etching process using the second anti-etch layer as a mask; and then removing a portion of the first anti-etch layer exposed in the second via hole and the second anti-etch layer; and then forming an upper metal line in the second via hole and the second trench. | 2008-11-06 |
20080274615 | Atomic Layer Deposition Methods, Methods of Forming Dielectric Materials, Methods of Forming Capacitors, And Methods of Forming DRAM Unit Cells - Some embodiments include methods of forming metal-containing oxides. The methods may utilize ALD where a substrate surface is exposed to an organometallic composition while the substrate surface is at a temperature of at least 275° C. to form a metal-containing layer. The metal-containing layer may then be exposed to at least one oxidizing agent to convert the metal-containing layer to a metal-containing oxide. The ALD may occur in a reaction chamber, with the oxidizing agent and the organometallic composition being present within such chamber at substantially non-overlapping times relative to one another. The oxidizing agent may be a milder oxidizing agent than ozone. The metal-containing oxide may be utilized as a capacitor dielectric, and may be incorporated into a DRAM unit cell. | 2008-11-06 |
20080274616 | METHOD FOR DEPOSITING TITANIUM NITRIDE FILMS FOR SEMICONDUCTOR MANUFACTURING - Embodiments of the invention describe TiN deposition methods suitable for high volume manufacturing of semiconductor devices on large patterned substrates (wafers). One embodiment describes a chemical vapor deposition (CVD) process using high gas flow rate of a tetrakis(ethylmethylamino) titanium (TEMAT) precursor vapor along with an inert carrier gas at a low process chamber pressure that provides high deposition rate of conformal TiN films with good step coverage in surface reaction limited regime. Other embodiments describe cyclical TiN deposition methods using TEMAT precursor vapor and a nitrogen precursor. | 2008-11-06 |
20080274617 | PERIODIC PLASMA ANNEALING IN AN ALD-TYPE PROCESS - Methods for performing periodic plasma annealing during atomic layer deposition are provided along with structures produced by such methods. The methods include contacting a substrate with a vapor-phase pulse of a metal source chemical and one or more plasma-excited reducing species for a period of time. Periodically, the substrate is contacted with a vapor phase pulse of one or more plasma-excited reducing species for a longer period of time. The steps are repeated until a metal thin film of a desired thickness is formed over the substrate. | 2008-11-06 |
20080274618 | POLISHING COMPOSITION AND METHOD FOR HIGH SELECTIVITY POLYSILICON CMP - The present invention provides a polishing composition and a method for removing polysilicon in preference to silicon dioxide, silicate glasses and/or silicon nitride via chemical-mechanical polishing during semiconductor device fabrication. In a preferred embodiment, the polishing composition includes an aqueous dispersion of ceria abrasive particles, from about 0.005% to about 0.15% by weight of a polyethyleneimine and a sufficient amount of an acid to adjust the pH of the polishing composition within the range of from about 4.7 to about 5.1. The polishing composition can be used to remove polysilicon via CMP at removal rates that are acceptable in semiconductor device fabrication applications while simultaneously suppressing the rate at which silicon dioxide, silicate glasses and silicon nitride are removed. | 2008-11-06 |
20080274619 | CMP compositions containing a soluble peroxometalate complex and methods of use thereof - The present invention provides a chemical-mechanical polishing (CMP) composition for polishing a ruthenium-containing substrate in the presence of hydrogen peroxide without forming a toxic level of ruthenium tetroxide during the polishing process. The composition comprises (a) a catalytic oxidant comprising a water-soluble peroxometalate complex, an oxidizable precursor of a peroxometalate complex, or a combination thereof, (b) a particulate abrasive; and (c) an aqueous carrier. The peroxometalate complex and the precursor thereof each have a reduced form that is oxidizable by hydrogen peroxide to regenerate the peroxometalate complex during chemical-mechanical polishing. CMP methods for polishing ruthenium-containing surfaces with the CMP composition are also provided. | 2008-11-06 |
20080274620 | CHEMICAL MECHANICAL POLISHING AGENT KIT AND CHEMICAL MECHANICAL POLISHING METHOD USING THE SAME - A chemical mechanical polishing method of the present invention comprises conducting polishing by the use of a chemical mechanical polishing aqueous dispersion (A) containing abrasive grains and then conducting polishing by the use of a chemical mechanical polishing aqueous composition (B) containing at least one organic compound having a heterocyclic ring in addition to the chemical mechanical polishing aqueous dispersion (A). Also A chemical mechanical polishing agent kit of the present invention comprises the chemical mechanical polishing aqueous dispersion (A) and the chemical mechanical polishing aqueous composition (B). The polishing method and the polishing agent kit can prevent an increase of dishing and corrosion of wiring portion to enhance the yield. | 2008-11-06 |
20080274621 | III-Nitride semiconductor device with trench structure - A III-nitride trench device has a vertical conduction region with an interrupted conduction channel when the device is not on, providing an enhancement mode device. The trench structure may be used in a vertical conduction or horizontal conduction device. A gate dielectric provides improved performance for the device by being capable of withstanding higher electric field or manipulating the charge in the conduction channel. A passivation of the III-nitride material decouples the dielectric from the device to permit lower dielectric constant materials to be used in high power applications. | 2008-11-06 |
20080274622 | Plasma Processing, Deposition and ALD Methods - A plasma processing method includes providing a substrate in a processing chamber, the substrate having a surface, and generating a plasma in the processing chamber. The plasma provides at least two regions that exhibit different plasma densities. The method includes exposing at least some of the surface to both of the at least two regions. Exposing the surface to both of the at least two regions may include rotating the plasma and may cyclically expose the surface to the plasma density differences. Exposing to both of the at least two regions may modify a composition and/or structure of the surface. The plasma may include a plasmoid characterized by a steady state plasma wave providing multiple plasma density lobes uniformly distributed about an axis of symmetry and providing plasma between the lobes exhibiting lower plasma densities. Depositing the layer can include ALD and exposure may remove an ALD precursor ligand. | 2008-11-06 |
20080274623 | METHODS FOR FABRICATING A MAGNETIC HEAD READER USING A CHEMICAL MECHANICAL POLISHING (CMP) PROCESS FOR SENSOR STRIPE HEIGHT PATTERNING - Methods for fabricating TMR and CPP GMR magnetic heads using a chemical mechanical polishing (CMP) process with a patterned CMP conductive protective layer for sensor stripe height patterning. The method comprises defining a stripe height of a read sensor of a magnetic head reader. The method further comprises refill depositing an insulator layer on the read sensor. The method further comprises performing a CMP process down to the conductive protective layer on the read sensor deposited while defining the read sensor to remove an overfill portion of the insulator layer above the conductive protective layer and to remove a sensor pattern masking structure on the conductive protective layer. As a result, the insulator layer is planarized and smooth with the read sensor, eliminating fencing and alumina bumps typically encountered in the insulator layer at the edge of the patterned sensor. | 2008-11-06 |
20080274624 | METHOD FOR DEPOSITING TITANIUM NITRIDE FILMS FOR SEMICONDUCTOR MANUFACTURING - Embodiments of the invention describe TiN deposition methods suitable for high volume manufacturing of semiconductor devices on large patterned substrates (wafers). One embodiment describes a chemical vapor deposition (CVD) process using high gas flow rate of a tetrakis(ethylmethylamino)titanium (TEMAT) precursor vapor along with an inert carrier gas at a low process chamber pressure that provides high deposition rate of conformal TiN films with good step coverage in surface reaction limited regime. Other embodiments describe cyclical TiN deposition methods using TEMAT precursor vapor and a nitrogen precursor. | 2008-11-06 |