46th week of 2010 patent applcation highlights part 19 |
Patent application number | Title | Published |
20100289479 | SENSOR SYSTEM AND METHOD - The present invention provides a sensor system and a corresponding sensing method employing the sensor system. The sensor system comprises a sensor ( | 2010-11-18 |
20100289480 | PHYSICAL QUANTITY DETECTION CIRCUIT - A PLL circuit generates a plurality of oscillated clocks having different phases. A selector selects one of the plurality of oscillated clocks generated by the PLL circuit. A detection circuit detects a physical quantity signal corresponding to the physical quantity given to a physical quantity sensor from a sensor signal received from the physical quantity sensor based on the oscillated clock selected by the selector. | 2010-11-18 |
20100289481 | APPARATUS AND METHOD FOR DC VOLTAGE MEASUREMENT - The invention provides a method for DC voltage measurement. First, an input DC voltage is received. A temporary disturbance signal is then added to the input DC voltage to obtain a disturbed signal, wherein an amplitude of the temporary disturbance signal is greater than precision level of an analog-to-digital converter. The disturbed signal is then converted from analog to digital with the analog-to-digital converter to obtain a plurality of samples with different values. An average value is then derived from the samples. Finally, the average value is output as a measurement value of the input DC voltage. | 2010-11-18 |
20100289482 | Method and Apparatus for Monitoring Electrical Properties of Polymerization Reactor Wall Film - Disclosed is a method for using at least one static probe during polymerization in a fluid bed polymerization reactor system to monitor a coating on a surface of the reactor system and a distal portion of each static probe, wherein the coating is exposed to flowing fluid within the reactor system during the reaction. The surface may be a reactor bed wall (exposed to the reactor's fluid bed) and the coating is exposed to flowing, bubbling fluid within the fluid bed during the reaction. The method may include steps of: during the polymerization reaction, operating the static probe to generate a sequence of data values (“high speed data”) indicative of fluid flow variation (e.g., bubbling or turbulence), and determining from the high speed data at least one electrical property of the coating (e.g., of a portion of the coating on the distal portion of the static probe). | 2010-11-18 |
20100289483 | SENSOR CARTRIDGE - The present invention provides a sensor cartridge ( | 2010-11-18 |
20100289484 | MULTI-POSITION SWITCH HAVING DUAL OUTPUT HALL DEVICE - A multi-output switch includes a dipole magnet configured to move from a central position to either a first position or a second position and a Hall Effect sensor having a first sensitive area with a first output and a second sensitive area with a second output, wherein the sensor is relatively positioned such that when the magnet is in the central position, the first output and second output read off, when the magnet is in the first position the first sensitive area is activated and the first output reads on, and when the magnet is in the second position the second sensitive area is activated and the second output reads on. The switch may further include a magnet holder configured to house the magnet and define a pathway of movement for the magnet. | 2010-11-18 |
20100289485 | SYSTEM INCLUDING A MAGNET AND FIRST AND SECOND CONCENTRATORS - A system including a first concentrator, a second concentrator, and a magnet. The first concentrator has a first partial hub. The second concentrator has a second partial hub aligned with the first partial hub to form a bore. The magnet is situated in the bore and the first concentrator and the second concentrator guide magnetic flux from the magnet to sense movement of the magnet relative to the first concentrator and the second concentrator. | 2010-11-18 |
20100289486 | DEVICE FOR THE DETECTION OF AN ACTUATION ANGLE OF AN ELEMENT ROTATABLE ABOUT A SHAFT - A device for detecting an actuation angle of an element rotatable or pivotable about a shaft of the mentioned type. The device includes a sensor unit configured to emit an electrical signal depending on an angle of rotation and including an annular permanent magnet non-movably connected to the rotatable or pivotable element. The sensor includes a stationary Hall sensor array having two or more Hall sensors disposed at an angular distance about the annular permanent magnet, wherein an individual Hall sensor located in a linear zone defined by the movement of the rotatable or pivotable element is selected by a microcontroller according to a current position of the rotatable or pivotable element. | 2010-11-18 |
20100289487 | MAGNETIC ENCODER - A magnetic encoder is provided for use in a wheel bearing that forms a pulse train by means of a magnetic force and generates a code. The magnetic encoder is obtained by radially magnetizing a magnetic rubber ring with alternate S poles and N poles, wherein the magnetic rubber ring is formed by vulcanizing and adhering a magnetic rubber base, in which unvulcanized rubber and rare earth magnetic powder are mixed, to a reinforcement ring. | 2010-11-18 |
20100289488 | Optical-Magnetic Kerr Effect Waveform Testing - System and methods are provided for optical-magnetic Kerr effect signal analysis. In one aspect, a test fixture is supplied having parallel conductive lines, with an input of a first line adjacent a resistively loaded output of a second line and a resistively loaded output of the first line adjacent an input of the second line. An optically transparent test region is interposed between the conductive lines, and a metallic reflector underlies the test region. A signal reference is supplied to the input of the first line and a signal under test is supplied to the input of the second line. A light beam having a first angle of polarization is focused through the test region onto the reflector. The intensity of the reflected light is measured and the similarity between the signal under test and the reference signal can be determined in response to the measured light intensity. | 2010-11-18 |
20100289489 | MAGNETIC BRIDGE FOR SENSOR IN WHICH MAGNETIC FLUID IS USED, CURRENT SENSOR IN WHICH MAGNETIC BRIDGE IS USED, AND MAGNETIC FIELD SENSOR - The present invention provides a sensor in which an offset problem of the sensor can be solved, that is, a current sensor, a magnetic field sensor, a magnetic bridge that is formed by a magnetic fluid suitably used in the current sensor and the magnetic field sensor, and a magnetic path casing that forms the magnetic fluid whose form is unfixed into a required morphologic magnetic bridge. The magnetic bridge includes a magnetic circuit in which two separated circular magnetic paths mr | 2010-11-18 |
20100289490 | ELECTROMAGNETIC DETECTION APPARATUS AND METHODS - Systems and methods for detecting electromagnetic waves are disclosed. A system for detecting such waves includes a device having a first magnetic layer having a fixed magnetization direction, a second magnetic layer having an unfixed magnetization direction responsive to the electromagnetic wave, and a barrier layer positioned between the first and second magnetic layers. The device may have an impedance dependent on a relative angle between the fixed magnetization direction and the unfixed magnetization direction. The system further has a detector configured to detect a change in the impedance indicative of the electromagnetic wave. The electromagnetic wave may be detected by positioning the device in order to detect the electromagnetic wave, determining a change in the impedance of the device, and detecting the electromagnetic wave based on the change in the impedance of the device. Characteristics of the wave such as frequency, power, and phase may also be detected. | 2010-11-18 |
20100289491 | RADIO FREQUENCY ATOMIC MAGNETOMETER - An atomic magnetometer is used to detect radio frequency magnetic fields, such as those generated in nuclear resonance experiments. The magnetometer is based on nonlinear magneto-optical rotation and pumps an atomic vapor into a quadrupole aligned state. Detection of the modulation of the polarization of a linearly polarized beam provides the radio frequency signal, which can then be processed to extract the component frequencies. | 2010-11-18 |
20100289492 | METHOD AND DEVICE FOR POSITION DETERMINATION OF BODY MATRIX COILS IN MR SYSTEMS - In a device and a method to determine the position of at least one local coil for a magnetic resonance tomography apparatus, the field strength of a magnetic field is measured at multiple locations with at least one magnetic field strength sensor, and the position of the local coil ( | 2010-11-18 |
20100289493 | METHOD AND DEVICE TO CONTROL A WORKFLOW OF AN MR MEASUREMENT IN A MAGNETIC RESONANCE SYSTEM - In a method and a device to control a workflow of an MR measurement in a magnetic resonance system, MR signals from multiple slices of a predetermined volume segment of an examination subject are acquired, multiple slices with a continuous table feed. In the MR measurement, one of these multiple slices in the active volume of the magnetic resonance system is repeatedly measured in succession at different measurement positions P | 2010-11-18 |
20100289494 | System and Method for Mode Mixing in Magnetic Resonance Imaging - The present invention provides a system and method for using a hardware-based compression of signals acquired with an magnetic resonance imaging (MRI) system. This allows a first multi-channel MR signal to be compressed to a second multi-channel MR signal having fewer channels than the first MR signal. This system and method reduces the number of RF receivers needed to achieve the sensitivity encoding benefits associated with highly parallel detection in MRI. Furthermore, the system and method reduces bottlenecks connection an MRI system's RF receiver and reconstruction computer and reduces the computational burden of image reconstruction. | 2010-11-18 |
20100289495 | TRACKING THE POSITIONAL RELATIONSHIP BETWEEN A BORING TOOL AND ONE OR MORE BURIED LINES USING A COMPOSITE MAGNETIC SIGNAL - A boring tool is moved through the ground in a region which includes at least one electrically conductive in-ground line and which is subject to static magnetic fields including the magnetic field of the earth. Tracking a positional relationship between the boring tool and the line, as well as a directional heading of the boring tool within the region are provided by: (i) generating a time varying magnetic field from the line; (ii) at the boring tool, detecting a composite magnetic signal which includes one component affected by the static magnetic fields and another component affected by the time varying magnetic field such that the static magnetic field component varies as a function of the directional heading and the time varying component varies as a function of the positional relationship; and (iii) processing the composite magnetic signal to separate the static magnetic field component and the time varying magnetic field component from the composite magnetic signal for use in determining the directional heading and the positional relationship. In one feature, the static magnetic field component is used to determine the directional heading of the boring tool and the time varying magnetic field component is used to determine the positional relationship. | 2010-11-18 |
20100289496 | Dipole Locator Using Multiple Measurement Points - A receiver and tracking system for identifying a location of a magnetic field source. In a preferred embodiment a plurality of tri-axial antennas are positioned at three distinct points on a receiver frame. Each antenna detects a magnetic field from a source and a processor is used to determine a location of the source relative to the frame using the antenna signals. Each tri-axial antenna comprises three windings in each of three channels defined by a support structure. The windings each define an aperture area. The windings have substantially identical aperture areas and have a common center point. The receiver may to display to the operator the relative location of the field source or may direct the operator to a spot directly above the field source. | 2010-11-18 |
20100289497 | Multi-Cell Power System Controller - Various apparatuses and methods for detecting cell connection status of a multi-cell battery are disclosed herein. For example, some embodiments provide an apparatus for detecting cell connection status of a multi-cell battery. The apparatus includes a battery cell input for each cell, a cell connection status detector for each cell, and at least one comparator. Each of the cell connection status detectors is connected to a battery cell input and has a current-based status indicator output. The at least one comparator is connected to the current-based status indicator outputs. Each of the plurality of cell connection status detectors floats in a different supply voltage range. The at least one comparator is referenced to a lower voltage potential than at least one of the plurality of cell connection status detectors. | 2010-11-18 |
20100289498 | BATTERY TESTER WITH PROMOTION FEATURE - Battery maintenance equipment is provided for use in maintaining storage batteries. The battery maintenance equipment includes battery maintenance circuitry. A redemption code output is provided and configured to provide an output having a redeemable value in response to the battery maintenance circuitry. A method includes outputting a redemption code in response to usage of battery maintenance equipment. | 2010-11-18 |
20100289499 | MONITORING DEVICE FOR MONITORING A TERMINAL OF A TERMINAL COMPONENT - A monitoring device for monitoring a terminal of a terminal component in a power supply system is described, the terminal component being connectable to the power supply system and to a monitoring system via an electrical connection element, and the monitoring device comprising a voltage measuring device for detecting a voltage value of a voltage between a first terminal and a second terminal of the electrical connection element, the first terminal and the second terminal being connectable to the monitoring system, and an evaluation device for evaluating the voltage value, the evaluation device being designed to generate an indicating signal, which indicates a faulty connection to the power supply system if the voltage value differs from a predetermined voltage value. | 2010-11-18 |
20100289500 | SUBSTRATE STRUCTURE - A substrate includes a first plate member; a plurality of first electrodes provided on the major surface of the first plate member, the first electrodes including at least one electrode for circuit connection and at least one monitor electrode separate from the electrode for circuit connection; a second plate member; a plurality of second electrodes provided on the major surface of the second plate member; a plurality of solder members provided between the first electrodes and the second electrodes for electrical connection therebetween, repeatedly; and a detector for detecting an electrical disconnection between at least one of the monitor electrode and the second electrode. | 2010-11-18 |
20100289501 | METHOD FOR CHARACTERIZING THE SENSITIVITY OF AN ELECTRONIC COMPONENT TO ENERGETIC INTERACTIONS - The behavior of a component subjected to pulsed laser radiation is measured. The polarization value, frequency, and temperature (or other operating conditions) to which the component is sensitive are determined by detecting a temporary or permanent fault in the operation of the component. If necessary, the parasitic currents generated are prevented from destroying the tested component at the time of testing. A susceptibility of the component to energetic interactions and the preferred operating conditions for the component are deduced. | 2010-11-18 |
20100289502 | TIME DOMAIN REFLECTOMETRY SYSTEM AND METHOD OF USE - A non-invasive Time Domain Reflectometry (TDR) transmission line system | 2010-11-18 |
20100289503 | EXTENDED PROXIMITY SENSOR DEVICE WITH ELECTROSTATIC DISCHARGE PROTECTION - An input device is provided with improved electrostatic discharge protection. Specifically, the input device includes a plurality of capacitive sensing electrodes configured for object detection. An electrostatic discharge (ESD) shunt is disposed near the capacitive sensing electrodes and configured to provide ESD protection to the capacitive sensing electrodes. The input device also includes an extended-proximity capacitive sensing electrode configured to for object detection of relatively distant objects. The ESD shunt has an associated first resistance, and the extended-proximity capacitive sensing electrode has an associated second resistance. The second resistance is greater than the first resistance such that an electrostatic discharge at a first exposed location would be attracted to the ESD shunt via a first potential discharge path instead of being attracted to the extended-proximity capacitive sensing electrode via a second potential discharge path, where the first discharge path is longer than the second discharge path. | 2010-11-18 |
20100289504 | PROCESS FOR MEASURING BOND-LINE THICKNESS - A process for measuring the thickness of an insulating material. The process includes providing a device used to measure capacitance, and electrically connecting the capacitance measuring device to a heat sink and an electrical, heat-generating component. The thickness of the insulating material is determined by measuring the capacitance of the insulating material according to the formula; | 2010-11-18 |
20100289505 | ELECTRICAL DOUBLE LAYER CAPACITIVE DEVICES AND METHODS OF USING SAME FOR SEQUENCING POLYMERS AND DETECTING ANALYTES - Provided according to some embodiments of the present invention are electrical double layer (EDL) capacitive devices that include an insulating substrate defining a nanopore therethrough; a nanopore electrode exposed in a portion of the nanopore; and an electrolyte in contact with the nanopore electrode. Also provided are methods of using EDL capacitive devices according to embodiments of the invention to sequence polynucleotides or other polymers and/or to detect analytes. | 2010-11-18 |
20100289506 | CAPACITIVE SENSOR AND PROXIMITY DETECTOR USING IT - A capacitive sensor may be used as a proximity detector in an obstruction warning system for road vehicles, e.g. for use when the vehicle is reversing. A digital signal processor | 2010-11-18 |
20100289507 | MULTICONTACT TRANSPARENT TACTILE SENSOR BASED ON A METALIZED SURFACE DEPOSITION - A multicontact transparent tactile sensor including two at least partially conducting transparent layers, the layers being spaced apart by an insulating transparent material. At least one of the layers includes a transparent sheet on which is deposited an array of conducting tracks whose width is less than 80 microns. | 2010-11-18 |
20100289508 | ELECTRONIC ANALYSIS CIRCUIT WITH ALTERNATION OF CAPACITIVE/RESISTIVE MEASUREMENT FOR PASSIVE-MATRIX MULTICONTACT TACTILE SENSOR - An electronic analysis circuit for a passive-matrix multicontact tactile sensor including an electrical supply mechanism feeding one of two axes of the matrix, and a mechanism for detecting electrical characteristics along the other axis of the matrix, at intersections between the two axes. The electrical characteristic measured is alternately capacitance and resistance. A multicontact passive-matrix tactile sensor includes an electrical supply mechanism feeding one of the two axes of the matrix, a mechanism detecting electrical characteristics along the other axis of the matrix, at the intersections between the two axes, and such an electronic analysis circuit. | 2010-11-18 |
20100289509 | METHOD FOR POSITIONING CARBON NANOTUBES BETWEEN ELECTRODES, BIOMOLECULE DETECTOR BASED ON CARBON NANOTUBE-PROBE COMPLEXES AND DETECTION METHOD USING THE SAME - A device and method are disclosed for detecting biomolecules. More specifically, by measuring the change in the electrical properties of a complex between a probe and carbon nanotubes, a non-label detection is achieved, capable of a rapid, sensitive and electrical detection of the presence and concentration of biomolecules in a sample solution. | 2010-11-18 |
20100289510 | METHOD AND SYSTEM FOR DETECTION OF SOLID MATERIALS IN A PLASMA USING AN ELECTROMAGNETIC CIRCUIT - A method for solid material detection in a medium includes receiving an exhaust gas downstream with respect to a workpiece from which a photoresist material is removed. An electromagnetic circuit is configured to include the exhaust gas, the exhaust gas is excited with electromagnetic energy and an impedance value of the electromagnetic circuit is determined, wherein the impedance value corresponds to an amount of solid material within the exhaust gas. | 2010-11-18 |
20100289511 | METHOD FOR TESTING A TEST SUBSTRATE UNDER DEFINED THERMAL CONDITIONS AND THERMALLY CONDITIONABLE PROBER - In a method and a device for testing a test substrate under defined thermal conditions, a substrate that is to be tested is held by a temperature-controllable chuck and is set to a defined temperature; the test substrate is positioned relative to test probes by at least one positioning device; and the test probes make contact with the test substrate for testing purposes. At least one component of the positioning device that is present in the vicinity of the temperature-controlled test substrate is set to a temperature that is independent of the temperature of the test substrate by a temperature-controlling device, and this temperature is held constant. | 2010-11-18 |
20100289512 | PROBES WITH OFFSET ARM AND SUSPENSION STRUCTURE - A probe having a conductive body and a contacting tip that is terminated by one or more blunt skates for engaging a conductive pad of a device under test (DUT) for performing electrical testing. The contacting tip has a certain width and the blunt skate is narrower than the tip width. The skate is aligned along a scrub direction and also has a certain curvature along the scrub direction such that it may undergo both a scrub motion and a self-cleaning rotation upon application of a contact force between the skate and the conductive pad. While the scrub motion clears oxide from the pad to establish electrical contact, the rotation removes debris from the skate and thus preserves a low contact resistance between the skate and the pad. The use of probes with one or more blunt skates and methods of using such self-cleaning probes are especially advantageous when testing DUTs with low-K conductive pads or other mechanically fragile pads that tend to be damaged by large contact force concentration. | 2010-11-18 |
20100289513 | TEST SOCKET ASSEMBLY HAVING HEAT DISSIPATION MODULE - A test socket assembly ( | 2010-11-18 |
20100289514 | INSPECTION APPARATUS - An inspection apparatus is provided to perform an accurate temperature control, cut a noise wave, overcome contact failure, and improve inspection accuracy. The inspection apparatus includes a probe device having a contact for contacting with an electrode of an inspected object and having a built-in heater for correcting dislocation of the contact to the electrode caused by temperature difference between the probe device and the inspected object; a tester for testing probe device and supplying electric power to the heater; an electric power supply system, provided on the tester, for supplying electric power to the heater; and a temperature control unit for controlling electric power to the heater of the probe device through the electric power supply system, wherein the electric power supply system includes at least one open/close switch for switching on and off power supply to the heater. A connector including a male connector and a female connector provided on the other end are provided. A continuity-checking device checks to be able to supply electric power to the heater from the electric power supply system. | 2010-11-18 |
20100289515 | PROBE FOR A SOCKET, SOCKET FOR A SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC DEVICE - A socket for electrically connecting conductive patterns of a circuit board and electrodes of an integrated circuit, the socket includes a main body, a plurality of hollow probes that connect conductive patterns of the circuit board and electrodes of the integrated circuit, the plurality of hollow probes provided to the main body, and an outlet that discharges a refrigerating medium passing through each of the hollow probes, the outlet provided on a side of the main body. | 2010-11-18 |
20100289516 | MALFUNCTION DETERMINING APPARATUS AND MALFUNCTION DETERMINING METHOD FOR CHARGING SYSTEM - An ECU executes a program including a step of determining that a pilot wire for transferring a pilot signal CPLT, which is output when a charging cable is connected to a plug-in hybrid vehicle and an external power source, to the ECU is broken, when output of the pilot signal CPLT is currently stopped and a voltage VAC of the external power source (absolute value of voltage VAC) detected by a voltmeter provided within the plug-in hybrid vehicle is greater than zero. | 2010-11-18 |
20100289517 | BUILT OFF TESTING APPARATUS - A built off testing apparatus coupled between a semiconductor device and an external testing apparatus to test a semiconductor device. The built off testing apparatus can include a frequency multiplying unit to generate a test clock frequency by multiplying the frequency of a clock input by the external testing apparatus according to the operation speed of the semiconductor device, an instruction decoding unit to generate test information by decoding test signals input by the external testing apparatus according to the test clock frequency, and a test execution unit to test the semiconductor device according to the test information, and can determine whether the semiconductor device is failed or not based on test data output by the semiconductor device, and can transmit resulting data to the external testing apparatus. | 2010-11-18 |
20100289518 | CIRCUIT AND METHOD FOR DETECTING FAULTY DIODE - A circuit for detecting faulty diode is disclosed, wherein the circuit for detecting faulty diode comprises a diode having an anode connecting to a voltage supply; a first switch having a first end connected to a cathode of the diode; a testing current source connected to the second end of the first switch; a one-shot circuit connected to a control end of the first switch, by which an output signal is generated and transmitted to the control end; and a comparator connected to a reference voltage input terminal for receiving a reference voltage and connected to the second end of the first switch. When the one-shot circuit closes the first switch for a maintaining period to urge the comparator comparing the reference voltage with the voltage applied to the second end of the first switch, whereby a signal used to discriminate whether the diode is fail or not is generated. | 2010-11-18 |
20100289519 | CIRCUIT FOR DETECTING FAULTY DIODE - A circuit for detecting faulty diode comprises a diode having an anode connected to a voltage supply; a resistor having a first end connected to a cathode of the diode; a transistor having a drain connected to a second end of the resistor and a source that is grounded; a differential amplifier having a positive terminal connected to the drain of the transistor, a negative terminal connected to a reference voltage input terminal for receiving a reference voltage, and an output terminal connected to a gate of the transistor; and a buffer having an input terminal connected to the gate of the transistor, and a signal output terminal used to output a faulty signal. | 2010-11-18 |
20100289520 | Debug Network for a Configurable IC - Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a configuration network for loading configuration data into the IC, where the configuration data is for configuring several of the configurable circuit. In some embodiments, the configuration network includes several registers at several boundaries between the tiles, where the registers allow multiple configuration data sets to be routed to multiple tiles concurrently. The configuration network in some embodiments includes several address counters at several tiles, where each address counter allows one address to be loaded for a tile and then to be successively incremented based on increment instructions sent over the configuration network. At least, two different addresses specified by an address counter of a particular tile identify two different resources within the particular tile. | 2010-11-18 |
20100289521 | TERMINATION RESISTANCE ADJUSTING CIRCUIT - A termination resistance adjusting circuit includes a first termination resistor circuit, a second termination resistor circuit connected in parallel with the first termination resistor circuit, a resistor circuit for adjustment that adjusts resistances of the first and second termination resistor circuits, a first amplifier circuit that receives a first voltage determined by the resistor circuit for adjustment and a second voltage determined by a reference resistor connected externally, equalizes the first and second voltages, and outputs a resistance adjusting signal to the first and second termination resistor circuits, first and second terminals connected to the first and second termination resistor circuits respectively, and a second amplifier circuit that receives a voltage based on a common voltage of a differential signal supplied to the first and second terminals, and the first or second voltage, and equalizes the voltage based on the common voltage and the first or second voltage. | 2010-11-18 |
20100289522 | SIGNAL TRANSMITTING DEVICE SUITED TO FAST SIGNAL TRANSMISSION - A signal transmitting circuit includes a circuit block having a driving circuit and an intra-block transmission line for transmitting a signal from the driving circuit, a circuit block having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between the driving and receiving circuit blocks. The inter-block transmission line is terminated by a resistor having substantially the same impedance as the interblock transmission line. The intra-block transmission lines are provided with a resistance element having a resistance substantially equal to a value derived by subtracting half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer. | 2010-11-18 |
20100289523 | ECHO CANCELING ARRANGEMENT - In a line driver/receiver circuit where the line driver is connected with its output terminals to a load for supplying a transmit signal thereto and where the receiver is connected with its input terminals to the load for simultaneously receiving a receive signal therefrom, the transmit signal on the input terminals of the receiver is canceled by connecting the output terminals of the line driver to the load via equal complex sense impedances of an impedance value that is much smaller than the impedance value of the load impedance to match the load impedance, connecting the input terminals of the receiver to the load via equal first resistors and to respective output terminal of the line driver via equal second resistors, and providing transconductance amplifiers to sense the voltage across the sense impedances and supply corresponding currents to respective input terminal of the line driver. | 2010-11-18 |
20100289524 | Method for Fabrication of a Semiconductor Element and Structure Thereof - Re-programmable antifuses and structures utilizing re-programmable antifuses are presented herein. Such structures include a configurable interconnect circuit having at least one re-programmable antifuse, wherein the at least one re-programmable antifuse is configured to be programmed to conduct by applying a first voltage across it and is configured to be re-programmed not to conduct by applying second voltage across it, wherein the second voltage is higher than the first voltage. Additionally, the re-programmable antifuses may be configured to a permanently conductive state by applying an even higher voltage across it. | 2010-11-18 |
20100289525 | LOGIC CIRCUIT - A logic circuit with a simple configuration and good current efficiency is provided. The logic circuit includes a two-terminal bistable switching element ( | 2010-11-18 |
20100289526 | Level shifter - A level shifter includes a first level shift circuit that converts a signal level of a first pulse signal into an amplitude level of a power supply voltage, and a second level shift circuit that converts a signal level of the second pulse signal into an amplitude level. Each of the first and second level shift circuits includes a first conductivity type transistor having its gate receiving the first and second pulse signals respectively, its source connected to a ground, and its drain outputs a level shifted pulse signal, and a first transistor of a second conductivity type having its gate connected to the gate of the transistor of the first conductivity type, its drain connected to the drain of the transistor of the first conductivity type, and its source connected to the power supply via a connected transistor group, and the connected transistor group includes at least one of the second conductivity type transistors. | 2010-11-18 |
20100289527 | SEMICONDUCTOR DEVICE - A semiconductor device according to the present invention comprises a first semiconductor integrated circuit 11 having a predetermined function, the first semiconductor integrated circuit outputting a required output signal, a second semiconductor integrated circuit | 2010-11-18 |
20100289528 | POWER REDUCING LOGIC AND NON-DESTRUCTIVE LATCH CIRCUITS AND APPLICATIONS - In some embodiments, a logic circuit is provided that has a plurality of gates with gate inputs. Also provided is one or more latch circuits coupled to the logic circuit to provide operational data when in an operational mode and to cause at least some of the gate inputs to be at values resulting in reduced leakage during a sleep mode. Additionally provided are embodiments of non-destructive latch circuits, which may be used to implement the latch circuits just discussed. Other embodiments are disclosed and/or claimed herein. | 2010-11-18 |
20100289529 | POWER-ON DETECTOR AND METHOD THEREOF - A power-on detector and a method thereof are provided. The power-on detector includes four transistors, two resistors, and a comparator. The power-on detector can detect an input voltage and then determine whether the power is turned on or not. The power-on determination is substantially immune to temperature variation. The power-on detector is noise-free and stable in various temperatures. | 2010-11-18 |
20100289530 | ELECTRONIC APPARATUS AND CABLE DEVICE - [Object] To discriminate whether a cable in conformity with a conventional standard or a cable in conformity with a new standard is connected. | 2010-11-18 |
20100289531 | COMPARATOR WITH HYSTERESIS - Techniques for providing a comparator incorporating amplitude hysteresis. In an exemplary embodiment, a current offset stage is coupled to a comparator having a folded cascode architecture. The current offset stage offsets the current generated from an input stage to delay switching of the comparator output to implement amplitude hysteresis. In an exemplary embodiment, rail-to-rail input voltages may be accommodated by providing dual NMOS and PMOS input stages. In another exemplary embodiment, the amplitude hysteresis may be controlled by an adjustable threshold voltage. In yet another exemplary embodiment, a constant transconductance g | 2010-11-18 |
20100289532 | ADAPTATION CIRCUIT FOR CONTROLLING A CONVERSION CIRCUIT - Adaptation circuits ( | 2010-11-18 |
20100289533 | VOLTAGE CURRENT CONVERTER, DIFFERENTIATION CIRCUIT, INTEGRATION CIRCUIT, AND FILTER CIRCUIT USING THE CONVERTER, AND VOLTAGE CURRENT CONVERSION METHOD - It is possible to provide a voltage-current converter which can realize a variable filter having a steep cut-off characteristic with a small area. The voltage-current converter includes: one or more sampling/holding units for sampling an inputted voltage and holding the sampled voltage; one or more separate voltage-current conversion units for outputting a current corresponding to the voltage held by the sampling/holding units; and a control unit for controlling the timing of the sampling and holding of the inputted voltage by the sampling/holding units. | 2010-11-18 |
20100289534 | INTERFACE CIRCUIT THAT CAN SWITCH BETWEEN SINGLE-ENDED TRANSMISSION AND DIFFERENTIAL TRANSMISSION - An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system. | 2010-11-18 |
20100289535 | INTEGRATED GATE DRIVER CIRCUIT - An integrated gate driver circuit includes an output drive circuit and a voltage stabilizing circuit. The voltage stabilizing circuit is configured to stabilize an output voltage outputted by the output drive circuit thereby reducing the ripple of the output voltage. | 2010-11-18 |
20100289536 | CIRCUIT FOR GENERATING POWER-UP SIGNAL OF SEMICONDUCTOR MEMORY APPARATUS - A power-up signal generating circuit of a semiconductor memory apparatus includes a current source unit configured to supply a current to a first node; a current sink unit configured to be turned on when the level of a divided voltage dividing an external voltage is equal to or higher than a predetermined level to allow the current to flow from a first node to a second node; a control unit configured to control the turn-on timing of the current sink unit by controlling a voltage level of the second node; and a signal generating unit configured to enable a power-up signal depending on a voltage level of the first node. | 2010-11-18 |
20100289537 | SYSTEMS AND METHODS FOR PRODUCING A PREDETERMINED OUTPUT IN A SEQUENTIAL CIRCUIT DURING POWER ON - An integrated circuit configured for producing a predetermined output in a sequential circuit during power on is disclosed. The integrated circuit includes one or more capacitors coupled to one or more internal nodes. The one or more capacitors charge the internal nodes if a voltage at the power supply node ramps up to a set voltage at or faster than a period of time. The integrated circuit also includes a first transistor coupled to the power supply node. The first transistor produces leakage current that charges one or more internal nodes when the voltage on the power supply node ramps up to the set voltage no faster than the period of time. The integrated circuit also includes an output node. A logical value on the output node is based on a logical value on the charged internal nodes when an input signal to the sequential circuit is not active and the voltage on the power supply node is at the set voltage. | 2010-11-18 |
20100289538 | CLOCK CONDITIONING CIRCUIT - A circuit includes a clock conditioning circuit which receives an encoded clock signal, and provides first and second conditioned clock signals in response. The clock conditioning circuit adjusts a period of the first and second conditioned clock signals in response to an adjustment of a period of the encoded clock signal. The circuit includes a modulator which receives the first and second conditioned clock signals. | 2010-11-18 |
20100289539 | METHOD AND SYSTEM OF OPTIMIZING A CONTROL SYSTEM USING LOW VOLTAGE AND HIGH-SPEED SWITCHING - A phase-locked loop charge pump driven by low voltage input is disclosed. In one aspect, a charge pump for a phase-locked loop circuit includes a sourcing current source providing a sourcing current, wherein the sourcing current source is coupled to a high-voltage operating voltage supply. A sourcing control circuit uses low-voltage sourcing control signals to selectively cause the charge pump to source the sourcing current to an output of the charge pump. A sinking control circuit uses low-voltage sinking control signals at a low voltage and utilizes a low-swing current mechanism to sink the sinking current from the output of the charge pump. In another aspect, the sourcing control circuit is cascode and the sinking circuit is non-cascode. In another aspect the sourcing current source and the sinking current source are both cascode. In another aspect, the sourcing current source is non-cascode and the sinking current source is cascode. In another aspect, the sourcing current source and the sinking current source are both non-cascode. | 2010-11-18 |
20100289540 | DELAY CIRCUIT - In a delay circuit for inputting square waves, fluctuations in the amount of delay brought about by noise pulses present in input signals are reduced. A switch (SW | 2010-11-18 |
20100289541 | DIGITAL PHASE-LOCKED LOOP CIRCUIT INCLUDING A PHASE DELAY QUANTIZER AND METHOD OF USE - A phase locked loop circuit in accordance with an embodiment implements a digital phase delay quantizer to replace the analog charge-pump and phase frequency detector in an analog PLL circuit. Therefore, the built-in loop filter can be a compact-sized, high order, high bandwidth, and high attenuation digital filter as well. The digital PLL circuit takes advantage of the deep sub-micron process technology which features high speed, high resolution, compact size, and low power. | 2010-11-18 |
20100289542 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a frequency determining unit configured to determine an operational speed of the semiconductor integrated circuit and to generate a frequency region signal; a duty cycle control unit configured to detect a duty cycle of a DLL clock and to generate a duty cycle control signal; a duty cycle correcting unit configured to generate a corrected clock by correcting a duty cycle of an input clock in response to the frequency region signal and in response to the duty cycle control signal; and a DLL (Delay Locked Loop) circuit configured to generate the DLL clock by controlling a phase of the corrected clock. | 2010-11-18 |
20100289543 | Method and Apparatus for Improving Accuracy of Signals Delay - A delay module, a delay method, a clock detection apparatus, and a digital locked loop (DLL) are disclosed. The delay module includes a first delay unit, a second delay unit and an inverter. Each of the first delay unit and the second delay unit include two logic gates adapted to invert a phase: a logic gate for gating and a logic gate for delaying. These two logic gates are electrically connected. The input port of the logic gate for gating of the first delay unit is electrically connected to the output port of the inverter; the output port of the logic gate for delaying of the first delay unit is electrically connected to the input port of the logic gate for delaying of the second delay unit; the input port of the inverter is electrically connected to the input port of the logic gate for gating of the second delay unit; the input port of the inverter is adapted to input a clock signal to be delayed, and the logic gate for delaying of the second delay unit is adapted to output a delayed clock signal. With the present invention, a more accurate delay step value may be achieved. | 2010-11-18 |
20100289544 | Receiver With Enhanced Clock And Data Recovery - A receiver device implements enhanced data reception with edge-based clock and data recovery such as with a flash analog-to-digital converter architecture. In an example embodiment, the device implements a first phase adjustment control loop, with for example, a bang-bang phase detector, that detects data transitions for adjusting sampling at an optimal edge time with an edge sampler by adjusting a phase of an edge clock of the sampler. This loop may further adjust sampling in received data intervals for optimal data reception by adjusting the phase of a data clock of a data sampler such a flash ADC. The device may also implement a second phase adjustment control loop with, for example, a baud-rate phase detector, that detects data intervals for further adjusting sampling at an optimal data time with the data sampler. | 2010-11-18 |
20100289545 | OSCILLATION CIRCUIT, TIMING DEVICE, AND ELECTRONIC SYSTEM UTILIZING THE SAME - An oscillation circuit including a first transistor, a second transistor, a current source, a first inverter, and an impedance unit is disclosed. The first transistor has a first source receiving a first operation voltage, a first drain, and a first gate coupled to the first drain. The second transistor has a second source receiving the first operation voltage, a second drain, and a second gate coupled to the first gate. The current source is coupled between the first drain and a grounding voltage. The first inverter generates an oscillation signal and has a first input terminal, a first output terminal, and a first power terminal coupled to the second drain. The impedance unit is coupled between the first input terminal and the first output terminal. | 2010-11-18 |
20100289546 | DIGITAL SIGNAL CONVERTER - A digital signal converter (CNV) converts a digital input signal (PCM) into a pulse width modulated signal (PWM), which is a binary signal that comprises pulses of varying width. The digital signal converter can operate in a signal mode and a transition mode. In the transition mode, the digital converter provides the pulse width modulated signal (PWM) by applying an anti-transient noise shaping function (NSH | 2010-11-18 |
20100289547 | PULSE-WIDTH MODULATION (PWM) WITH INDEPENDENTLY ADJUSTABLE DUTY CYCLE AND FREQUENCY USING TWO ADJUSTABLE DELAYS - A pulse width modulation circuit may generate an adjustable output signal that periodically transitions between a first and a second state with an adjustable duty cycle. A first pulse generator circuit may be configured to generate a first pulse signal that periodically transitions at an adjustable delay with respect to a periodic reference signal. A second pulse generator circuit may be configured to generate a second pulse signal that periodically transitions at an adjustable delay with respect to the periodic reference signal. A logic circuit may be configured to generate the adjustable output signal based on both the first and the second pulse signals. | 2010-11-18 |
20100289548 | Frequency Generator for Generating Signals with Variable Frequencies - A frequency generator for generating signals with variable frequency includes a periodic signal generator for generating a periodic signal according to an output signal of the frequency generator, a first comparator for comparing the periodic signal and a first reference signal to output a first comparison result, a second comparator for comparing the periodic signal and a second reference signal to output a second comparison result, a logic unit for generating the output signal according to the first comparison result and the second comparison result, and a waveform generator for generating the first reference signal and the second reference signal according to a predetermined frequency variation trend to modulate a output frequency of the output signal. | 2010-11-18 |
20100289549 | ANALOG SCAN CIRCUIT, ANALOG FLIP-FLOP, AND DATA PROCESSING APPARATUS - Observability and controllability in a test of an analog LSI are increased. Analog signals input from input terminals IN | 2010-11-18 |
20100289550 | ELECTRONIC CIRCUIT FOR THE TRANSMISSION OF HIGH-FREQUENCY SIGNALS - The invention relates to an electronic circuit for transmitting high-frequency signals. Said electronic circuit comprises an amplification circuit featuring frequency-dependent amplification which remains the same or drops in a vicinity of a threshold frequency (f | 2010-11-18 |
20100289551 | INCREASED RELIABILITY IN THE PROCESSING OF DIGITAL SIGNALS - A method, device and computer program product for providing increased reliability in the processing of digital signals. The device includes a module for performing analog measurement of a received signal intended to occupy two logical states at various instances in time, a module for determining if there is a change in the analog signal level, a module for determining if the change fulfills at least one logical state change condition, wherein a first logical state change condition is based on the speed of change of the analog signal level, and a module for determining that there is a change from one logical state to the other if at least one logical state change condition is fulfilled. The invention provides secure detection of unreliable digital signals that may be generated in harsh environments that are polluted or moist. | 2010-11-18 |
20100289552 | SYSTEMS INCLUDING LEVEL SHIFTER HAVING VOLTAGE DISTRIBUTOR - An exemplary embodiment of such a system includes: a level shifter operative to transform an input signal into an output signal, the level shifter includes: a voltage distributor operative to receive the input signal and distribute potential levels at a first node and a second node to respectively output a first signal and a second signal, and the voltage distributor includes: a current limiter, operative to provide a limited current passing through the first node; a switch, operative to selectively establish an electrical connection between the first node and the second node; and a first transistor having a first electrode, a second electrode, and a first control electrode, wherein the first electrode is connected to the second node, the second electrode is utilized to receive the input signal, and the first control electrode is coupled to the first node; and an output circuit, operative to generate the output signal. | 2010-11-18 |
20100289553 | SEMI-ADAPTIVE VOLTAGE SCALING FOR LOW-ENERGY DIGITAL VLSI-DESIGN - A semi-adaptive voltage scaling method and device for determining minimal supply voltages for digital electronic semiconductor circuitry, e.g., microprocessors, of electronic devices under production testing and “real” operating conditions. The SAVS operates in a closed-loop during a production test phase of the circuitry and in an open-loop mode in an application (operation) phase of the semiconductor circuitry. During production testing, a lowermost level of the supply voltage for the semiconductor circuitry is determined at one single defined temperature at which operating specifications of the circuit are met. The lowermost level is stored in a dedicated electronic memory of the circuitry together with temperature dependent parameters. Afterwards, when the digital electronic circuitry is operated in a “real” application, e.g., a mobile phone, the device and method reads the previously measured and proven data from the memory and regenerates the minimum level of supply voltage for the circuitry, taking into account the actual temperature of the application. As a result, the digital semiconductor circuitry in the “real” application is supplied with a minimum level of supply voltage, whereby specified parameters of the circuitry are met. Thus, a power consumption of the circuitry is advantageously reduced to a minimum. | 2010-11-18 |
20100289554 | ELECTRONIC DEVICE AND METHOD FOR PLAYING DIGITAL CONTENT - An electronic device includes a detecting module, a signal processing module connected to the detecting module, a controlling module connected to the signal processing module and a display connected to the controlling module. The detecting module outputs a first detect signal to the signal processing module when a human body is present in front of the display. The signal processing module transforms the first detect signal into a first control signal and outputs the first control signal to the controlling module. The controlling module causes digital content to be played on the display. | 2010-11-18 |
20100289555 | CAPACITANCE INTERFACE CIRCUIT - A capacitance interface circuit is provided. An external inductive capacitor is divided into a variable portion and an invariable portion. The capacitance of an internal adjustable capacitor is designed to be equal or close to the fixed capacitance of the external inductive capacitor. The internal adjustable capacitor is used for storing charges having a polarity opposite to that of the invariable portion of the external inductive capacitor in order to neutralize the effect of the invariable portion of the external inductive capacitor. Thus, a charge converter composed of a fully-differential amplifier and feedback capacitors needs only work on the variable portion of the external inductive capacitor, and accordingly the accuracy in subsequent data processing is increased. | 2010-11-18 |
20100289556 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus that generates a voltage by performing a pumping operation in response to an oscillator signal includes a driving voltage detecting unit configured to control the cycle of the oscillator signal in accordance with the level of a driving voltage that is used to perform the pumping operation. | 2010-11-18 |
20100289557 | INTERNAL VOLTAGE GENERATION CIRCUIT - Internal voltage generation circuit including a reference oscillation signal generator for generating a reference oscillation signal according to a comparison result of a pumping voltage with a reference voltage, an oscillation signal generator for generating a plurality of oscillation signals with a predetermined phase difference and a pumping voltage generator for generating a pumping voltage through sequential charge pumping operations performed in response to the plurality of oscillation signals, respectively. | 2010-11-18 |
20100289558 | Booster Circuit, Semiconductor Device, and Electronic Apparatus - A conventional circuit requires a booster circuit for generating a voltage higher than an external power supply voltage, thus low power consumption is difficult to be achieved. In addition, a display device incorporating the aforementioned conventional switching element for booster circuit has problems in that the current load is increased and the power supply becomes unstable with a higher output current. The invention provides a booster circuit including a first transistor, a second transistor, a first capacitor element, a second capacitor element, a diode, and an inverter, wherein one electrode of the first transistor is maintained at a predetermined potential, the output of the inverter is connected to the gate electrode of the first transistor and one electrode of the second transistor through the second capacitor element, the input of the inverter is connected to the other electrode of the first transistor through the first capacitor element and connected to the gate electrode of the second transistor, and the diode is connected between the other electrode of the first transistor and the other electrode of the second transistor so as to be forwardly biased. | 2010-11-18 |
20100289559 | DRAM TUNNELING ACCESS TRANSISTOR - In one embodiment, a first transistor is comprised of a first p+ source region doped in an n-well in the substrate and a first n+ drain region doped on one side at the top of the pillar. A second transistor is comprised of a second p+ source region doped into the second side of the top of the pillar and serially coupled to the top drain region for the first transistor. A second n+ drain region is doped into the substrate adjacent the pillar. Ultra-thin body layer run along each pillar sidewall between their respective active regions. A gate structure is formed along the pillar sidewalls and over the body layers. The transistors operate by electron tunneling from the source valence band to the gate bias-induced n-type channels, along the ultra-thin silicon bodies, thus resulting in a drain current. | 2010-11-18 |
20100289560 | Systems and Methods of Bit Stuffing Pulse Width Modulation - Systems and methods for bit stuffing pulse width modulation are provided. Example embodiments of the systems and methods of bit stuffing pulse width modulation disclosed herein may allow for a significant reduction in the size of the bootstrap capacitor while giving up only a small percentage of output drive, and reduce die space. Included in such systems and methods is the ability to digitally detect inactivity on the PMW signals for a class D power amplifier, and to digitally insert small charge pulses at a fairly low repetition rate relative to the normal switching frequency. The low repetition rate may preserve the maximum output power while still allowing enough charge to transfer to the bootstrap capacitor. | 2010-11-18 |
20100289561 | INTERNAL VOLTAGE GENERATING CIRCUIT CAPABLE OF CONTROLLING SWING WIDTH OF DETECTION SIGNAL IN SEMICONDUCTOR MEMORY APPARATUS - An internal voltage generating circuit capable of controlling a swing width of a detection signal in a semiconductor memory apparatus is provided. The internal voltage generating circuit of a semiconductor memory apparatus includes an internal voltage level detecting unit configured to compare an internal voltage with a target voltage and then generate a detection signal, and an internal voltage level control unit configured to control the internal voltage based on a voltage level of the detection signal, wherein the internal voltage level detecting unit is configured to control a swing width of the detection signal based on a voltage difference between the internal voltage and the target voltage. | 2010-11-18 |
20100289562 | Gate drive device - A gate drive device which can suppress the fluctuation of an internal power source voltage and output voltage, while reducing the number of parts by omitting a bypass capacitor connected in parallel with a semiconductor integrated circuit, is provided. The gate drive device drives the gate of an active element with a large input capacity, such as an IGBT or MOSFET, and includes a semiconductor integrated circuit. The semiconductor integrated circuit has an internal power source based on an external power source, such as a battery. The semiconductor integrated circuit incorporates a voltage drop suppressing circuit, configured so that, if an input external power source voltage momentarily drops below a minimum operating voltage, a drop of an internal power source voltage below the minimum operating voltage, and a sharp drop in a voltage output to the gate, are prevented by the voltage drop suppressing circuit. | 2010-11-18 |
20100289563 | Method and Mechanism to Reduce Current Variation in a Current Reference Branch Circuit - A novel and useful system and method of providing a feedback mechanism to reduce current variation observed in a current reference branch circuit by using body voltage control to compensate process, temperature and supply voltage variations. The current reference output voltage, which is proportional to the reference current, is sampled into a feedback loop, which controls the field effect transistor body voltage. The method and mechanism of the present invention uses Corner Robust Current Reference in order to keep the design simple and diminish variation between Process Voltage Temperature (PVT) corners. This method exhibits superior robustness with smaller variation in the reference current magnitude. | 2010-11-18 |
20100289564 | ELECTRONIC DEVICE AND A METHOD OF BIASING A MOS TRANSISTOR IN AN INTEGRATED CIRCUIT - An electronic device has at least one integrated circuit with at least one MOS transistor. An adaptive analog biasing unit is configured to provide an adaptive biasing current for the at least one MOS transistor biased in the saturation region. The adaptive analog biasing unit (AAB) may be on the same chip together with the integrated circuit and may comprise a process monitor unit configure to extract a device parameter of the integrated circuits and a calculation unit configured to generate a bias current based on the output of the process monitor unit. The bias current generated by the calculation unit may be inversely proportional to the extracted device parameter. | 2010-11-18 |
20100289565 | INTEGRATED CIRCUITS AND METHODS FOR ENABLING HIGH-SPEED AC-COUPLED NETWORKS TO SUPPRESS NOISE DURING LOW-FREQUENCY OPERATION - An alternating-current (AC) coupling integrated circuit (IC) suppresses signal errors introduced by a steady-state input signal. The IC includes an operational amplifier, a true direct-current (DC) bias network, a complimentary DC-bias network and first and second feedback elements. The operational amplifier has an inverting input, a non-inverting input and an output. The true DC-bias network has first and second branches that are coupled to one another and the non-inverting input. The complimentary DC-bias network has third and fourth branches that are coupled to one another and the inverting input. First and second feedback elements generate first and second control signals in response to a characteristic of one of the true input signal and the complimentary input signal. The control signals prevent the voltage at the inputs to the operational amplifier from reaching an equivalent, steady-state, DC-bias voltage. | 2010-11-18 |
20100289566 | Amplitude AC noise filter with universal IEC connection - An AC noise filter designed to filter the small amplitude AC noise of all frequencies by using inline reverse coupled parallel PN semiconductors which offer a high resistance to AC voltages of less than a diode voltage drop. Inline reverse coupled parallel PN semiconductors are used in the AC power line-side as well as in the neutral-line side. For additional AC noise filtering, capacitors are coupled across the AC or DC power source input and at the output to the AC or DC user. For the AC power, IEC connectors are used at the input and output for worldwide use. | 2010-11-18 |
20100289567 | FILTER CIRCUIT AND COMMUNICATION DEVICE - A filter circuit includes a voltage-current conversion portion that converts a voltage signal input to an input terminal to a current signal, a first capacitor unit formed by a plurality of capacitors, and in which a current signal output from the voltage-current conversion portion is sequentially input to the capacitors, the unit adding and outputting electric charges of a group of capacitors to which the current signal is input, a second capacitor unit formed by a plurality of capacitors, and in which a current signal output from the first capacitor unit is sequentially input to the capacitors, the unit adding and outputting electric charges of a group of capacitors to which the current signal is input, and a plurality of connection nodes that respectively connect a given capacitor in the first capacitor unit and a capacitor in the second capacitor unit. | 2010-11-18 |
20100289568 | Low-Noise, Low-Power, Low Drift Offset Correction in Operational and Instrumentation Amplifiers - Low-noise, low-power, low drift offset correction in operational and instrumentation amplifiers and amplifiers using the same are disclosed. The amplifiers disclosed use different combinations of chopping and auto-zero techniques. Also disclosed are amplifiers using on-off switches to affect the chopping and auto-zeroing, with unique circuits for driving the switches on the differential input to provide boot-strapped switch controls. Other features are disclosed. | 2010-11-18 |
20100289569 | Digital hybrid amplifier calibration and compensation method - Methods and hybrid matrix amplifiers are provided. In a method of calibrating a hybrid matrix amplifier of a wireless transceiver, a plurality of signal paths having a digital and an analog portion are toggled such that the analog portion of each of the plurality of signal paths is active only during a corresponding buffer capture interval of a calibration process. The signal paths carry signals to be transmitted by an antenna arrangement. Channel estimates for each of the plurality of signal paths are generated based only on sampling data collected during the corresponding buffer capture interval. The hybrid matrix amplifier is calibrated based on the generated channel estimates. | 2010-11-18 |
20100289570 | AMPLIFIER CIRCUIT, ELECTRONIC DEVICE, METHOD FOR CONFIGURING AN AMPLIFIER CIRCUIT - An electronic circuit comprises one or more upstream stages and two or more downstream stages positioned, in a processing direction of the signals, downstream of the upstream stage. A plurality of configurable connections is present between the upstream stage and the downstream stages. The connections are configurable to provide a predetermined communication path between a respective upstream stage and one or more selected downstream stage selected from the two or more downstream stages and to communicatively disconnect the upstream stage from not selected downstream stages. The electronic circuit may for example be an amplifier circuit. | 2010-11-18 |
20100289571 | APPARATUS AND METHOD FOR MAXIMIZING PERFORMANCE OF PEAKING AMPLIFIER IN DOHERTY AMPLIFIER - An apparatus and method for maximizing the performance of a peaking amplifier in a Doherty amplifier are provided. The apparatus includes a splitter, a carrier amplifier, an (N−1) number of peaking amplifiers, a Doherty combiner, and an output load. The splitter splits an input signal into an ‘N’ number of power signals. The carrier amplifier amplifies the signal provided from the splitter using a first Direct Current (DC) bias. The peaking amplifiers amplify the signals provided from the splitter using a second DC bias, which is lower than the first DC bias. When the carrier amplifier and the peaking amplifiers are all operating, the Doherty combiner forms a load impedance of the respective amplifiers such that the load impedance of the peaking amplifiers are less than the load impedance of the carrier amplifier. The output load outputs the signals amplified by the carrier amplifier and the peaking amplifiers. | 2010-11-18 |
20100289572 | PREDISTORTER, PREDISTORTION METHOD, AND PREDISTORTION SYSTEM - This invention relates to a predistorter, a predistortion method, and a predistortion system. The predistorter comprises a modulus value determining section, for determining a modulus value of an input signal; a base searching section, for searching a predetermined base lookup table in accordance with the modulus value of the input signal, so as to obtain a base lookup table value; an offset searching section, for searching a predetermined offset lookup table in accordance with the modulus value of the input signal, so as to obtain an offset lookup table value; an interpolation factor generating section, for generating an interpolation factor in accordance with the modulus value of the input signal; a multiplying section, for multiplying the offset lookup table value with the interpolation factor; and a summating section, for adding a product obtained by the multiplying section to the base lookup table value, so as to obtain a predistortion value. | 2010-11-18 |
20100289573 | Distributed Mobile Communication Network - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 2010-11-18 |
20100289574 | Signal Pre-Distortion Facility for Amplifier Non-Linearity Compensation - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 2010-11-18 |
20100289575 | Increasing the Density of Larger Magnitude Amplifier Output Samples for Estimating a Model of Digital Pre-Distortion to Compensate for Amplifier Non-Linearity - A digital pre-distortion system which can provide the flexibility to model the highly non-linear distortion associated with High Efficiency RF Power Amplifiers while through a novel implementation of a least squares estimation process allows an implementation well suited for an FPGA application where limited resources and in particular memory resources are available. | 2010-11-18 |
20100289576 | HIGH EFFICIENCY POWER AMPLIFIER POWER ARCHITECTURE - A distributed power converter is for use with an RF power amplifier and includes a primary converter connected to an input voltage and configured to provide a regulated DC intermediate voltage that is galvanically isolated from the input voltage. Additionally, the distributed power converter also includes a secondary regulator connected galvanically to the regulated DC intermediate voltage and configured to generate a regulated DC supply voltage for at least a portion of the RF power amplifier. In another aspect, a method of operating a distributed power converter is for use with an RF power amplifier and includes providing a regulated DC intermediate voltage that is galvanically isolated from an input voltage and generating a regulated DC supply voltage for at least a portion of the RF power amplifier that is galvanically connected to the regulated DC intermediate voltage. | 2010-11-18 |
20100289577 | Cascade Voltage Amplifier and Method of Activating Cascaded Electron Tubes - Disclosed is a cascade voltage amplifier for producing an amplified output in pulse or continuous wave form comprises at least one non-final stage with an electron tube configured as a switching and Class A or C amplifying structure. A final stage comprises an electron tube configured as a Class A or C amplifying structure. The at least one non-final stage and the final stage are connected in series, and the amplified output has a voltage of at least 1000 volts. Further disclosed is a method of activating a plurality of cascaded electron tube stages within a common vacuum enclosure. Beneficially, a sufficient amount of energy supplied to the first stage serially propagates through any intervening stage to the final stage so as to facilitate activation of all tube stages. | 2010-11-18 |
20100289578 | MULTI-BIT CLASS-D POWER AMPLIFIER SYSTEM - Techniques for designing an efficient power amplifier are described. In one aspect, multiple single unit instance class-D power amplifiers with coupled outputs are utilized to increase efficiency and reduce quantization noise. In another aspect, multiple groups of single unit instance class-D power amplifiers are coupled at the outputs thereof with each group of power amplifiers configured to resonate at unique frequency. This results in increased efficiency and reduction of quantization noise at multiple frequencies bands. | 2010-11-18 |