48th week of 2021 patent applcation highlights part 67 |
Patent application number | Title | Published |
20210375270 | METHODS AND SYSTEMS FOR CONFUSION REDUCTION FOR COMPRESSED ACOUSTIC MODELS - Methods and systems are disclosed herein for improvements relating to compressed automatic speech recognition (ASR) systems. The ASR system may comprise a compressed acoustic engine and an adaptive decoder. The adaptive decoder may be dynamically compiled based on characteristics of the compressed acoustic engine and a current state of the application device. In some embodiments, a dynamic command list is used to manage context-specific commands. Two or more commands recognized by the adaptive decoder may be confusable due to compression of the ASR system. Alternate commands may be determined that are semantically equivalent but phonetically different than the confusable commands to reduce classification error of the adaptive decoder. An alternate command may replace one or more of the confusable commands in the adaptive decoder. In some embodiments, a user interface is displayed to a user of the ASR system to select the alternate command for replacement in the decoder. | 2021-12-02 |
20210375271 | SYSTEM FOR INTRODUCING SCALABILITY OF AN ACTION-TOPIC APPROACH TO DERIVING INTENTS FROM UTTERANCES - Methods for mapping intents to utterances using a three-tiered system is provided. Methods may include receiving a plurality of predetermined action-topic pairs and a plurality of predetermined intents. Methods may include mapping the plurality of predetermined action-topic pairs to the plurality of predetermined intents via a one-to-many mapping. Methods may include receiving a linguistic utterance at a first tier of the three-tiered system. Methods may include translating the linguistic utterance at the first tier of the three-tiered system. Methods may include mapping the textual representation to one or more action-topic pairs included in the plurality of action-topic pairs. The mapping may be executed at the second tier of the three-tiered system. Methods may include identifying one or more intents that correlate to the textual representation. The identifying may be executed at the third tier. The identifying may be based on the mapping between the action-topics pairs and the predetermined intents. | 2021-12-02 |
20210375272 | SENTIMENT AWARE VOICE USER INTERFACE - Described herein is a system for responding to a frustrated user with a response determined based on spoken language understanding (SLU) processing of a user input. The system detects user frustration and responds to a repeated user input by confirming an action to be performed or presenting an alternative action, instead of performing the action responsive to the user input. The system also detects poor audio quality of the captured user input, and responds by requesting the user to repeat the user input. The system processes sentiment data and signal quality data to respond to user inputs. | 2021-12-02 |
20210375273 | MACHINE ACTION BASED ON LANGUAGE-INDEPENDENT GRAPH REWRITING OF AN UTTERANCE - An utterance in any of various languages is processed to derive a predicted label using a generated grammar. The grammar is suitable for deriving meaning of utterances from several languages (polyglot). The utterance is processed by an encoder using word embeddings. The encoder and a decoder process the utterance using the polyglot grammar to obtain a machine-readable result. The machine-readable result is well-formed based on accounting for re-entrances of intermediate variable references. A machine then takes action on the machine-readable result. Ambiguity is reduced by the decoder by the well-formed machine-readable result. Sparseness of the generated polyglot grammar is reduced by using a two-pass approach including placeholders which are ultimately replaced by edge labels. | 2021-12-02 |
20210375274 | SPEECH RECOGNITION METHOD AND APPARATUS, AND STORAGE MEDIUM - Embodiments of the present disclosure provide a speech recognition method, a speech recognition apparatus, and a medium. The method includes: obtaining audio signals collected by microphones in at least two sound zones; determining whether each audio signal includes a key speech according to sound energy of the audio signal to acquire a determined result; adjusting an adaptive adjustment parameter of an adaptive filter in each sound zone according to the determined result; controlling the adaptive filter to perform adaptive filtering processing on the audio signal collected in the sound zone corresponding to the adaptive filter according to the adaptive adjustment parameter, and outputting a filtered signal; and performing speech recognition on the filtered signal. | 2021-12-02 |
20210375275 | ELECTRONIC DEVICE, AND METHOD FOR CONTROLLING ELECTRONIC DEVICE - A first electronic device includes an audio outputter; a communicator configured to transmit data to and receive data from a second electronic device; a memory storing one or more instructions; and at least one processor configured to execute the one or more instructions to: obtain an audio output level of an audio that is output through the audio outputter; obtain a spacing distance between the second electronic device and the first electronic device; based on the obtained audio output level and the obtained spacing distance, obtain a voice reception notification indicating whether a voice can be accurately received by the second electronic device, and control the communicator to transmit the obtained voice reception notification to the second electronic device. | 2021-12-02 |
20210375276 | Robust Audio Identification with Interference Cancellation - Audio distortion compensation methods to improve accuracy and efficiency of audio content identification are described. The method is also applicable to speech recognition. Methods to detect the interference from speakers and sources, and distortion to audio from environment and devices, are discussed. Additional methods to detect distortion to the content after performing search and correlation are illustrated. The causes of actual distortion at each client are measured and registered and learnt to generate rules for determining likely distortion and interference sources. The learnt rules are applied at the client, and likely distortions that are detected are compensated or heavily distorted sections are ignored at audio level or signature and feature level based on compute resources available. Further methods to subtract the likely distortions in the query at both audio level and after processing at signature and feature level are described. | 2021-12-02 |
20210375277 | METHODS AND SYSTEMS FOR DETERMINING CHARACTERISTICS OF A DIALOG BETWEEN A COMPUTER AND A USER - A computer-implemented method is disclosed for determining one or more characteristics of a dialog between a computer system and user. The method may comprise receiving a system utterance comprising one or more tokens defining one or more words generated by the computer system; receiving a user utterance comprising one or more tokens defining one or more words uttered by a user in response to the system utterance, the system utterance and the user utterance forming a dialog context; receiving one or more utterance candidates comprising one or more tokens; for each utterance candidate, generating an input sequence combining the one or more tokens of each of the system utterance, the user utterance, and the utterance candidate; and for each utterance candidate, evaluating the generated input sequence with a model to determine a probability that the utterance candidate is relevant to the dialog context. | 2021-12-02 |
20210375278 | SYSTEM AND METHOD FOR PROVIDING A HEALTH CARE RELATED SERVICE - A system for providing a health care service includes a sound detection device, a first environmental sensor, a network accessible platform, and a network communicatively coupling the sound detection device, the first environmental sensor, and the network accessible platform. The network accessible platform is programmed to evaluate a sound data received from the sound detection device and generated by a user and a first sensor data received from the first environmental sensor to determine an abnormal condition associated with the user. The platform then causes an action to be performed by at least one further device coupled to the network accessible platform. The action is an action that was associated with the determined abnormal condition associated with the user. | 2021-12-02 |
20210375279 | ARTIFICIAL INTELLIGENCE DEVICE - An artificial intelligence device may receive first voice data corresponding to first voice uttered by a user from a first peripheral device, acquire a first intention corresponding to the first voice data, transmit a first search result corresponding to the first intention to the first peripheral device, receive second voice data corresponding to second voice uttered by the user from a second peripheral device, acquire a second intention corresponding to the received second voice data, and transmit a search result corresponding to the second intention to the second peripheral device depending on whether the second intention is an interactive intention associated with the first intention. | 2021-12-02 |
20210375280 | SYSTEMS AND METHODS FOR RESPONSE SELECTION IN MULTI-PARTY CONVERSATIONS WITH DYNAMIC TOPIC TRACKING - Embodiments described herein provide a dynamic topic tracking mechanism that tracks how the conversation topics change from one utterance to another and use the tracking information to rank candidate responses. A pre-trained language model may be used for response selection in the multi-party conversations, which consists of two steps: (1) a topic-based pre-training to embed topic information into the language model with self-supervised learning, and (2) a multi-task learning on the pretrained model by jointly training response selection and dynamic topic prediction and disentanglement tasks. | 2021-12-02 |
20210375281 | VOICE CONTROL METHOD AND APPARATUS, AND COMPUTER STORAGE MEDIUM - A voice control method can be applied to a first terminal, and include: receiving a user's voice operation instruction after the first terminal is activated, the voice operation instruction being used for controlling the first terminal to perform a target operation; sending an instruction execution request to a server after the voice operation instruction is received, the instruction execution request being used for requesting the server to determine whether the first terminal is to respond to the voice operation instruction according to device information of the terminal in a device network, wherein the first terminal is located in the device network; and performing the target operation in a case where a response message is received from the server, the response message indicating that the first terminal is to respond to the voice operation instruction. | 2021-12-02 |
20210375282 | DECIMATOR FOR AUDIO SIGNALS - Examples of the disclosure relate to an apparatus that provides a decimator for audio signals. The apparatus comprises means for: receiving one or more audio input signals and applying a multi-stage decimation process to the one or more audio input signals wherein the multi-stage decimation process comprises at least a first branch and a second branch. The apparatus also comprises means for applying audio signal analysis to the one or more audio input signals. The audio signal analysis extracts at least one audio signal parameter from the one or more audio input signals and is performed on the output of the first branch of the multi-stage decimation process. Use of the second branch of the multi-stage decimation process is dependent upon the outcome of the audio signal analysis. | 2021-12-02 |
20210375283 | MOMENT CAPTURING SYSTEM - A vehicle occupant aid system is disclosed. The system may comprise a rearview assembly. Further, the rearview assembly may comprise a button. The system may further comprise one or more data capturing element. Each element may be a microphone, an imager, a location device, and/or a sensor. In some embodiments, a controller may record the data for a predetermined period of time. Further, the controller may transmit information to a remote device based upon initiation of a trigger. The information being based, at least in part, on the data. In other embodiments, the controller may operability record the data in response to a first operation of the button. Further, the controller may transmit information to a remote device based upon a second operation of the button. The information being based, at least in part, on the data recorded between the first and second operations of the button. | 2021-12-02 |
20210375284 | SERVER AND SYSTEM INCLUDING THE SAME - The present disclosure relates to a server and a system including the same. The server according to an embodiment of the present disclosure includes: a communicator configured to perform communication through a network; a storage configured to store data on at least one predetermined word; and a controller configured to: upon receiving an input signal, including data on speech, from a first electronic device through the communicator, determine whether a last part of the speech corresponds to any one of the at least one predetermined word; in response to there being a word corresponding to the last part of the speech among the at least one predetermined word, transmit a first response signal, including data on a response to the speech and data on at least one additional query, to the first electronic device through the communicator; and in response to there being no word corresponding to the last part of the speech among the at least one predetermined word, transmit a second response signal, including data on a response to the speech, to the first electronic device through the communicator. Various other embodiments are also possible. | 2021-12-02 |
20210375285 | METHODS AND APPARATUS FOR DETECTING A VOICE COMMAND - According to some aspects, a method of monitoring an acoustic environment of a mobile device, at least one computer readable medium encoded with instructions that, when executed, perform such a method and/or a mobile device configured to perform such a method is provided. The method comprises receiving acoustic input from the environment of the mobile device while the mobile device is operating in the low power mode, detecting whether the acoustic input includes a voice command based on performing a plurality of processing stages on the acoustic input, wherein at least one of the plurality of processing stages is performed while the mobile device is operating in the low power mode, and using at least one contextual cue to assist in detecting whether the acoustic input includes a voice command. | 2021-12-02 |
20210375286 | METHOD AND SYSTEM FOR PROCESSING A DIALOG BETWEEN AN ELECTRONIC DEVICE AND A USER - A method for processing a dialog between a user and an electronic device, including obtaining, by the electronic device, a voice query of the user; providing, by the electronic device, a voice response for the voice query, the voice response including a plurality of portions; identifying, by the electronic device, an occurrence of at least one event while providing the voice response; and modifying, by the electronic device, the voice response to include information about the at least one event. | 2021-12-02 |
20210375287 | USING STRUCTURED AUDIO OUTPUT TO DETECT PLAYBACK AND/OR TO ADAPT TO MISALIGNED PLAYBACK IN WIRELESS SPEAKERS - Implementations are directed to determining an audio delay, of a computing device, by causing an audio data stream to be transmitted to the computing device via a wireless communication channel. The computing device causes audio output generated using the audio data stream to be rendered via speaker(s). The rendered audio output is captured via microphone(s), and the audio delay determined by comparing the captured audio output with the audio data stream. A delay audio segment can be appended to an additional audio data stream transmitted to the computing device, where the length of the delay audio segment is determined using the audio delay. A noise reduction technique can additionally or alternatively be adapted based on the audio delay. Implementations are additionally or alternatively directed to determining if an audio data stream transmitted to a computing device for rendering through speaker(s) driven by the computing device—is actually being rendered. | 2021-12-02 |
20210375288 | TRANSCRIPTION GENERATION TECHNIQUE SELECTION - A method to transcribe communications may include selecting a first transcription generation technique from among multiple transcription generation techniques for generating transcriptions of audio of one or more communication sessions that involve a user device and obtaining performances of the multiple transcription generation techniques with respect to generating the transcriptions of the audio. The method may also include monitoring comparisons between the performances of the multiple transcription generation techniques and obtaining input from the user with respect to the comparisons. The method may further include selecting a second transcription generation technique from among the multiple transcription generation techniques based on the input from the user. | 2021-12-02 |
20210375289 | AUTOMATED MEETING MINUTES GENERATOR - A transcription of audio speech included in electronic content associated with a meeting is created by an ASR model trained on speech-to-text data. The transcription is post-processed by modifying text included in the transcription, for example, by modifying punctuation, grammar, or formatting introduced by the ASR model and by changing or omitting one or more words that were included in both the audio speech and the transcription. After the transcription is post-processed, output based on the post-processed transcription is generated in the form of a meeting summary and/or template. | 2021-12-02 |
20210375290 | PERSONALIZED VOICES FOR TEXT MESSAGING - Systems and processes for operating an intelligent automated assistant are provided. In one example, a plurality of speech inputs is received from a first user. A voice model is obtained based on the plurality of speech inputs. A user input is received from the first user, the user input corresponding to a request to provide access to the voice model. The voice model is provided to a second electronic device. | 2021-12-02 |
20210375291 | AUTOMATED MEETING MINUTES GENERATION SERVICE - Attributes of electronic content from a meeting are identified and evaluated to determine whether sub-portions of the electronic content should or should not be attributed to a user profile. Upon determining that the sub-portion should be attributed to a user profile, attributes of the sub-portion of electronic content are compared to attributes of stored user profiles. A probability that the sub-portion corresponds to at least one stored user profile is calculated. Based on the calculated probability, the sub-portion is attributed to a stored user profile or a guest user profile. | 2021-12-02 |
20210375292 | METHOD FOR DETERMINING AUDIO CODING/DECODING MODE AND RELATED PRODUCT - A non-transitory computer-readable medium is provided. The non-transitory computer-readable medium having computer instructions stored therein, which when executed by one or more processors, cause the one or more processors to perform operations. The operations comprise: determining a channel combination scheme for a current frame, where the determined channel combination scheme for the current frame is one of a plurality of channel combination schemes; and determining a coding mode of the current frame based on a channel combination scheme for a previous frame and the channel combination scheme for the current frame, where the coding mode of the current frame is one of a plurality of coding modes. | 2021-12-02 |
20210375293 | Downmixer and Method of Downmixing - A downmixer for downmixing a multi-channel signal having at least two channels, includes: a weighting value estimator for estimating band-wise weighting values for the at least two channels; a spectral weighter for weighting spectral domain representations of the at least two channels using the band-wise weighting values; a converter for converting weighted spectral domain representations of the at least two channels into time representations of the at least two channels; and a mixer for mixing the time representations of the at least two channels to obtain a downmix signal. | 2021-12-02 |
20210375294 | INTER-CHANNEL FEATURE EXTRACTION METHOD, AUDIO SEPARATION METHOD AND APPARATUS, AND COMPUTING DEVICE - This application relates to a method of extracting an inter channel feature from a multi-channel multi-sound source mixed audio signal performed at a computing device. The method includes: transforming one channel component of a multi-channel multi-sound source mixed audio signal into a single-channel multi-sound source mixed audio representation in a feature space; performing a two-dimensional dilated convolution on the multi-channel multi-sound source mixed audio signal to extract inter-channel features; performing a feature fusion on the single-channel multi-sound source mixed audio representation and the inter-channel features; estimating respective weights of sound sources in the single-channel multi-sound source mixed audio representation based on a fused multi-channel multi-sound source mixed audio feature; obtaining respective representations of the plurality of sound sources according to the single-channel multi-sound source mixed audio representation and the respective weights; and transforming the respective representations of the sound sources into respective audio signals of the plurality of sound sources. | 2021-12-02 |
20210375295 | AUDIO TRANSMITTER PROCESSOR, AUDIO RECEIVER PROCESSOR AND RELATED METHODS AND COMPUTER PROGRAMS - An audio transmitter processor for generating an error protected frame using encoded audio data of an audio frame, the encoded audio data for the audio frame having a first amount of information units and a second amount of information units, has: a frame builder for building a codeword frame having a codeword raster, wherein the frame builder is configured to determine a border between a first amount of information units and a second amount of information units so that a starting information unit of the second amount of information units coincides with a codeword border; and an error protection coder to obtain a plurality of processed codewords representing the error protected frame. | 2021-12-02 |
20210375296 | Methods, Encoder And Decoder For Linear Predictive Encoding And Decoding Of Sound Signals Upon Transition Between Frames Having Different Sampling Rates - Methods, an encoder and a decoder are configured for transition between frames with different internal sampling rates. Linear predictive (LP) filter parameters are converted from a sampling rate S | 2021-12-02 |
20210375297 | METHODS AND DEVICES FOR GENERATING OR DECODING A BITSTREAM COMPRISING IMMERSIVE AUDIO SIGNALS - The present document describes a method ( | 2021-12-02 |
20210375298 | VOICE PROCESSING METHOD, APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM - Provided in the present disclosure are a voice processing method, an apparatus, an electronic device, and a storage medium, the method comprising: detecting the working state of a current call system, and when the working state is a two-end speaking state or a remote-end speaking state, performing compression processing on a subsequent remote-end voice signal, acquiring a near-end voice signal by means of a microphone, performing echo processing on the basis of the near-end voice signal and the compression-processed remote-end voice signal to obtain an echo-processed near-end voice signal and a remaining echo signal, performing non-linear suppression processing on the near-end voice signal and the remaining echo signal, and performing gain control on the suppression-processed near-end voice signal. | 2021-12-02 |
20210375299 | ANTI-CAUSAL FILTER FOR AUDIO SIGNAL PROCESSING - An audio signal processor includes a digital filter block configured to receive an audio signal and output a first filtered audio signal, and a phase linearization block configured to receive the first filtered audio signal and output a second filtered audio signal with a more linear phase. | 2021-12-02 |
20210375300 | SPEECH INTELLIGIBILITY CALCULATING METHOD, SPEECH INTELLIGIBILITY CALCULATING APPARATUS, AND SPEECH INTELLIGIBILITY CALCULATING PROGRAM - A speech intelligibility calculating method is a method executed by a speech intelligibility calculating apparatus, the speech intelligibility calculating method including: a speech intelligibility calculating step of calculating a speech intelligibility that is an objective assessment index of a speech quality, based on a difference component between features found through an analysis of an input clean speech and an input enhanced speech, using one or more filter banks; and a step of outputting the speech intelligibility calculated at the speech intelligibility calculating step. This speech intelligibility calculating method is capable of calculating a speech intelligibility without any dependency on a speech enhancement method. | 2021-12-02 |
20210375301 | EYEWEAR INCLUDING DIARIZATION - An eyewear device eyewear performing diarization by segmenting spoken language into different speakers and remembering that speaker over the course of a session. The speech of each speaker is translated to text, and the text of each speaker is displayed on an eyewear display. The text of each user has a different attribute such that the eyewear user can distinguish the text of different speakers. Examples of the text attribute can be a text color, font, and font size. The text is displayed on the eyewear display such that it does not substantially obstruct the user's vision. | 2021-12-02 |
20210375302 | DEVICE TO AMPLIFY AND CLARIFY VOICE - A voice enhancing device amplifies and clarifies the voice of a user with hypophonia or other voice issues. The device includes a collar of either rigid or a soft material that is shaped to comfortably sit on the shoulders of the user. One or more microphone arrays are adjustably mounted to the collar to capture audio of the user talking. An electronics module enhances the captured audio signal and generates an enhanced audio signal that drives at least one speaker adjustably attached to the collar. The electronic controller implements one or more of an AGC amplifier to correct amplitude variation in spoked words, adaptive filtering to actively filter out background noise, a variable attack and decay function to improve intelligibility of the spoken words, a diphthong modification function to clarify the spoken words, and an echo cancelation function to reduce echo and feedback in the enhanced audio. | 2021-12-02 |
20210375303 | Natural Ear - Methods and systems for assisting tonally-challenged singers. A microphone can be integrated with a sound reinforcement system used in a live performance. The microphone, which can transduce the performer's voice, can serve multiple purposes such as, for example, to feed input to the natural ear and to the sound reinforcement system. The processed sound of the performer's voice (with fundamental frequency emphasized) can be mixed into the signal fed to a stage “monitor” speaker facing the performer or a headset worn by the performer. | 2021-12-02 |
20210375304 | Method, Apparatus and Systems for Audio Decoding and Encoding - An audio processing system ( | 2021-12-02 |
20210375305 | METHOD AND APPARATUS FOR DETERMINING VEHICLE CLASS BASED UPON AUDIO DATA - A method, apparatus and computer program product are provided to identify the class of vehicle driving over a road surface based upon audio data collected as the vehicle drives thereover. With respect to predicting a class of a vehicle, audio data is obtained that is created by the vehicle while driving over the road surface. The audio data includes one or more audio frequency features and/or one or more audio amplitude features. The audio data including the one or more audio frequency features and/or the one or more audio amplitude features is provided to a machine learning model and the class of the vehicle that created the audio data is predicted utilizing the machine learning model. A method, apparatus and computer program product are also provided for training the machine learning model to predict the class of the vehicle driving over the road surface. | 2021-12-02 |
20210375306 | CONTEXT-AWARE HARDWARE-BASED VOICE ACTIVITY DETECTION - Certain aspects of the present disclosure provide a method for performing voice activity detection, including: receiving audio data from an audio source of an electronic device; generating a plurality of model input features using a hardware-based feature generator based on the received audio data; providing the plurality of model input features to a hardware-based voice activity detection model; receiving an output value from the hardware-based voice activity detection model; and determining a presence of voice activity in the audio data based on the output value. | 2021-12-02 |
20210375307 | MAGNETIC TAPE DEVICE, MAGNETIC TAPE, AND MAGNETIC TAPE CARTRIDGE - A magnetic tape device, in which a magnetic tape is caused to run between a winding reel and a cartridge reel in a state where a tension is applied in a longitudinal direction of the magnetic tape and a maximum value of the tension is 0.50 N or more, the magnetic tape after running in a state where the tension is applied is caused to be wound around the cartridge reel by applying a tension of 0.40 N or less in the longitudinal direction, and a number distribution A of equivalent circle diameters of a plurality of bright areas and a number distribution B of equivalent circle diameters of a plurality of dark areas in a binarized image of a secondary electron image obtained by imaging a surface of the magnetic layer of the magnetic tape with a scanning electron microscope satisfy predetermined number distributions, respectively.w | 2021-12-02 |
20210375308 | MAGNETIC HEAD AND MAGNETIC RECORDING DEVICE - According to one embodiment, a magnetic head includes a shield, a magnetic pole, a first magnetic layer provided between the shield and the magnetic pole, a second magnetic layer provided between the first magnetic layer and the magnetic pole, a third magnetic layer provided between the second magnetic layer and the magnetic pole, a first nonmagnetic layer provided between the shield and the first magnetic layer, a second nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, a third nonmagnetic layer provided between the second magnetic layer and the third magnetic layer, and a fourth nonmagnetic layer provided between the third magnetic layer and the magnetic pole. The first and third nonmagnetic layers include one of Cu, Ag, Au, Al, and Ti. The second and fourth nonmagnetic layers include one of Ta, Pt, Ir, W, Mo, Cr, Tb, Rh, Pd, and Ru. | 2021-12-02 |
20210375309 | MAGNETIC HEAD AND MAGNETIC RECORDING DEVICE - According to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a stacked body provided between the first and second magnetic poles. The stacked body includes a first magnetic member, a second magnetic member provided between the first magnetic member and the second magnetic pole, a first layer provided between the first and second magnetic members, and a second layer provided between the second magnetic member and the second magnetic pole. The first magnetic member includes first magnetic regions and a first nonmagnetic region. The first nonmagnetic region is between the one of the first magnetic regions and the other one of the first magnetic regions. The second magnetic member includes second magnetic regions and a second nonmagnetic region. The second nonmagnetic region is between the one of the second magnetic regions and the other one of the second magnetic regions. | 2021-12-02 |
20210375310 | BASE APPARATUS AND METHODS FOR HEAD ASSEMBLIES OF MAGNETIC STORAGE DEVICES - Aspects of the present disclosure generally relate to a base and related methods for write and read heads. In one example, the base and related methods are used as part of a magnetic storage device, for example a magnetic media drive such as a hard disk drive (HDD) or a magnetic tape drive (e.g., a tape embedded drive). The base includes one or more base bodies formed of a ceramic material. Each base body includes an inward surface, an outward surface opposing the inward surface, a lower surface, and an angled upper surface disposed above the lower surface. Each base body includes a vertical opening extending between the upper surface and the lower surface. In one example, two base bodies are bonded together. In one example, the two base bodies combine to form a single base body of the base that is monolithic and unitary. | 2021-12-02 |
20210375311 | MAGNETIC TAPE, MAGNETIC TAPE CARTRIDGE, AND MAGNETIC TAPE APPARATUS - The magnetic tape includes a non-magnetic support; and a magnetic layer in which the magnetic layer has a timing-based servo pattern, an edge shape of the timing-based servo pattern, specified by magnetic force microscopy is a shape in which a difference between a value L | 2021-12-02 |
20210375312 | MAGNETIC HEAD AND MAGNETIC RECORDING DEVICE - According to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a stacked body provided between the first and second magnetic poles. The stacked body includes a first magnetic layer, a second magnetic layer provided between the first magnetic pole and the first magnetic layer, a third magnetic layer provided between the first magnetic pole and the second magnetic layer, a first nonmagnetic layer provided between the first magnetic layer and the second magnetic pole, a second nonmagnetic layer provided between the second and first magnetic layers, and a third nonmagnetic layer provided between the third and second magnetic layers. The third magnetic layer includes first and second elements. The first and second magnetic layers do not include the second element. Or concentrations of the second element in the first and second magnetic layers are less than in the third magnetic layer. | 2021-12-02 |
20210375313 | MAGNETIC-DISK SUBSTRATE, MAGNETIC DISK, AND MAGNETIC-DISK DRIVE DEVICE - A magnetic-disk substrate has a pair of main surfaces, and an arithmetic average roughness Ra of each of the main surfaces is 0.11 nm or less. The arithmetic average roughness Ra is a value obtained through measurement using an atomic force microscope provided with a probe having a probe tip provided with a carbon nanofiber rod-shaped member. The magnetic-disk substrate is made of glass or aluminum alloy. | 2021-12-02 |
20210375314 | RECORDING DEVICE AND RECORDING METHOD - Provided is a recording device. The recording device includes: an external magnetic field application unit that is configured to apply an external magnetic field to a magnetic recording medium; a light irradiation unit that is configured to irradiate light; and a light focusing unit that is configured to focus the light from the light irradiation unit by resonating the light to generate an enhanced magnetic field in which a magnetic field of the light is enhanced, in which magnetization of the magnetic recording medium is inverted by applying the external magnetic field and the enhanced magnetic field to the magnetic recording medium. | 2021-12-02 |
20210375315 | MAGNETIC TAPE DEVICE, MAGNETIC TAPE, AND MAGNETIC TAPE CARTRIDGE - A magnetic tape device, in which a magnetic tape is caused to run between a winding reel and a cartridge reel in a state where a tension is applied in a longitudinal direction of the magnetic tape and a maximum value of the tension is 0.50 N or more, and the magnetic tape after running in a state where the tension is applied is caused to be wound around the cartridge reel by applying a tension of 0.40 N or less in the longitudinal direction of the magnetic tape, and an adhesive strength of the magnetic layer of the magnetic tape is 1.0 N or more, and an adhesive strength of the back coating layer is 1.0 N or more. | 2021-12-02 |
20210375316 | MAGNETIC TAPE DEVICE, MAGNETIC TAPE, AND MAGNETIC TAPE CARTRIDGE - A magnetic tape device, in which a magnetic tape is caused to run between a winding reel and a cartridge reel in a state where a tension is applied in a longitudinal direction of the magnetic tape and a maximum value of the tension is 0.50 N or more, and the magnetic tape after running in a state where the tension is applied is caused to be wound around the cartridge reel by applying a tension of 0.40 N or less in the longitudinal direction of the magnetic tape, and a residual elongation of the magnetic tape is 0.05% or less. | 2021-12-02 |
20210375317 | NON-CONTACT COMMUNICATION MEDIUM, RECORDING MEDIUM CARTRIDGE, METHOD OF DRIVING NON-CONTACT COMMUNICATION MEDIUM, AND PROGRAM - [Solving Means] A non-contact communication medium according to an embodiment of the present technology includes: a voltage generation unit; a memory unit; a clock signal generation unit; and a control unit. The voltage generation unit includes an antenna coil for transmission/reception, and receives a signal magnetic field from an external device to generate a voltage. The memory unit stores one or more circuit parameters set in the voltage generation unit, and predetermined management information. The clock signal generation unit is configured to be capable of selectively generating clock signals having two or more different frequencies. The control unit is configured to select a frequency of a clock signal to be supplied to the memory unit from the clock signal generation unit. | 2021-12-02 |
20210375318 | MAGNETIC TAPE DEVICE, MAGNETIC TAPE, AND MAGNETIC TAPE CARTRIDGE - A magnetic tape device, in which a magnetic tape is caused to run between a winding reel and a cartridge reel in a state where a tension is applied in a longitudinal direction of the magnetic tape and a maximum value of the tension is 0.50 N or more, and the magnetic tape after running in a state where the tension is applied is caused to be wound around the cartridge reel by applying a tension of 0.40 N or less in the longitudinal direction of the magnetic tape, and a curvature of the magnetic tape in the longitudinal direction is 4 mm/m or less. | 2021-12-02 |
20210375319 | MAGNETIC TAPE DEVICE, MAGNETIC TAPE, AND MAGNETIC TAPE CARTRIDGE - A magnetic tape device, in which a magnetic tape is caused to run between a winding reel and a cartridge reel in a state where a tension is applied in a longitudinal direction of the magnetic tape and a maximum value of the tension is 0.50 N or more, and the magnetic tape after running in a state where the tension is applied is caused to be wound around the cartridge reel by applying a tension of 0.40 N or less in the longitudinal direction of the magnetic tape, and an edge weave amount of a tape edge on at least one side of the magnetic tape is 1.5 μm or less. | 2021-12-02 |
20210375320 | POST CAPTURE EDIT AND DRAFT - Techniques are described herein that enable and assist a user to generate customized video content and alter the video content without altering the customizations. For example, a social networking system may receive, from a user account associated with the social networking system, an input to create video content and add visual customizations to the video content. In some examples, the social networking system may also receive input from the user to alter the video content by altering the length of the video clip and/or adding a second video clip. The social networking system then alters the video content while maintain the previous customizations. The social networking system may then save the altered video content as a draft or share the altered video content to other users on the social networking system. | 2021-12-02 |
20210375321 | VIDEO EDITING METHOD AND INTELLIGENT MOBILE TERMINAL - Disclosed is a video editing method including: acquiring an editing instruction to be executed from a user; calling a template video stored in advance according to the editing instruction, and acquiring a time axis representing duration of the template video; and overlaying the time axis on a progress bar of an editing video to indicate, by a combination of the time axis and the progress bar, a position of the template video in the editing video. A video editing apparatus and a smart mobile terminal are further provided. | 2021-12-02 |
20210375322 | DATA SYNCHRONISATION - The present invention relates to a method and apparatus to synchronise audio and video data. More particularly, the present invention relates to a loop-based audio-visual mixing apparatus and method for synchronising a plurality of videos and their corresponding audio streams to create audio-visual compositions. According to one aspect, there is provided a method for creating a synchronised lineal sequence from multiple inputs of audio and video data, comprising the steps of: providing a first input, comprising audio and video data; providing one or more subsequent inputs, comprising audio and video data; determining at least one rhythm metric unit for each input; queueing the or each subsequent inputs such that the or each subsequent input is triggered at a beginning of a next said rhythm metric unit of a determined input. | 2021-12-02 |
20210375323 | INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD - This information processing apparatus includes displaying video content on a first display region in a display section as a first video, displaying the above-mentioned video content on a second display region in the above-mentioned display section as a second video delayed from the above-mentioned first video by a predetermined time, and setting a first tag inputted by a user into the above-mentioned first video and a second tag inputted by the above-mentioned user into the above-mentioned second video as tags for the above-mentioned video content. | 2021-12-02 |
20210375324 | AUTOMATIC MODIFICATION OF VALUES OF CONTENT ELEMENTS IN A VIDEO - The present disclosure involves systems, software, and computer implemented methods for automatically modifying values of content elements in frames of a video. One example method includes obtaining an input video. A set of elements included in one or more frames of the input video is identified. Metadata is generated for each element in the set of elements. A determination is made that a value for a particular element in the set of elements is targeted for replacement. A replacement value is determined for the particular element and updated metadata is generated. A metadata entry for the particular element is updated to include the determined replacement value. Output content is generated based on the updated metadata the output content is provided for display. | 2021-12-02 |
20210375325 | INTELLIGENT SPORTS VIDEO AND DATA GENERATION FROM AI RECOGNITION EVENTS - An intelligent sports video and data generating system using AI detection engines in Sports Detection Devices, broadcasting commands that incorporate global time stamp information to a plurality of the Sports Detection Devices, such that the recorded sports action data can be time-aligned with video data, wherein an automatically spliced together video or data set can be generated based on the parameters of an input query. | 2021-12-02 |
20210375326 | METHOD, DEVICE, AND COMPUTER PROGRAM PRODUCT FOR STORING AND PROVIDING VIDEO - Embodiments of the present disclosure relate to a method, a device, and a computer program product for storing and providing a video. A method for storing a video is provided, including: acquiring frame storage information in a to-be-stored video, the frame storage information including information related to storage of a plurality of frames in the video; converting the video into a plurality of data blocks based on the frame storage information; and converting the frame storage information into a streaming media index file to characterize the video in association with the plurality of data blocks. Embodiments of the present disclosure further provide a method for providing a video. | 2021-12-02 |
20210375327 | SUPPORT ASSEMBLY - The disclosure provides a support assembly including a tray, a hard disk drive chassis and two engagement components. The hard disk drive chassis is placed on the tray. The hard disk drive chassis includes a bottom part, a first and a second side part. The first and the second side part are connected to two opposite sides of the bottom part and located close to two vertical walls of the tray. The hard disk drive chassis can accommodate a hard disk drive. The elastic engagement components are respectively disposed on the first and the second side part. The hard disk drive chassis is movable between an engaged position and a released position. When the hard disk drive chassis is moved from the released position to the engaged position, the elastic engagement components are respectively pressed by the vertical walls so as to engage with the hard disk drive. | 2021-12-02 |
20210375328 | Chips And Electronics Devices - The disclosed chip includes a storage module, pins, a control module, a first connection and a second connection. The storage module includes a first and a second storage array groups, which respectively include a plurality of first storage arrays and a plurality of second storage arrays. The pins are located on the side of the first storage array group away from the second storage array group. The control module is located between the first storage array group and the second storage array group. The first connection pin connects to the control module; and the second connection connects the control module to the first and the second storage array groups. The first connection line has a length less than the distance from the control module to the second storage array group at far side of the control module. The chip reduces the parasitic capacitance introduced by the first connection. | 2021-12-02 |
20210375329 | WORD LINE LEAD-OUT STRUCTURE AND METHOD FOR PREPARING SAME - The present application relates to a word line lead-out structure and a method for preparing the same. A word line extending along an X-axis direction is formed on a substrate. A contact hole covering the word line along a Y-axis direction is formed, the X-axis direction being perpendicular to the Y-axis direction. A metal line covering the contact hole is formed, the contact hole being located between the word line and the metal line and being contacted with the word line and the metal line. The contact area between the contact hole and the metal line is larger than that between the contact hole and the word line. | 2021-12-02 |
20210375330 | Memory Cell Device and Method for Operating a Memory Cell Device - In accordance with an embodiment, a memory cell device includes at least one memory cell; a first switch connected between the at least one memory cell and a reference potential node; a second switch connected between the at least one memory cell and the reference potential node, and switch driver logic adapted to put the first switch selectively into one of at least three operating states by activation or deactivation of a first subcircuit of the switch driver logic, wherein the at least three operating states comprises an on state, an off state, and a conductive state in which an electrical conductivity of the first switch is lower than in the on state and higher than in the off state, and put the second switch selectively into one of the at least three operating states by activation or deactivation of a second subcircuit of the switch driver logic. | 2021-12-02 |
20210375331 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE - A semiconductor device may include a sudden power detection circuit and an operation circuit. The sudden power detection circuit may generate a power-off control signal in a sudden power-off state. The operation circuit may discharge a specific node based on the power-off control signal. | 2021-12-02 |
20210375332 | COMMAND TRIGGERED POWER GATING FOR A MEMORY DEVICE - Methods, systems, and devices for command triggered power gating for a memory device are described. Row logic circuitry for a memory array may be powered up (on) or powered down (off) independent of at least some other components of a memory device. For example, the row logic circuitry may be on when a bank of the memory array is an active state but may be off when the bank is in a stand-by or power-down state. Additionally or alternatively, error correction circuitry for a memory array may be powered up (on) or powered down (off) independent of at least some other components of a memory device. For example, the error correction circuitry may be on during an access portion of an access sequence but may otherwise be off. | 2021-12-02 |
20210375333 | MEMORY CIRCUIT ARRANGEMENT FOR ACCURATE AND SECURE READ - The present disclosure is directed to arranging user data memory cells and test memory cells in a configurable memory array that can perform both differential and single ended read operations during memory start-up and normal memory use, respectively. Different arrangements of the user data memory cells and the test memory cells in the memory array result in increased effectiveness of memory array, in terms of area optimization, memory read accuracy and encryption for data security. | 2021-12-02 |
20210375334 | ELECTRONIC DEVICES FOR EXECUTING A WRITE OPERATION - An electronic device includes an operation control circuit and an input data generation circuit. The operation control circuit generates a detection signal and an internal masking signal based on a masking signal and data during a write operation. The input data generation circuit converts input data based on the internal masking signal to generate converted data. In addition, the input data generation circuit selects and outputs either the converted data or drive data as the input data, which are input to a data storage circuit, based on the detection signal. | 2021-12-02 |
20210375335 | DATA WRITING METHOD AND APPARATUS - The present application is applicable to the field of integrated circuit technology, and provides a data writing method, system, apparatus, device and medium for an integrated circuit chip. The data writing method is applied to a writer, the integrated circuit chip is electrically connected with the writer through a power-supply positive terminal and a power-supply negative terminal, and the data writing method includes: sending a data writing order to the integrated circuit chip, where the data writing order is configured to instruct the integrated circuit chip to enter a data writing mode after receiving the data writing order; and performing data writing to the integrated circuit chip by controlling an electrical parameter of an input voltage of the power-supply positive terminal or the power-supply negative terminal of the integrated circuit chip after the integrated circuit chip enters the data writing mode. | 2021-12-02 |
20210375336 | ELECTRONIC DEVICE TO PERFORM READ OPERATION AND MODE REGISTER READ OPERATION - An electronic device may include: a column control circuit configured to generate a column control pulse and a mode register enable signal, each with a pulse that is generated based on logic levels of a chip selection signal and a command address; and a control circuit configured to generate a read control signal to perform a read operation and a mode register read operation by delaying the column control pulse based on a logic level of the mode register enable signal and configured to generate a mode register control signal to perform the mode register read operation by delaying the column control pulse based on a logic level of the mode register enable signal. | 2021-12-02 |
20210375337 | MEMORY SYSTEM, MEMORY CHIP, AND CONTROLLER - A memory system includes a memory chip, one or more signal lines including a first signal line, and a controller. The controller is connected to the memory chip via the one or more signal lines. The controller is configured to transmit and receive signals via the first signal line in accordance with a first standard under which voltages of communicated signals transition in a first range and with a second standard under which voltages of communicated signals transition in a second range narrower than the first range. The controller is configured to transmit a command to the memory chip via the first signal line in accordance with the first standard, and based on a response to the command from the memory chip, enable communication in accordance with the second standard. | 2021-12-02 |
20210375338 | Pre-Charge Ramp Rate Control For Peak Current Based On Data Latch Count - Aspects of a storage device including a memory and a controller are provided which allow for reduction of current during program operations using pre-charge ramp rate control based on an inhibit bit line count acquired from data latches. When the inhibit bit line count is within a bit line count range, the controller pre-charges bit lines in memory at a first ramp rate to a first target voltage, and when the inhibit bit line count is outside the bit line count range, the controller pre-charges the bit lines at a second, faster ramp rate to a second, smaller target voltage. The inhibit bit line count may increase throughout a program operation, and the bit line count range may be configured for the middle of the program operation where current is typically high. Thus, a balance in power consumption and performance may be achieved during program operations using ramp rate control. | 2021-12-02 |
20210375339 | PRE-CHARGE TIMING CONTROL FOR PEAK CURRENT BASED ON DATA LATCH COUNT - Aspects of a storage device including a memory and a controller are provided which allow for reduction of current during program operations using pre-charge timing control based on an inhibit bit line count acquired from data latches. When the inhibit bit line count is within a bit line count range, the controller pre-charges bit lines in memory during a first time period to a first target voltage, and when the inhibit bit line count is outside the bit line count range, the controller pre-charges the bit lines during a second, earlier time period to a second, smaller target voltage. The controller is thus configured to reduce current and minimize operation overlaps in the earlier time period during the middle of the program operation where current is highest. Thus, a balance in power consumption and performance may be achieved during program operations using timing control. | 2021-12-02 |
20210375340 | MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD - A memory device includes a bit line, a source line, a plurality of word lines, and a memory cell. The memory cell includes a plurality of memory strings coupled in parallel between the bit line and the source line. Each of the plurality of memory strings includes a plurality of memory elements coupled in series between the bit line and the source line, and electrically coupled correspondingly to the plurality of word lines. | 2021-12-02 |
20210375341 | Phase-Aware DDR Command Dynamic Scheduling - A method for performing phase aware dynamic scheduling of a plurality of double data rate (DDR) commands includes determining a ratio of a frequency of DDR controller clock to a frequency of a DDR clock. The method includes determining a number of clock cycles of the DDR clock required for each DDR command of the plurality of DDR commands. The method includes, based on the ratio of the frequency of the DDR controller clock to the frequency of the DDR clock and the number of clock cycles of the DDR clock required for each DDR command, determining a sequence of the plurality of DDR commands according to a priority corresponding to the each DDR command, and transmitting the plurality of DDR commands to DDR devices over one or more clock cycles of the DDR controller clock according to the determined sequence of the plurality of DDR commands. | 2021-12-02 |
20210375342 | STACKED MAGNETORESISTIVE STRUCTURES AND METHODS THEREFOR - Aspects of the present disclosure are directed to magnetic tunnel junction (MTJ) structures comprising multiple MTJ bits connected in series. For example, a magnetic tunnel junction (MTJ) stack according to the present disclosure may include at least a first MTJ bit and a second MTJ bit stacked above the first MTJ bit, and a resistance state of the MTJ stack may be read by passing a single read current through both the first MTJ bit and the second MTJ bit. | 2021-12-02 |
20210375343 | Novel Free Layer Structure in Magnetic Random Access Memory (MRAM) for Mo or W Perpendicular Magnetic Anisotropy (PMA) Enhancing Layer - A perpendicularly magnetized magnetic tunnel junction (p-MTJ) is disclosed wherein a free layer (FL) has a first interface with a MgO tunnel barrier, a second interface with a Mo or W Hk enhancing layer, and is comprised of Fe | 2021-12-02 |
20210375344 | MEMORY CELL AND METHOD OF OPERATING THE SAME - A memory cell includes a write bit line, a write transistor and a read transistor. The write transistor is coupled between the write bit line and a first node. The read transistor is coupled to the write transistor by the first node. The read transistor includes a ferroelectric layer. The write transistor is configured to set a stored data value of the memory cell by a write bit line signal that adjusts a polarization state of the read transistor. The polarization state corresponds to the stored data value. | 2021-12-02 |
20210375345 | MEMORY CIRCUIT AND WRITE METHOD - A memory circuit includes a memory array including a plurality of memory cells, each memory cell including a gate structure including a ferroelectric layer and a channel layer adjacent to the gate structure, the channel layer including a metal oxide material. A driver circuit is configured to output a gate voltage to the gate structure of a memory cell, the gate voltage having a positive polarity and a first magnitude in in a first write operation and a negative polarity and a second magnitude in in a second write operation, and to control the second magnitude to be greater than the first magnitude. | 2021-12-02 |
20210375346 | SEMICONDUCTOR MEMORY DEVICE INCLUDING ADDRESS GENERATION CIRCUIT AND OPERATING METHOD THEREOF - A semiconductor memory device includes a cell array including a plurality of word lines; a plurality of address storing circuits suitable for sequentially storing a sampling address as one of a plurality of latch addresses, and sequentially outputting each of the latch addresses as a target address according to a refresh command; a duplication decision circuit suitable for preventing the sampling address from being stored in the address storing circuits when the sampling address is identical to any of the latch addresses stored in the address storing circuits; and a row control circuit suitable for refreshing one or more word lines based on the target address in response to the refresh command. | 2021-12-02 |
20210375347 | MEMORY SYSTEM AND OPERATING METHOD OF THE SAME - A memory system is provided. The memory system includes a memory device having a plurality of memory cells; and a memory controller configured to control the memory device to: store write data in first memory cells from among the plurality of memory cells, identify a current charge amount of a first cell string including at least one of the first memory cells and a current charge amount of a second cell string adjacent to the first cell string, and store dummy data in at least one memory cell connected to the first cell string or the second cell string based on the current charge amount of the first cell string and the current charge amount of the second cell string. | 2021-12-02 |
20210375348 | SYSTEMS AND METHODS FOR CAPTURE AND REPLACEMENT OF HAMMERED WORD LINE ADDRESS - A memory device includes at least one memory bank comprising a set of redundant word lines, a set of normal word lines, and row hammer refresh logic. The RHR logic comprises a first input to receive a first signal indicative of whether a match was generated at a fuse of the memory device, a second input to receive a redundant row address corresponding to a first location of a memory array of the memory device, a third input to receive a word line address corresponding to a second location of the memory array of the memory device. The RHR logic also comprises an output to transmit at least one first memory address adjacent to the first location or at least one second memory address adjacent to the second location based on a value of the first signal. | 2021-12-02 |
20210375349 | MULTI-STAGE VOLTAGE CONTROL FOR PEAK AND AVERAGE CURRENT REDUCTION OF OPEN BLOCKS - Aspects of a storage device including a memory and a controller are provided which allow for reduction of current in open blocks during read operations using multi-stage read voltage control. The controller determines whether a block is open or closed. If the block is closed, the controller causes a read voltage to be applied to one of the block's word lines. If the block is open, the controller causes a read voltage to be applied to another of the block's word lines in a number of stages. The controller further causes a read voltage to be applied to another word line of the open block in a different number of stages. Thus, read voltages for open blocks may ramp in multiple stages in contrast to read voltages for closed blocks, as well as ramp in different numbers of stages for different word lines in open blocks. | 2021-12-02 |
20210375350 | Systems and Methods for Performing Dynamic On-Chip Calibration of Memory Control Signals - Systems and methods of dynamically calibrating memory control signals during increase of wordline voltage for memory technologies subject to charge loss are disclosed. In one aspect, an exemplary method may comprise using an internal node, such as a wordline regulator output or return feedback line or a replica of the wordline, as proxy for the local wordline voltage. In one or more further embodiments, the proxy signal may be converted to digital signal or code and even determined in the background before the signal is needed for calibration. As a function of the disclosed technology, calibration of memory control signals, such as pass voltage and wordline read-verify voltage, may be performed during increase of the wordlines voltage with no impact or penalty on read/program time. | 2021-12-02 |
20210375351 | Memory System Topologies Including A Memory Die Stack - Systems, among other embodiments, include topologies (data and/or control/address information) between an integrated circuit buffer device (that may be coupled to a master, such as a memory controller) and a plurality of integrated circuit memory devices. For example, data may be provided between the plurality of integrated circuit memory devices and the integrated circuit buffer device using separate segmented (or point-to-point link) signal paths in response to control/address information provided from the integrated circuit buffer device to the plurality of integrated circuit buffer devices using a single fly-by (or bus) signal path. An integrated circuit buffer device enables configurable effective memory organization of the plurality of integrated circuit memory devices. The memory organization represented by the integrated circuit buffer device to a memory controller may be different than the actual memory organization behind or coupled to the integrated circuit buffer device. The buffer device segments and merges the data transferred between the memory controller that expects a particular memory organization and actual memory organization. | 2021-12-02 |
20210375352 | MEMORY CIRCUIT AND WRITE METHOD - A memory circuit includes a memory array and a control circuit. A first column of the memory array includes a select line, first and second bit lines, a first subset of memory cells coupled to the select line and the first bit line, and a second subset of memory cells coupled to the select line and the second bit line. The control circuit is configured to simultaneously activate each of the select line and the first bit line and, during a period in which the select line and first bit line are simultaneously activated, activate a first plurality of word lines, each word line of the first plurality of word lines being coupled to a memory cell of the first subset of memory cells. | 2021-12-02 |
20210375353 | PERFORMING IN-MEMORY COMPUTING BASED ON MULTIPLY-ACCUMULATE OPERATIONS USING NON-VOLATILE MEMORY ARRAYS - A memory device includes: a memory array including a plurality of memory cells and a plurality of bit lines; and a current converting circuit, coupled to the memory array. In executing a calculation operation, the memory cells of the memory array generate a source current corresponding to a calculation operation result. The source current is converted by the current converting circuit into an output value for being an input signal provided to a next calculation operation. | 2021-12-02 |
20210375354 | DATA DESTRUCTION - A block of dynamic memory in a DRAM device is organized to share a common set of bitlines may be erased/destroyed/randomized by concurrently activating multiple (or all) of the wordlines of the block. The data held in the sense amplifiers and cells of an active wordline may be erased by precharging the sense amplifiers and then writing precharge voltages into the cells of the open row. Rows are selectively configured to either be refreshed or not refreshed. The rows that are not refreshed will, after a time, lose their contents thereby reducing the time interval for attack. An external signal can cause the isolation of a memory device or module and initiation of automatic erasure of the memory contents of the device or module using one of the methods disclosed herein. The trigger for the external signal may be one or more of temperature changes/conditions, loss of power, and/or external commands from a controller. | 2021-12-02 |
20210375355 | Circuit in Memory Device for Parasitic Resistance Reduction - A memory device includes a plurality of memory cells located in a first region of the memory device. The memory cells include a first signal line, a first circuit located in the first region of the memory device, and a plurality of logic circuits located in a second region of the memory device. The second region and the first region have different design rules. The first circuit is configured to be selectively enabled and disabled. When the first circuit is enabled, the first signal line is electrically coupled in parallel with a second signal line. | 2021-12-02 |
20210375356 | SYSTEMS AND METHODS TO STORE MULTI-LEVEL DATA - Disclosed herein are related to a memory system and a method of operating the memory system. In one aspect, resistances of a first memory cell, a second memory cell, a third memory cell, and a fourth memory cell are individually set. In one aspect, the first memory cell and the second memory cell are coupled to each other in series between a first line and a second line, and the third memory cell and the fourth memory cell are coupled to each other in series between the second line and a third line. In one aspect, current through the second line according to a parallel resistance of i) a first series resistance of the first memory cell and the second memory cell, and ii) a second series resistance of the third memory cell and the fourth memory cell is sensed. According to the sensed current, multi-level data can be read. | 2021-12-02 |
20210375357 | DATA MANAGEMENT METHOD FOR MEMORY AND MEMORY APPARATUS USING THE SAME - A data management method for a memory is provided. The memory includes memory pages. Each of the memory pages includes memory cells. A data update command corresponding to a logical address is received. The logical address maps to a physical address of a target memory page before receiving the data update command. First and second reading voltages are applied to obtain at least a first and a second target memory cell to be sanitized in the target memory page of the memory pages, a first programming voltage is applied to change the logical state of the first target memory cell to a logical state with a higher threshold voltage, and a second programming voltage is applied to change the logical state of the second target memory cell to a logical state with a higher threshold voltage. The first programming voltage is different from the second programming voltage. | 2021-12-02 |
20210375358 | NON-VOLATILE MEMORY DIE WITH DEEP LEARNING NEURAL NETWORK - Exemplary methods and apparatus are provided for implementing a deep learning accelerator (DLA) or other neural network components within the die of a non-volatile memory (NVM) apparatus using, for example, under-the-array circuit components within the die. Some aspects disclosed herein relate to configuring the under-the-array components to implement feedforward DLA operations. Other aspects relate to backpropagation operations. Still other aspects relate to using an NAND-based on-chip copy with update function to facilitate updating synaptic weights of a neural network stored on a die. Other aspects disclosed herein relate to configuring a solid state device (SSD) controller for use with the NVM. In some aspects, the SSD controller includes flash translation layer (FTL) tables configured specifically for use with neural network data stored in the NVM. | 2021-12-02 |
20210375359 | MEMORY DEVICE INCLUDING A PLURALITY OF STACKED MEMORY CELLS - A memory device may include a bank layer and a control circuit layer. The bank layer may be arranged on a semiconductor substrate. The bank layer may include a plurality of mats. Each of the mats may include a plurality of stacked decks. Each of the decks may include a plurality of memory cells. The control circuit layer may be arranged between the semiconductor substrate and the bank layer. The control circuit layer may include a plurality of control circuit regions corresponding to the mats, respectively. The stacked decks may include a plurality of stacked word lines and a plurality of stacked bit lines intersected with the stacked word lines. A word line decoder, for controlling the word lines, and a bit line decoder, for controlling the bit lines, may be alternately and repeatedly arranged in the control circuit layer. | 2021-12-02 |
20210375360 | MULTI-LEVEL CELL THRESHOLD VOLTAGE OPERATION OF ONE-SELECTOR-ONE-RESISTOR STRUCTURE INCLUDED IN A CROSSBAR ARRAY - A multi-level cell (MLC) one-selector-one-resistor (1S1R) three-dimensional (3D) cross-point memory system includes at least one MLC 1S1R structure including a stacked arrangement of a phase change memory (PCM) cell and a threshold switch selector. An electrically conductive bit line is in electrical communication with the OTS selector, and an electrically conductive word line is in electrical communication with the PCM cell. A controller is in electrical communication with the bit line and the word line. The controller is configured to select at least one voltage pulse from a group of different voltage pulses comprising a read pulse, a partial set pulse, a set pulse, a partial reset pulse, and a reset pulse, and configured to deliver the selected at least one voltage pulse to the at least one MLC 1S1R structure. | 2021-12-02 |
20210375361 | SELECTIVE PIXEL OUTPUT - In one embodiment, a computing system may write pixel values into a buffer in a tile order. Each writing operation may write a block of pixel values into two memory units. The first memory unit may receive a first half of the block of pixel values. The second memory unit may receive a second half of the block of the pixel values. The system may read a subset of pixel values from the buffer in a pixel row order. Each reading operation may read a second block of pixel values from the two memory units of the buffer. The first memory unit may provide a first half of the second block of pixel values. The second memory unit may provide a second half of the second block of pixel values. The system may output the subset of pixel values read from the buffer via an output data bus. | 2021-12-02 |
20210375362 | SEMICONDUCTOR DEVICE - A semiconductor device includes a plurality of memory cells connected to a match line; a word line driver connected to a word line; a valid cell configured to store a valid bit indicating valid or invalid of an entry; a first precharge circuit connected to one end of the match line and configured to precharge the match line to a high level; and a second precharge circuit connected to the other end of the match line and configured to precharge the match line to a high level. The plurality of memory cells are arranged between the first precharge circuit and the second precharge circuit, and the second precharge circuit is arranged between the word line driver and the plurality of memory cells. | 2021-12-02 |
20210375363 | MEMORY DEVICE AND METHOD OF OPERATION - A memory device includes a column of at least three memory cells and a source line coupled to the source terminal of each memory cell. A source line driver is coupled to the source line, a voltage terminal, and a program voltage source and is switchable between a program operation, an erase operation, and a read operation. | 2021-12-02 |
20210375364 | ADJUSTMENT OF A STARTING VOLTAGE CORRESPONDING TO A PROGRAM OPERATION IN A MEMORY SUB-SYSTEM - A processing device determines a measured slope value of a portion of a programming voltage distribution of memory cells of a memory sub-system. The measured slope value of the portion of the programming voltage distribution is compared to a threshold slope value to generate a comparison result. An adjusted program voltage level is determined in view of the comparison result. A programming process is executed using the adjusted program voltage level as a starting voltage level. | 2021-12-02 |
20210375365 | MEMORY DEVICE AND OPERATING METHOD THEREOF - A memory device includes a cell string, a peripheral circuit and a control logic. The cell string includes a select transistor and a plurality of memory cells, and further includes a plurality of dummy cells, wherein the plurality of dummy cells are coupled in series between the select transistor and the plurality of memory cells. The peripheral circuit configured to perform a dummy program operation on the plurality of dummy cells. The control logic configured to perform the peripheral circuit so that the plurality of dummy cells have different threshold voltage distributions during the dummy program operation. | 2021-12-02 |
20210375366 | NON-VOLATILE MEMORY DEVICE AND PROGRAMMING METHOD THEREOF - A non-volatile memory device includes: a memory cell array including a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a row decoder configured to selectively control the plurality of word lines, a page buffer including a plurality of latches corresponding to the plurality of bit lines, respectively, and a control circuit configured to control the non-volatile memory device to enter a suspend state after terminating a verify operation of a program loop of a program operation of the plurality of memory cells in response to a suspend request being generated during an execution operation of the program loop. | 2021-12-02 |
20210375367 | SEMICONDUCTOR DEVICE AND READING METHOD THEREOF - A semiconductor device that can compensate for threshold fluctuations in memory cells using capacitive coupling. The flash memory includes a NAND-type memory cell array, a programing device, a reading device, and an offset voltage determining unit. The programing device programs the memory cells connected to a selected word line. The reading device reads the memory cells connected to a selected word line. The programing device programs the memory cells of a monitoring NAND string simultaneously when programing a word line. The reading device comprises a current detecting unit applying a read voltage to an unselected word line n+1, and to detecting the current of the monitoring NAND string. The offset voltage determining unit determines the first and second offset voltage based on the detected current, and a reading pass voltage is applied to the unselected word line, a read voltage is applied to the selected word line. | 2021-12-02 |
20210375368 | METHOD AND APPARATUS FOR DATA ERASE IN MEMORY DEVICES - Aspects of the disclosure provide a method for data erase in a memory device. The method includes providing first erase carriers from a body portion for the memory cell string, during an erase operation in a memory cell string. The first erase carriers flow in a first direction from a source side of the memory cell string to a drain side of the memory cell string. Further, the method includes providing second erase carriers from a junction at the drain side of the memory cell string. The second erase carriers flow in a second direction from the drain side of the memory cell string to the source side of the memory cell string. Then, the method includes injecting the first erase carriers and the second erase carriers to charge storage portions of the memory cells in the memory cell string. | 2021-12-02 |
20210375369 | FLASH MEMORY DEVICE AND BIT LINE CHARGING METHOD THEREOF - A flash memory device includes a memory string, a selection switch, a first power source and a second power source. The memory string has a plurality of memory cells. A first memory cell in the memory string is coupled to a first word line, and the first word line is selected to be a programmed word line and the first memory cell is selected to be an inhibited cell, during a first time period, the selection switch is turned on according to a selection signal, and the first power source pulls up voltages on the global bit line and the local bit line to a first voltage. During a second time period, the selection switch is turned-off according to the selection signal, a word line voltage on the first word line is pulled up to pump up the voltage on the local bit line to a second voltage. | 2021-12-02 |