49th week of 2017 patent applcation highlights part 51 |
Patent application number | Title | Published |
20170352526 | REFLECTRON-ELECTROMAGNETOSTATIC CELL FOR ECD FRAGMENTATION IN MASS SPECTROMETERS | 2017-12-07 |
20170352527 | TIME OF FLIGHT MASS SPECTROMETER | 2017-12-07 |
20170352528 | Apparatus and method for static gas mass spectrometry | 2017-12-07 |
20170352529 | MASS SPECTROMETRY ANALYSIS OF BIOMOLECULES BY MULTIPLE CHARGE STATE SELECTION USING A CONCURRENT PRECURSOR ISOLATION TECHNIQUE | 2017-12-07 |
20170352530 | ION INJECTION TO AN ELECTROSTATIC TRAP | 2017-12-07 |
20170352531 | APPARATUS AND METHOD FOR SELECTIVE DEPOSITION | 2017-12-07 |
20170352532 | INTEGRATED CIRCUIT DIE HAVING REDUCED DEFECT GROUP III-NITRIDE LAYER AND METHODS ASSOCIATED THEREWITH | 2017-12-07 |
20170352533 | DEPOSITION OF ORGANIC FILMS | 2017-12-07 |
20170352534 | ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE | 2017-12-07 |
20170352535 | METHOD OF PRODUCING AN OPTOELECTRONIC SEMICONDUCTOR CHIP AND OPTOELECTRONIC SEMICONDUCTOR CHIP | 2017-12-07 |
20170352536 | A METHOD OF EPITAXIAL GROWTH OF A MATERIAL INTERFACE BETWEEN GROUP III-V MATERIALS AND SILICON WAFERS PROVIDING COUNTERBALANCING OF RESIDUAL STRAINS | 2017-12-07 |
20170352537 | EPITAXIAL SUBSTRATE FOR ELECTRONIC DEVICES, ELECTRONIC DEVICE, METHOD FOR PRODUCING THE EPITAXIAL SUBSTRATE FOR ELECTRONIC DEVICES, AND METHOD FOR PRODUCING THE ELECTRONIC DEVICE | 2017-12-07 |
20170352538 | Systems and Methods for Fabricating Single-Crystalline Diamond Membranes | 2017-12-07 |
20170352539 | MATERIAL HAVING SINGLE CRYSTAL PEROVSKITE, DEVICE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF | 2017-12-07 |
20170352540 | SPUTTERING APPARATUS, SPUTTERING TARGET, AND METHOD FOR FORMING SEMICONDUCTOR FILM WITH THE SPUTTERING APPARATUS | 2017-12-07 |
20170352541 | METHOD FOR FABRICATING A FIN FIELD EFFECT TRANSISTOR (FINFET) | 2017-12-07 |
20170352542 | NANOSCALE WIRES WITH TIP-LOCALIZED JUNCTIONS | 2017-12-07 |
20170352543 | COMPOSITION FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING THE COMPOSITION | 2017-12-07 |
20170352544 | WAFER COOLING METHOD | 2017-12-07 |
20170352545 | METHOD OF PRODUCING SEMICONDUCTOR EPITAXIAL WAFER AND METHOD OF PRODUCING SOLID-STATE IMAGE SENSOR | 2017-12-07 |
20170352546 | METHOD OF ETCHING SEMICONDUCTOR STRUCTURES WITH ETCH GAS | 2017-12-07 |
20170352547 | DELAY-ETCHING MEMBER AND DISPLAY PANEL ETCHING METHOD BY MEANS OF SAME | 2017-12-07 |
20170352548 | CMP-FRIENDLY COATINGS FOR PLANAR RECESSING OR REMOVING OF VARIABLE-HEIGHT LAYERS | 2017-12-07 |
20170352549 | VAPOR PHASE ETCHING OF HAFNIA AND ZIRCONIA | 2017-12-07 |
20170352550 | DEPOSITION OF ORGANIC FILMS | 2017-12-07 |
20170352551 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-12-07 |
20170352552 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2017-12-07 |
20170352553 | ARTICLES AND METHODS OF FORMING VIAS IN SUBSTRATES | 2017-12-07 |
20170352554 | SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A METHOD OF MANUFACTURING THE SAME | 2017-12-07 |
20170352555 | SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A METHOD OF MANUFACTURING THE SAME | 2017-12-07 |
20170352556 | SUBSTRATE-PROCESSING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2017-12-07 |
20170352557 | METHOD FOR WAFER OUTGASSING CONTROL | 2017-12-07 |
20170352558 | ROTARY PLASMA ELECTRICAL FEEDTHROUGH | 2017-12-07 |
20170352559 | FLUORINE CONTAMINATION CONTROL IN SEMICONDUCTOR MANUFACTURING PROCESS | 2017-12-07 |
20170352560 | SUBSTRATE PROCESSING METHOD | 2017-12-07 |
20170352561 | METHOD FOR LAMINATING GLASS PANELS AND VACUUM LAMINATION DEVICE USING SAME | 2017-12-07 |
20170352562 | DODECADON TRANSFER CHAMBER AND PROCESSING SYSTEM HAVING THE SAME | 2017-12-07 |
20170352563 | SYSTEMS AND METHODS FOR WAFER ALIGNMENT | 2017-12-07 |
20170352564 | SEMICONDUCTOR METHOD AND ASSOCIATED APPARATUS | 2017-12-07 |
20170352565 | WORKPIECE CARRIER WITH GAS PRESSURE IN INNER CAVITIES | 2017-12-07 |
20170352566 | WORKPIECE CARRIER FOR HIGH POWER WITH ENHANCED EDGE SEALING | 2017-12-07 |
20170352567 | HIGH POWER ELECTROSTATIC CHUCK DESIGN WITH RADIO FREQUENCY COUPLING | 2017-12-07 |
20170352568 | HIGH POWER ELECTROSTATIC CHUCK WITH APERTURE-REDUCING PLUG IN A GAS HOLE | 2017-12-07 |
20170352569 | ELECTROSTATIC CHUCK HAVING PROPERTIES FOR OPTIMAL THIN FILM DEPOSITION OR ETCH PROCESSES | 2017-12-07 |
20170352570 | CIRCULAR SUPPORT SUBSTRATE FOR SEMICONDUCTOR | 2017-12-07 |
20170352571 | Method for manufacturing a handling device and method for reversible bonding using such a device | 2017-12-07 |
20170352572 | Wafer expander | 2017-12-07 |
20170352573 | SUBSTRATE PROCESSING APPARATUS | 2017-12-07 |
20170352574 | APPARATUS AND METHOD FOR TREATING WAFER | 2017-12-07 |
20170352575 | Contour Pocket And Hybrid Susceptor For Wafer Uniformity | 2017-12-07 |
20170352576 | SUBSTRATE PLACING TABLE | 2017-12-07 |
20170352577 | Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate | 2017-12-07 |
20170352578 | Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate | 2017-12-07 |
20170352579 | Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry | 2017-12-07 |
20170352580 | Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry | 2017-12-07 |
20170352581 | SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING THE SAME | 2017-12-07 |
20170352582 | PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A BOND PAD | 2017-12-07 |
20170352583 | FABRICATION METHOD OF A STACK OF ELECTRONIC DEVICES | 2017-12-07 |
20170352584 | PATTERN FORMING METHOD | 2017-12-07 |
20170352585 | SELF-ALIGNED QUADRUPLE PATTERNING (SAQP) FOR ROUTING LAYOUTS INCLUDING MULTI-TRACK JOGS | 2017-12-07 |
20170352586 | HARDMASK LAYER FOR 3D NAND STAIRCASE STRUCTURE IN SEMICONDUCTOR APPLICATIONS | 2017-12-07 |
20170352587 | METHOD FOR INTERRUPTING A LINE IN AN INTERCONNECT | 2017-12-07 |
20170352588 | EXPANSION SHEET, EXPANSION SHEET MANUFACTURING METHOD, AND EXPANSION SHEET EXPANDING METHOD | 2017-12-07 |
20170352589 | INTERCONNECT STRUCTURES WITH ENHANCED ELECTROMIGRATION RESISTANCE | 2017-12-07 |
20170352590 | INTERCONNECT STRUCTURES WITH ENHANCED ELECTROMIGRATION RESISTANCE | 2017-12-07 |
20170352591 | METHOD FOR PRODUCING SELF-ALIGNED LINE END VIAS AND RELATED DEVICE | 2017-12-07 |
20170352592 | INTEGRATED CIRCUIT STRUCTURE HAVING DEEP TRENCH CAPACITOR AND THROUGH-SILICON VIA AND METHOD OF FORMING SAME | 2017-12-07 |
20170352593 | METHOD OF SEPARATING ELECTRONIC DEVICES HAVING A BACK LAYER AND APPARATUS | 2017-12-07 |
20170352594 | DISPLAY DEVICE | 2017-12-07 |
20170352595 | METHOD FOR REDUCING N-TYPE FINFET SOURCE AND DRAIN RESISTANCE | 2017-12-07 |
20170352596 | FinFETs with Strained Well Regions | 2017-12-07 |
20170352597 | LOW RESISTANCE DUAL LINER CONTACTS FOR FIN FIELD-EFFECT TRANSISTORS (FinFETs) | 2017-12-07 |
20170352598 | Double Sided NMOS/PMOS Structure and Methods of Forming the Same | 2017-12-07 |
20170352599 | INSPECTING SURFACES | 2017-12-07 |
20170352600 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME | 2017-12-07 |
20170352601 | ELECTROLUMINESCENT LIGHT SOURCE WITH AN ADJUSTED OR ADJUSTABLE LUMINANCE PARAMETER AND METHOD FOR ADJUSTING A LUMINANCE PARAMETER OF THE ELECTROLUMINESCENT LIGHT SOURCE | 2017-12-07 |
20170352602 | Sensor for a Semiconductor Device | 2017-12-07 |
20170352603 | ELECTRONIC COMPONENT PACKAGE INCLUDING SEALING RESIN LAYER, METAL MEMBER, CERAMIC SUBSTRATE, AND ELECTRONIC COMPONENT AND METHOD FOR MANUFACTURING THE SAME | 2017-12-07 |
20170352604 | Semiconductor Device and Power Conversion Device Using Same | 2017-12-07 |
20170352605 | Lighting device using short thermal path cooling technology and other device cooling by placing selected openings on heat sinks | 2017-12-07 |
20170352606 | BORON NITRIDE NANOTUBE ENHANCED ELECTRICAL COMPONENTS | 2017-12-07 |
20170352607 | CIRCUIT BOARD AND ELECTRONIC DEVICE | 2017-12-07 |
20170352608 | ELECTRONIC DEVICE FOR VEHICLE | 2017-12-07 |
20170352609 | LEAD FRAME WITH SOLDER SIDEWALLS | 2017-12-07 |
20170352610 | SEMICONDUCTOR PACKAGE WITH MULTIPLE MOLDING ROUTING LAYERS AND A METHOD OF MANUFACTURING THE SAME | 2017-12-07 |
20170352611 | PRODUCING WAFER LEVEL PACKAGING USING LEADFRAME STRIP AND RELATED DEVICE | 2017-12-07 |
20170352612 | SEMICONDUCTOR PACKAGES INCLUDING HEAT SPREADERS AND METHODS OF MANUFACTURING THE SAME | 2017-12-07 |
20170352613 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-12-07 |
20170352614 | WIRING BOARD | 2017-12-07 |
20170352615 | METHOD OF FABRICATING PACKAGE STRUCTURE WITH AN EMBEDDED ELECTRONIC COMPONENT | 2017-12-07 |
20170352616 | Semiconductor Constructions, Patterning Methods, and Methods of Forming Electrically Conductive Lines | 2017-12-07 |
20170352617 | Methods for semiconductor component design and for semiconductor component production and corresponding semiconductor components | 2017-12-07 |
20170352618 | INTEGRATED CIRCUIT STRUCTURE HAVING DEEP TRENCH CAPACITOR AND THROUGH-SILICON VIA AND METHOD OF FORMING SAME | 2017-12-07 |
20170352619 | INTERCONNECT STRUCTURE WITH CAPACITOR ELEMENT AND RELATED METHODS | 2017-12-07 |
20170352620 | Assemblies Having Shield Lines of an Upper Wiring Level Electrically Coupled with Shield Lines of a Lower Wiring Level | 2017-12-07 |
20170352621 | AVOIDING GATE METAL VIA SHORTING TO SOURCE OR DRAIN CONTACTS | 2017-12-07 |
20170352622 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-12-07 |
20170352623 | INTEGRATED CIRCUIT HAVING STAGGERED CONDUCTIVE FEATURES | 2017-12-07 |
20170352624 | INTERCONNECT STRUCTURES WITH ENHANCED ELECTROMIGRATION RESISTANCE | 2017-12-07 |
20170352625 | SELF-ALIGNED VERTICAL TRANSISTOR WITH LOCAL INTERCONNECT | 2017-12-07 |