50th week of 2018 patent applcation highlights part 56 |
Patent application number | Title | Published |
20180358223 | Directed Self-Assembly of Block Copolymers | 2018-12-13 |
20180358224 | INTERFACIAL CONTROL OF OXYGEN VACANCY DOPING AND ELECTRICAL CONDUCTION IN THIN FILM OXIDE HETEROSTRUCTURES | 2018-12-13 |
20180358225 | METHOD FOR PRODUCING COMPLIMENTARY DEVICES | 2018-12-13 |
20180358226 | NANOWIRE BENDING FOR PLANAR DEVICE PROCESS ON (001) Si SUBSTRATES | 2018-12-13 |
20180358227 | Method For Reducing Reactive Ion Etch Lag in Low K Dielectric Etching | 2018-12-13 |
20180358228 | ANTIMONY CO-DOPING WITH PHOSPHORUS TO FORM ULTRASHALLOW JUNCTIONS USING ATOMIC LAYER DEPOSITION AND ANNEALING | 2018-12-13 |
20180358229 | Diamond-Like Carbon As Mandrel | 2018-12-13 |
20180358230 | LOW OXYGEN CLEANING FOR CMP EQUIPMENT | 2018-12-13 |
20180358231 | LOW OXYGEN CLEANING FOR CMP EQUIPMENT | 2018-12-13 |
20180358232 | CYCLIC ETCH PROCESS TO REMOVE DUMMY GATE OXIDE LAYER FOR FIN FIELD EFFECT TRANSISTOR FABRICATION | 2018-12-13 |
20180358233 | METHOD OF PLASMA ETCHING OF SILICON-CONTAINING ORGANIC FILM USING SULFUR-BASED CHEMISTRY | 2018-12-13 |
20180358234 | HEAT TREATMENT METHOD BY LIGHT IRRADIATION | 2018-12-13 |
20180358235 | SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS | 2018-12-13 |
20180358236 | FIELD EFFECT TRANSISTOR, METHOD FOR MANUFACTURING SAME, DISPLAY ELEMENT, DISPLAY DEVICE, AND SYSTEM | 2018-12-13 |
20180358237 | SEMICONDUCTOR DEVICE PACKAGE | 2018-12-13 |
20180358238 | SEMICONDUCTOR DEVICE PACKAGE HAVING AN UNDERFILL BARRIER | 2018-12-13 |
20180358239 | EQUIPMENT FRONT END MODULE GAS RECIRCULATION | 2018-12-13 |
20180358240 | SUBSTRATE LIQUID PROCESSING APPARATUS | 2018-12-13 |
20180358241 | SUBSTRATE TREATING APPARATUS AND METHODS | 2018-12-13 |
20180358242 | Substrate Processing Apparatus and Apparatus for Manufacturing Integrated Circuit Device | 2018-12-13 |
20180358243 | BRUSH CLEANING APPARATUS, CHEMICAL-MECHANICAL POLISHING (CMP) SYSTEM AND WAFER PROCESSING METHOD | 2018-12-13 |
20180358244 | PROCESS CHAMBER FOR ETCHING LOW K AND OTHER DIELECTRIC FILMS | 2018-12-13 |
20180358245 | Thermal Reflector Device for Semiconductor Fabrication Tool | 2018-12-13 |
20180358246 | TRANSFER PRINTING USING ULTRASOUND | 2018-12-13 |
20180358247 | APPARATUSES FOR BONDING SEMICONDUCTOR CHIPS | 2018-12-13 |
20180358248 | DIFFUSION TEMPERATURE SHOCK MONITOR | 2018-12-13 |
20180358249 | SUBSTRATE ACCOMMODATING CONTAINER, CONTROL DEVICE, AND ABNORMALITY DETECTION METHOD | 2018-12-13 |
20180358250 | PROCESSING APPARATUS | 2018-12-13 |
20180358251 | SUBSTRATE HOUSING CONTAINER | 2018-12-13 |
20180358252 | CONVEYANCE SYSTEM AND CONVEYANCE METHOD | 2018-12-13 |
20180358253 | ELECTROSTATIC CHUCK, A PLASMA PROCESSING APPARATUS HAVING THE SAME, AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME | 2018-12-13 |
20180358254 | Ceramic Electrostatic Chuck Including Embedded Faraday Cage for RF Delivery and Associated Methods for Operation, Monitoring, and Control | 2018-12-13 |
20180358255 | SEMICONDUCTOR WAFER DEVICE AND MANUFACTURING METHOD THEREOF | 2018-12-13 |
20180358256 | WAFER DIVIDING METHOD AND DIVIDING APPARATUS | 2018-12-13 |
20180358257 | IC WITH TRENCHES FILLED WITH ESSENTIALLY CRACK-FREE DIELECTRIC | 2018-12-13 |
20180358258 | SINGLE MASK LEVEL FORMING BOTH TOP-SIDE-CONTACT AND ISOLATION TRENCHES | 2018-12-13 |
20180358259 | HEAT DISSIPATIVE ELEMENT FOR POLYSILICON RESISTOR BANK | 2018-12-13 |
20180358260 | Methods Of Forming Self-Aligned Vias And Air Gaps | 2018-12-13 |
20180358261 | METHOD FOR MANUFACTURING A SEMICONDUCTOR STRUCTURE WITH TEMPORARY DIRECT BONDING USING A POROUS LAYER | 2018-12-13 |
20180358262 | METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE | 2018-12-13 |
20180358263 | SEMICONDUCTOR DEVICES COMPRISING NICKEL-AND COPPER-CONTAINING INTERCONNECTS | 2018-12-13 |
20180358264 | Seamless Tungsten Fill By Tungsten Oxidation-Reduction | 2018-12-13 |
20180358265 | MAGNETIC TRAP FOR CYLINDRICAL DIAMAGNETIC MATERIALS | 2018-12-13 |
20180358266 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 2018-12-13 |
20180358267 | METHODS, APPARATUS, AND SYSTEM FOR FABRICATING FINFET DEVICES WITH INCREASED BREAKDOWN VOLTAGE | 2018-12-13 |
20180358268 | VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS HAVING DIFFERENT CHANNEL LENGTHS | 2018-12-13 |
20180358269 | VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS HAVING DIFFERENT CHANNEL LENGTHS | 2018-12-13 |
20180358270 | PRODUCTION OF SEMICONDUCTOR REGIONS IN AN ELECTRONIC CHIP | 2018-12-13 |
20180358271 | PROCESS CONTROL TECHNIQUES FOR SEMICONDUCTOR MANUFACTURING PROCESSES | 2018-12-13 |
20180358272 | METHODS, APPARATUS AND SYSTEM FOR THRESHOLD VOLTAGE CONTROL IN FINFET DEVICES | 2018-12-13 |
20180358273 | FILM TEST STRUCTURE AND ARRAY SUBSTRATE | 2018-12-13 |
20180358274 | ELECTRONIC PACKAGE THAT INCLUDES MULTIPLE SUPPORTS | 2018-12-13 |
20180358275 | Face Down Dual Sided Chip Scale Memory Package | 2018-12-13 |
20180358276 | SEMICONDUCTOR DEVICE PACKAGE | 2018-12-13 |
20180358277 | METHOD OF REDUCING WARPAGE OF SEMICONDUCTOR PACKAGE SUBSTRATE AND DEVICE FOR REDUCING WARPAGE | 2018-12-13 |
20180358278 | THERMAL MANAGEMENT DEVICES AND SYSTEMS WITHOUT A SEPARATE WICKING STRUCTURE AND METHODS OF MANUFACTURE AND USE | 2018-12-13 |
20180358279 | SEMICONDUCTOR DEVICE | 2018-12-13 |
20180358280 | METHODS AND APPARATUS FOR THERMAL INTERFACE MATERIAL (TIM) BOND LINE THICKNESS (BLT) REDUCTION AND TIM ADHESION ENHANCEMENT FOR EFFICIENT THERMAL MANAGEMENT | 2018-12-13 |
20180358281 | HEAT-RADIATING SUBSTRATE | 2018-12-13 |
20180358282 | ELECTRONIC POWER MODULE | 2018-12-13 |
20180358283 | THERMAL INTERFACE MATERIALS INCLUDING A COLORING AGENT | 2018-12-13 |
20180358284 | PHASE CHANGING ON-CHIP THERMAL HEAT SINK | 2018-12-13 |
20180358285 | MULTI-CHIP PACKAGE OF POWER SEMICONDUCTOR | 2018-12-13 |
20180358286 | QFN PRE-MOLDED LEADFRAME HAVING A SOLDER WETTABLE SIDEWALL ON EACH LEAD | 2018-12-13 |
20180358287 | ELECTRONIC DEVICE, LEADFRAME FOR AN ELECTRONIC DEVICE AND METHOD FOR FABRICATING AN ELECTRONIC DEVICE AND A LEADFRAME | 2018-12-13 |
20180358288 | METAL CORE SOLDER BALL INTERCONNECTOR FAN-OUT WAFER LEVEL PACKAGE AND MANUFACTURING METHOD THEREFOR | 2018-12-13 |
20180358289 | PACKAGE SUBSTRATE AND METHOD OF MANUFACTURING PACKAGE SUBSTRATE | 2018-12-13 |
20180358290 | SEMICONDUCTOR DEVICE PACKAGE | 2018-12-13 |
20180358291 | SEMICONDUCTOR DEVICE PACKAGE | 2018-12-13 |
20180358292 | OVER-MOLDED IC PACKAGE WITH IN-MOLD CAPACITOR | 2018-12-13 |
20180358293 | SEMICONDUCTOR DEVICE HAVING A METAL VIA | 2018-12-13 |
20180358294 | ELECTRIC CONNECTOR | 2018-12-13 |
20180358295 | HIGH SPEED SEMICONDUCTOR CHIP STACK | 2018-12-13 |
20180358296 | ELECTRONIC ASSEMBLY THAT INCLUDES A BRIDGE | 2018-12-13 |
20180358297 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE | 2018-12-13 |
20180358298 | HIGH DENSITY INTERCONNECTION USING FANOUT INTERPOSER CHIPLET | 2018-12-13 |
20180358299 | Method for Patterning a Power Metallization Layer, Electronic Device and Method for Processing an Electronic Device | 2018-12-13 |
20180358300 | METHOD OF FABRICATING A THREE DIMENSIONAL ELECTRONIC STRUCTURE | 2018-12-13 |
20180358301 | SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD | 2018-12-13 |
20180358302 | Electronic Component Packaged in Component Carrier Serving as Shielding Cage | 2018-12-13 |
20180358303 | WRAPPED SIGNAL SHIELDING IN A WAFER FANOUT PACKAGE | 2018-12-13 |
20180358304 | Semiconductor Package Structure and Method of Making the Same | 2018-12-13 |
20180358305 | WAFER LEVEL PACKAGE AND MANUFACTURING METHOD THEREOF | 2018-12-13 |
20180358306 | Dummy Fin Etch to Form Recesses in Substrate | 2018-12-13 |
20180358307 | ELECTRONIC PACKAGING STRUCTURE | 2018-12-13 |
20180358308 | WAFER LEVEL PACKAGE AND MANUFACTURING METHOD THEREOF | 2018-12-13 |
20180358309 | VIA RAIL SOLUTION FOR HIGH POWER ELECTROMIGRATION | 2018-12-13 |
20180358310 | METHOD OF SECURING AN INTEGRATED CIRCUIT DURING MANUFACTURING | 2018-12-13 |
20180358311 | TAMPER-PROOF ELECTRONIC PACKAGES WITH STRESSED GLASS COMPONENT SUBSTRATE(S) | 2018-12-13 |
20180358312 | MANUFACTURING METHOD OF A PACKAGE STRUCTURE | 2018-12-13 |
20180358313 | HIGH BANDWIDTH MEMORY (HBM) BANDWIDTH AGGREGATION SWITCH | 2018-12-13 |
20180358314 | BONDING PADS WITH THERMAL PATHWAYS | 2018-12-13 |
20180358315 | MULTI-DEVICE PACKAGES AND RELATED SEMICONDUCTOR DEVICES | 2018-12-13 |
20180358316 | Conical-Shaped or Tier-Shaped Pillar Connections | 2018-12-13 |
20180358317 | WAFER LEVEL PACKAGE STRUCTURE WITH INTERNAL CONDUCTIVE LAYER | 2018-12-13 |
20180358318 | SINTERING PASTES WITH HIGH METAL LOADING FOR SEMICONDUCTOR DIE ATTACH APPLICATIONS | 2018-12-13 |
20180358319 | SEMICONDUCTOR DEVICE | 2018-12-13 |
20180358320 | ELECTRONIC DEVICE, ELECTRONIC DEVICE MANUFACTURING METHOD, AND ELECTRONIC APPARATUS | 2018-12-13 |
20180358321 | PRESSING SOLDER BUMPS TO MATCH PROBE PROFILE DURING WAFER LEVEL TESTING | 2018-12-13 |
20180358322 | PRESSING SOLDER BUMPS TO MATCH PROBE PROFILE DURING WAFER LEVEL TESTING | 2018-12-13 |