50th week of 2011 patent applcation highlights part 50 |
Patent application number | Title | Published |
20110307591 | MANAGEMENT SYSTEM AND COMPUTER SYSTEM MANAGEMENT METHOD - A system management apparatus for managing a computer system receives plug-in distribution data from a plug-in distribution apparatus. The plug-in distribution data comprises plug-in definition information and template definition information. The system management apparatus uses the plug-in definition information to acquire information from the management target apparatus, and determines whether or not to issue an alert based on the template definition information. The distribution of the plug-in and the template at the same time means that the user can avoid confusion regarding the threshold setting. | 2011-12-15 |
20110307592 | Method and system to collect network addresses and transfer them to a network system - An information system network and method for use thereof for remotely gathering network addresses and sending a message to a network address, the system including at least a remote information collecting device and a network including an input device and a network device, the collecting device in remotely gathering network address and transferring the network address to the input device to be sent to a corresponding network device. | 2011-12-15 |
20110307593 | Alarm Notification Between Customer Premises Equipment And A Remote Management Server - In one embodiment, a method for alarm notification between a customer premises device and a remote management server interfacing with each other through a remote management protocol, includes detecting an alarm condition in the customer premises device, and transferring an explicit alarm notification from the customer premises device to the remote management server over the remote management protocol. The remote management server responds to the explicit alarm notification. | 2011-12-15 |
20110307594 | NETWORK SYSTEM - Provided is a network system. | 2011-12-15 |
20110307595 | METHOD AND APPARATUS FOR DETERMINING OBJECT UPDATES IN A HOME NETWORK - A method and apparatus for determining an object update in a home network. In a method for determining an object change in a home network, a media controller receives an object update identifier (objectUpdateID) and an initial update identifier (initUpdateID) for an object from an accessed media server, compares the objectUpdateID and the initUpdateID with a system update identifier (systemUpdateID) that was previously stored in the media controller, when the media controller previously accessed the media server, and determines whether the object is updated according to the comparison result. | 2011-12-15 |
20110307596 | METHOD OF CONSTRUCTING REPLICATION ENVIRONMENT AND STORAGE SYSTEM - A management computer collects a usage condition of a volume from a host computer and a storage apparatus at each site, consolidates management thereof, and prevents a volume from duplicating among applications as a copy source. This makes it possible to select a used volume in an application as a copy source without excess or deficiency and to create a copy pair configuration definition without duplication or incompatibility. If a replication environment is constructed in a large-scale storage system, the consolidated management of a usage condition of a volume collected from the host computer and the storage apparatus at each site makes it possible to create a copy pair configuration definition by a task constituted by a plurality of applications. | 2011-12-15 |
20110307597 | METHOD FOR CREATING GLOBAL DISTRIBUTED NAMESPACE - One example embodiment includes a method for constructing a unified namespace carried out by a domain manager service executing on a domain node in a domain network comprised of domain nodes. The method includes establishing a single, hierarchical domain tree that encompasses digital computers in a distributed data service network, wherein the domain manager service sends a request to all domain nodes requesting that each domain node export the root of its sub-domain to the domain manager service. The method also includes receiving the exported sub-domain roots. The method further includes grafting onto a domain root of the domain manager service the received exported sub-domain roots. | 2011-12-15 |
20110307598 | AUTOMATED CALENDAR RECONCILIATION - There is provided a computer implemented method of providing data reconciliation on a first delegate device associated with an assigned task. The method comprises the steps of: determining a likelihood of failure of the first delegate device associated with the task defined in a first data entry thereon to complete the task, the first data entry associated with a start time and a task location; determining a replacement delegate device for completing the task in response to detecting task information for the replacement delegate device indicating suitability for the task; and updating respective data entries for the first delegate device and the replacement delegate device to associate the replacement delegate device for the task. | 2011-12-15 |
20110307599 | PROXIMITY NETWORK - A proximity network architecture is proposed that enables a device to detect other devices in its proximity and automatically interact with the other devices to share in a user experience. In one example implementation, data and code for the experience is stored in the cloud so that users can participate in the experience from multiple and different types of devices. | 2011-12-15 |
20110307600 | SYSTEM AND METHOD FOR ASSIGNING NETWORK BLOCKS TO SENSORS - A system includes a processor device. The processor device is configured to detect a physical topology of a network comprising hosts and sensors in the network. The processor device is also configured to generate a sensor policy for assignment of the sensors to network blocks of the hosts, that balances a processing load and accuracy of the sensors in the network based on physical closeness of the sensors to different divisions of hosts within a same network block. | 2011-12-15 |
20110307601 | SERVER ARRAY CAPACITY MANAGEMENT CALCULATOR - Server array capacity calculator systems and methods are provided for estimating capacity based on diagnostic data. For example, a system comprising a database and an estimator computing device comprising a graphical user interface (GUI) and a capacity management module stored in memory and executed on a processor comprising instructions to receive diagnostic data from a plurality of servers of different server types, receive user input via the GUI, and in response to the user input, and for each of the server types, compute a current reference number of servers from current server efficiency estimates and a current number of utilized servers; calculate a growth multiplier from a ratio of the projected number of users and a count of the current concurrent users; generate a projected number of servers by multiplying the current reference number of servers with the growth multiplier, and display the projected number of servers on the GUI. | 2011-12-15 |
20110307602 | RECORDING MEDIUM STORING ANALYSIS PROGRAM, ANALYZING METHOD, AND ANALYZING APPARATUS - An analyzing apparatus calculates a time-series change in an average process time per process of a server belonging to a first tier of a plurality of tiers and a time-series change in an average process time per process of a server belonging to a second tier of the plurality of tiers, referring to a storage unit that stores, with respect to each transaction executed in a multi-tier system in which a plurality of servers coordinate with each other to execute the transaction, information indicating periods in which the server in each of the plurality of tiers executes processes for the transaction. The apparatus determines the presence/absence of a correlation between the time-series change in the average process time of the server belonging to the first tier and the time-series change in the average process time of the server belonging to the second tier. | 2011-12-15 |
20110307603 | BROKER NODE AND EVENT TOPIC CONTROL METHOD IN DISTRIBUTED EVENT DISTRIBUTION SYSTEM - A broker node transmits an event in a distributed event distribution system. In order to flexibly deal with fluctuations in event transmission load, the broker node includes monitoring means that monitors fluctuations in event transmission load on the broker node for each event rule, and control means that dynamically changes an event topic to transmit the event in accordance with fluctuations in transmission load and notifies another node of an instruction of the change using a control message (event Topic control message). | 2011-12-15 |
20110307604 | COMMUNICATION PROCESSING DEVICE, COMMUNICATION PROCESSING SYSTEM, COMMUNICATION PROCESSING METHOD AND PROGRAM - There is provided a communication processing device including a sender report transmitting unit which transmits to a client a sender report including transmission information of transmission data on a regular basis separately from a rate change report, an extended receiver report receiving unit which receives from the client an extended receiver report which includes the transmission information and which is transmitted from the client when the client receives the sender report, and a rate controlling unit which controls a transmission rate of transmission data for the client, based on the transmission information stored in a transmission information storing unit and the transmission information included in the extended receiver report received from the client. | 2011-12-15 |
20110307605 | SERVER SESSION MANAGEMENT APPLICATION PROGRAM INTERFACE AND SCHEMA - Application program interfaces (APIs), schemas and procedures manage multiple sessions within a server system has a create session request call for establishing a session between a client and a server within the server system. Each of plurality of sessions among the servers is persisted within a database operatively coupled to the servers. Each session is associated with a unique session identification which uniquely identifies the session among the plurality of sessions. A management request call for managing one of the sessions is performed according to the unique session identification. | 2011-12-15 |
20110307606 | THIRD PARTY VERIFCATION USING OVERRIDE IP ADDRESSES - Techniques for third party verification using override IP addresses is described, including detecting a request header from an endpoint, the request header being associated with a request for a media file, initiating a download of the media file to the endpoint, evaluating the request header to identify an address associated with the endpoint, generating a notification comprising the address, the notification being configured to indicate the address overrides a source address identified by a field in a packet associated with the request header, and sending the notification to report data associated with the media file, wherein the address overrides the source address to identify a source of the request. | 2011-12-15 |
20110307607 | MANAGING NAVIGATION HISTORY FOR INTRA-PAGE STATE TRANSITIONS - An intra Web-page navigation history mechanism allows history points to be tracked even for state transitions within the same Web page. A Web page may be subjected to a number of different state changes as the Web application executes. Along the way, a number of the state changes may be tracked as history points. When a history point is created, associated state is also recorded. When the history point is again navigated to, a navigation event may be raised along with the associated state for the history point. Various components (whether on the server or client) may listen to that event and reconstruct their respective states by using selective portions of the reconstruction state. | 2011-12-15 |
20110307608 | Parallel Packet Processor with Session Active Checker - Apparatus, processes, and computer readable storage media for processing received packets. A session memory, coupled to and shared by a plurality of packet processors, may store configuration and statistics information for a plurality of communication sessions. A session active memory may store session identifiers corresponding to packets currently being processed by the plurality of packet processors. A comparator may compare a session identifier extracted from a received packet with the stored session identifiers to determine if another packet belonging to the same session as the received packet is currently being processed. Forwarding logic may distribute received packets among the plurality of packet processors. In the case that another packet belonging to the same session as the received packet is currently being processed, the forwarding logic may wait until the processing of the another packet is complete before sending the received packet to one of the packet processors. | 2011-12-15 |
20110307609 | LOAD BASED PROBE RESPONSE SCHEDULING - In an example embodiment, an apparatus comprising an interface configured to communicate with at least one wireless transceiver, and a controller coupled to the interface. The controller is configured to determine a predefined characteristic such as current load and/or interference for a wireless channel associated with the at least one wireless transceiver. The controller is operable to suppress sending a probe response in response to the at least one wireless transceiver receiving a probe request, wherein how often probe responses are suppressed is based on the predefined characteristic for the wireless channel. | 2011-12-15 |
20110307610 | INFORMATION PROCESSING DEVICE AND INFORMATION PROCESSING PROGRAM - An information processing device includes a communication section performing communication with other devices on a network, an image generation section generating image information for each of contents stored in another device on the network or in the information processing device itself, with use of address information of the contents, network identification information, and process instruction information provided for each of the contents, the image information representing the three kinds of information, and the network identification information being used for authentication which allows a wireless device to participate in a wireless network configured to include an access point on the network, and a display request section requesting a display device to display, on a screen thereof and together with a content list, the image information generated by the image generation section. | 2011-12-15 |
20110307611 | System and Method for Punctured Pilot Transmission in a Wireless Network - In accordance with an embodiment, a method of operating a base station configured to communicate with at least one user device includes transmitting a first group of resource elements that include a time and a frequency. At least one of the first group's resource elements includes a reference element. It is determined if the at least one user device will decode a further resource element using the reference element of the at least one of the resource elements of the first group of resource elements. Based on the determining, if the user device will decode the further resource element, a second group of resource elements is transmitted, where at least one of the resource elements of the second group of resource elements corresponding with the at least one of the resource elements of the first group does not include a reference element. | 2011-12-15 |
20110307612 | METHOD TO REQUEST RESOURCES IN TV WHITE SPACES TYPE ENVIRONMENT - Method, apparatus, and computer program product embodiments are disclosed for independent wireless resource sharing on a fair basis to enable selecting the most suitable coexistence between wireless networks. Example embodiments of the invention include a hierarchical resource request process that enables reallocation of radio resources in a coexistence band. When new resources are requested by a network, a search is made for free resources in the coexistence band. If this does not succeed, a check is made for any allocated but unused resources in the coexistence band that have been advertised by neighboring networks. If there are insufficient advertised resources, then the allocation of resources in neighboring networks is analyzed and compared with the requesting network's need for network resources. There are two graduated stages to the analysis. In an example light analysis stage, an analysis of the allocation of resources is limited to neighboring networks within the same network allocation group as the requesting network's. In a more extensive analysis stage, all of the neighboring networks are analyzed. In this manner, a more complete resource reallocation may be achieved. | 2011-12-15 |
20110307613 | APPARATUS AND METHOD FOR INTEGRATED MANAGEMENT OF DIGITALIZED INFORMATION AND DYNAMIC RESOURCES OF BUILDING - Disclosed are an apparatus and a method for integrated management of digitalized information and dynamic resources of a building, in order to integrate and manage digital information associated with a building and information on resources dynamically managed, such as various sensors and devices, networks, services, and the like in the building built up in a building designing or construction stage, resource objects are generated for each of the digitalized building information and dynamic resource information collected from one or more dynamic resources associated with the building, and a list thereof is maintained and managed, and an integrated map of a resource relationship object representing a relationship between the resource objects is generated, maintained, and managed on the basis of the list. | 2011-12-15 |
20110307614 | Techniques For Efficient Remote Presentation Session Connectivity And Routing - Techniques are disclosed for efficient remote presentation session connectivity and routing. In an embodiment, the roles of a remote presentation session deployment involved in receiving a connection from a client and determining a virtual machine (VM) to serve the client's remote presentation session are consolidated on one or more servers of the deployment that host such VMs. When this consolidated role receives a connection set up communication from a client, it uses information local to it and its server to determine a VM to serve the remote presentation session. Where the deployment comprises a plurality of such servers, the consolidated role may communicate with an inter-server connection broker to determine a different server that will conduct the remote presentation session. | 2011-12-15 |
20110307615 | METHOD AND MECHANISM FOR IMPLEMENTING TAGGED SESSION POOLS - An improved method, mechanism, and system for implementing, generating, and maintaining for implementing session pools is disclosed. A session in a session pool can be customized to with a specific set of affinities and attributes. Tags can be associated with the customized sessions. When a later request is made for a session having a set of desired characteristics, the tags can be used to search for and identify a session in the session pool having the requested characteristics. Also disclosed is a method, mechanism, and system for dynamic sizing of session pools. | 2011-12-15 |
20110307616 | LOW-LEVEL REMOTE SHARING OF LOCAL DEVICES IN A REMOTE ACCESS SESSION ACROSS A COMPUTER NETWORK - In one embodiment, a device is connected to a first computer via a first local communication port of the first computer. If the device is configured to autoconnect with a second computer upon connection of the device to the first computer, a remote access session is established between the first computer and the second computer. Low-level local communication from the device is intercepted at the first local communication port of the first computer. The low-level local communication is transmitted from the first computer to the second computer via the remote access session. The low-level local communication is injected to a second local communication port of the second computer to thereby provide an autoconnection of the device to the second computer. | 2011-12-15 |
20110307617 | Method And Apparatus For Handling Peers With Dynamic IP Connectivity Status In Peer-To-Peer Networks - Method and apparatus for communication in a peer-to-peer (P2P) network are provided. The method comprises a first peer in the P2P network selecting a primary Internet Protocol (IP) address from a plurality of IP addresses associated with the first peer. The method further comprises the first peer providing the primary IP address to a second peer as an address the second peer is to use in initiating communication with the first peer. The apparatus comprises a user equipment (UE) that includes a processor configured such that the UE selects a primary IP address from plurality of IP addresses associated with the UE and registers the primary IP address in the P2P network. | 2011-12-15 |
20110307618 | SECURE LEGACY MEDIA PERIPHERAL ASSOCIATION WITH AUTHENTICATION IN A MEDIA EXCHANGE NETWORK - A method for secure access and communication of information in a distributed media network is disclosed and includes detecting, at a first geographic location, when a media peripheral is communicatively coupled to at least one computing device at the first geographic location within the distributed media network. The media peripheral may be validated for use at the first geographic location using at least one identifier. The at least one identifier may be associated with the media peripheral. The at least one identifier may be used to facilitate communication by and/or to the media peripheral over the distributed media network. The at least one identifier associated with the media peripheral and at least one identifier of a user may be requested utilizing the media peripheral. The at least one identifier associated with the media peripheral is a serial number of the media peripheral. | 2011-12-15 |
20110307619 | RELAY PROCESSING METHOD AND RELAY APPARATUS - A relay apparatus is connected to a plurality of servers and a client to relay a message transmitted from the client to one of the plurality of servers. The relay apparatus receives from one of the plurality of servers a response to a first message transmitted from the client. The relay apparatus stores in a data storage a first server identifier of the server that has transmitted the response, in association with a first session identifier included in the response. The relay apparatus extracts, upon receiving a second message transmitted from the client, a second server identifier from the data storage on the basis of a second session identifier included in the second message. The relay apparatus determines a destination server of the second message on the basis of the extracted second server identifier. The relay apparatus transmits the second message destined to an address of the determined destination server. | 2011-12-15 |
20110307620 | APPARATUS AND METHOD FOR REGISTERING PERSONAL NETWORK - A method for a Personal Network Entity (PNE) to individually join a desired Personal Network (PN) is provided. When the PNE transmits a PN connection request message to a PN gateway, the PN gateway inserts its information into the connection request message and forwards the connection request message to a Converged Personal Network Service (CPNS) server. The CPNS server, upon receipt of the connection request message through the PN gateway, generates and manages information about a PN related to the PN gateway. The information about the PN is provided to the PNE at execution of authentication with the PNE, such that the PNE can determine whether to join the PN. | 2011-12-15 |
20110307621 | METHOD FOR IMPLEMENTING A CONVERGENT WIRELESS LOCAL AREA NETWORK (WLAN) AUTHENTICATION AND PRIVACY INFRASTRUCTURE (WAPI) NETWORK ARCHITECTURE IN A LOCAL MAC MODE - A method for implementing a convergent Wireless Local Area Network (WLAN) Authentication and Privacy Infrastructure (WAPI) network architecture in a local Medium Access Control (MAC) mode is provided and includes the following steps: the MAC function and WAPI function of Access Point (AP) are divided between Wireless Terminal Point (WTP) and Access Controller (AC) to construct a local MAC mode; the convergence of WAPI protocol and the convergent WLAN network architecture is implemented in the local MAC mode; the process of association and connection between STAtion (STA), WTP and AC is performed; the process of notification of the beginning of the execution of the WLAN Authentication Infrastructure (WAI) protocol between AC and WTP is performed; the process of the execution of the WAI protocol between STA and AC is performed; the process of notification of the end of the execution of the WAI protocol between AC and WTP is performed; the process of encrypted communication between WTP and STA is performed by use of WPI. | 2011-12-15 |
20110307622 | Method and System for Secure Server-Based Session Management Using Single-Use HTTP Cookies - A methodology for providing secure session management is presented. After a single-use token has been issued to a client, it presents the token, and the server may identify the client based upon the presented token. However, the token may be used only once without being refreshed prior to re-use, thereby causing the token to be essentially reissued upon each use. The token comprises a session identifier that allows the issuer of the token to perform session management with respect to the receiving entity. Tokens can be classified into two types: domain tokens and service tokens. Domain tokens represent a client identity to a secure domain, and service tokens represent a client identity to a specific service. A domain token may be used with any service within a domain that recognizes the domain token, but a service token is specific to the service from which it was obtained. | 2011-12-15 |
20110307623 | SMOOTH STREAMING CLIENT COMPONENT - A streaming abstraction system is described herein that provides application developers a client software development kit (SDK) on top of which to build smooth streaming solutions. The system reduces development time considerably and abstracts platform specific intricacies and protocol handling on the client. In addition, the streaming abstraction system makes it possible to monetize streaming content with advanced features like advertising and analytics and provides advanced capabilities like multiple camera angles, diagnostics, and error handling. In some embodiments, the streaming abstraction system provides an intermediate layer that operates between an application and an underlying client media platform. The intermediate layer manages smooth streaming protocol handling as well as interactions with the platform-specific runtime. | 2011-12-15 |
20110307624 | Method and System to Release Internet Protocol (IP) Multimedia Subsystem (IMS), Session Initiation Protocol (SIP), IP-Connectivity Access Network (IP-CAN) and Radio Access Network (RAN) Networking Resources When IP Television (IPTV) Session is Paused - A user equipment (UE), comprising at least one component configured to support controlling a media stream and modifying Internet Protocol-Connectivity Access Network (IP-CAN)/Radio Access Network (RAN) and Internet Packet (IP) Multimedia Subsystem (IMS) media resources, wherein the IP-CAN/RAN and IMS media resources are modified using a Session Initiation Protocol (SIP) RE-INVITE request to an IMS network, and wherein the media stream is controlled using a Real Time Streaming Protocol (RTSP) request to a media server. Also included is a UE comprising at least one component configured to support a method comprising sending a RTSP request to a signaling/control server in communications with a media server to control a media stream, wherein a SIP RE-INVITE request associated with the RTSP request is further sent from the UE or the signaling/control server to an IMS network to modify media resources associated with the media stream. | 2011-12-15 |
20110307625 | INDEX-BASED VIDEO PLAY APPARATUS AND METHOD USING DOUBLE BUFFERING - Provided is an index-based video play apparatus and method. The apparatus includes a plurality of queuing units, a plurality of buffering units, and a control switching unit. The plurality of queuing units classify and store pieces of video-related information transmitted from one or more video service servers. The plurality of buffering units include a front buffer for buffering a current video data being played and a back buffer for buffering a next video data waiting in the queuing unit to be played. The control switching unit creates an ordered pair for the video data provided from the front buffer to transmit to the user's terminal. Here, the number of the queuing units and the buffering units is a largest number among numbers of videos that are obtained by excluding duplication of the videos in order. | 2011-12-15 |
20110307626 | FASTER THAN REAL TIME STREAMING IN A PLAYLIST CONTEXT - A method for facilitating multimedia streaming using server-side playlists comprises a plurality of operations. An operation is performed for streaming current playlist selection data from a server that supports server-side playlists to a client having a jitter buffer. An operation is performed for receiving at the server a request for streaming multimedia content corresponding to a different playlist selection. An operation is performed for communicating client-server specification information between the server and the client for enabling the different playlist selection data to be streamed from the server to the client at a data transfer rate greater than a maximum data presentation rate. The operation for communicating client-server specification information includes transmitting from the server for reception by the client information acknowledging that the server supports faster than real-time streaming and receiving at the server information designating a current size of the jitter buffer and a maximum data rate at which data is receivable by the client. The server performs an operation for streaming the different playlist selection data from the server for reception by the client after the operation for communicating client-server specification information is performed. The different playlist selection data is streamed at a data transfer rate greater than the maximum data transfer rate at which data is outputable from the jitter buffer. | 2011-12-15 |
20110307627 | DUPLICATING SWITCH FOR STREAMING DATA UNITS TO A TERMINAL - Streaming to a terminal by using a duplicating switch to receive a stream of data units, using the duplicating switch to store content from the stream, using the duplicating switch to generate a second stream that incorporates the content that was stored and address information corresponding to more than one terminal whose addressing information was not part of the first stream, and using the duplicating switch to make the second stream of data units available to two or more terminals. | 2011-12-15 |
20110307628 | Communication system, node, control server, communication method and program - A communication system comprises a node that receives a packet with a process rule sequence including a plurality of process rules that should be set in a process rule storage unit of a node on a data transfer network, and sets a process rule in the process rule storage unit of own node according to the process rule sequence. | 2011-12-15 |
20110307629 | Enhancing DS-Lite with Private IPV4 Reachability - A method implemented in a network element to make a first device assigned an IPv4 private address accessible to a second device using Internet Protocol Version 6 (IPv6), the method comprising receiving an IPv6 formatted data packet, having a virtual IPv6 address as a destination address and having been sent from the second device; determining whether the virtual IPv6 address includes a representation prefix (RP); sending an address map query (AMQ) to a customer premise equipment (CPE), where the CPE stores a mapping between the virtual IPv6 address and a private IPv4 address of the first device; receiving an address map response (AMR) from the CPE with the private IPv4 address corresponding to the virtual IPv6 address; translating the IPv6 formatted data packet into an IPv4 formatted data packet; and sending the translated data packet to the CPE through an IPv4 over IPv6 tunnel. | 2011-12-15 |
20110307630 | EFFICIENT TRANSFORM FROM XML TO JAVASCRIPT OBJECTS - This disclosure describes data conversion and techniques for sending and receiving data at a mobile device. In one implementation, a proxy server may receive data from a mobile device. The proxy server may convert the data and send the converted data to a network service. In another implementation, a mobile device may convert data and send that data to a network service. The network service may generate data in response and send that data to the mobile device directly | 2011-12-15 |
20110307631 | SYSTEM AND METHOD FOR PROVIDING ASYNCHRONOUS DATA COMMUNICATION IN A NETWORKED ENVIRONMENT - A method and system for providing asynchronous data communication between a plurality of devices in a networked environment is disclosed. A user using a first device views view media content received from a first content provider of a plurality of service providers. At a request of the user, a message including a data link to the media content is generated and asynchronously sent to a second device via a network. The data link contained in the received message on the second device is used to retrieve the media content from a second content provider. Various action commands contained in the message are used to control the operation of the media content on the second device. | 2011-12-15 |
20110307632 | METHOD OF IDENTIFYING DEVICES ON A BUS AND APPARATUS - A method of identifying devices on a bus and an apparatus are provided. A method of identifying devices on a bus comprises pooling a plurality of devices connected to a bus, each of the plurality of devices not having uniquely assigned to it a respective unique device identifier (ID) of the bus, selecting, after the pooling, one of the plurality of devices using at least one selection criteria, the at least one selection criteria identifying the one of the plurality of devices uniquely among all of the plurality of devices, and reassigning a unique device ID of the bus to the selected one of the plurality of devices uniquely. An apparatus is configured to carry out the method of identifying devices on a bus. | 2011-12-15 |
20110307633 | PREVENTING ACCESS TO A DEVICE FROM AN EXTERNAL INTERFACE - Prior to customer use of a device, communication with the device is allowed via multiple pins of an external interface of the device. One or more pins of the multiple pins via which communication with the device is to be prevented during customer use of the device are identified. The one or more pins are monitored, and a remedial action is taken if particular activity is detected on the one or more pins. Various different remedial actions can be taken, such as resetting or disabling the device. | 2011-12-15 |
20110307634 | PROGRAMMABLE I/O INTERFACE - The invention provides an architecture and method for implementing a programmable I/O interface. The primary function provides a generic reconfigurable interface for serial communications between a laser printer controller and the print mechanism. The design also supports vertical page synchronization (top of page detection). | 2011-12-15 |
20110307635 | A/D CONVERTER AND PROGRAMMABLE CONTROLLER SYSTEM - An A/D converter that is attached to a programmable controller (PLC) and sequentially converts an analog value inputted from outside into a digital value. The A/D converter includes: a shared memory that can read-access from a CPU unit that controls the entire PLC and includes a log storage area with a ring buffer configuration for sequentially logging the digital value and a parameter storage area for storing a head pointer serving as a parameter indicating a position where a next log data is stored; and a logging executing unit that writes a digital value in an address indicated by the head pointer in the log storage area as log data and updates the head pointer. | 2011-12-15 |
20110307636 | Method and apparatus for dynamically allocating queue depth by initiator - A method for maximizing I/O requests to a target port is provided. The method includes a storage controller obtaining an initiator allowed queue depth, receiving an I/O request and a current sequence identifier from an initiator logged into the target port, and determining if the initiator allowed queue depth is equal to a first queue depth corresponding to the initiator. If the initiator allowed queue depth is equal to the first queue depth then returning a queue full indication and a maximum sequence identifier equal to the current sequence identifier to the initiator. If the initiator allowed queue depth is not equal to the first queue depth then placing the I/O request on a queue, incrementing the first queue depth, and adjusting the maximum sequence identifier. Adjusting the maximum sequence identifier includes adding the current sequence identifier to the initiator allowed queue depth and subtracting the first queue depth. | 2011-12-15 |
20110307637 | DATA TRANSFER DEVICE AND DATA TRANSFER METHOD - A data transfer device includes a data buffer, an odd number flag, and a control unit. The data buffer holds an even number of data blocks from a data transfer controller. The odd number flag is set when the number of data blocks to be transferred to a receiving device is odd. The control unit transfers an even number of data blocks to the receiving device for each data transfer cycle with respect to the receiving device, and transfers one data block to the receiving device in a last transfer cycle when the odd number flag is set. Thus, also when the data transfer controller which transfers data in a unit of an even number of data blocks is used, not only an even number of data blocks but an odd number of data blocks may be transferred to the receiving device. | 2011-12-15 |
20110307638 | DATA TRANSMISSION CABLE WITH OTG FUNCTION - A data transmission cable provided by the present invention is suitable for connecting a first electronic apparatus and a second electronic apparatus. The data transmission cable of the present invention has a first connection module, a second connection module, and an OTG controller. The first and second connection modules are configured for connecting with the first and the second electronic apparatuses respectively. The OTG controller is coupled to the first and the second connection modules for capturing a data from the second electronic apparatus and transmitting the data to the first electronic apparatus, so as to respond a data capturing requirement from the first electronic apparatus. | 2011-12-15 |
20110307639 | VIRTUAL SERIAL PORT MANAGEMENT SYSTEM AND METHOD - A system and a method for virtual serial port management include setting a virtual universal asynchronous receiver/transmitter (VUART) and a software multiplexer (MUX) and setting the VUART to perform functions corresponding to different values of the software MUX. The method further includes receiving commands sent to the server regularly and assigning a first predetermined value to the software MUX when the received command is not an Intelligent platform management interface (IPMI) command. The management method further includes assigning a second predetermined value to the software MUX when the received command is the IPMI command but not a serial over LAN (SOL) command, and assigning a third predetermined value to the software MUX when the received command is the SOL command. | 2011-12-15 |
20110307640 | CALL STACK SAMPLING WITH LIGHTWEIGHT THREAD MIGRATION PREVENTION - A sample is generated based on an event. Further, an interrupt handler captures information for an interrupted thread on a current processor. In addition, an affinity of the interrupted thread is set such that the interrupted thread runs only on the current processor without being able to migrate to a different processor. A sampler thread that runs on the current processor retrieves a call stack associated with the interrupted thread after the affinity of the interrupted thread has been set to the current processor. The affinity of the interrupted thread is restored after the call stack has been retrieved. | 2011-12-15 |
20110307641 | Lazy Handling of End of Interrupt Messages in a Virtualized Environment - Techniques enable reducing a number of intercepts performed by a hypervisor by reducing a number of End Of Interrupt (EOI) messages sent from a virtual central processing unit (CPU) to a virtual advanced programmable interrupt controller (APIC). The EOI path of the guest operating system running on the virtual CPU is altered to leave a marker indicating that the EOI has occurred. At some later time the hypervisor inspects the marker and lazily updates the virtual APIC state. | 2011-12-15 |
20110307642 | DATA PROCESSING DEVICE - When a data processing device is disconnected from a computer system after mutual authen-tication has been completed between the computer system and the data processing device, the data processing device cancels an authenticated state, and is not able to transfer data to a device other than a specific computer system. Therefore, even when the data processing device is connected to a device other than the specific computer system after the connection of a cable supporting hot swapping has been changed, the data processing device maintains the confidentiality of data. | 2011-12-15 |
20110307643 | Memory Management Process and Apparatus for the Same - Memory management process for optimizing the access to a central memory located within a processing system comprising a set of specific units communicating with each other through said memory, said process involving the steps of: a) arranging in a local memory at least a first and a second bank of storage (A, B) for the purpose of temporary object exchanged between a first data object producer ( | 2011-12-15 |
20110307644 | SWITCH-BASED HYBRID STORAGE SYSTEM - The present invention relates to semiconductor storage systems (SSDs). Specifically, the present invention relates to a switch-based hybrid storage system. In a typical embodiment, a first RAID controller is coupled to a system control board, and a double data rate semiconductor storage device (DDR SSD) module is coupled to the first RAID controller. The DDR SSD module typically includes a set of DDR SSD units. Also coupled to the system control board are a first switch and a second switch. A second RAID controller is coupled to the first switch, while a hard disk drive (HDD) module coupled to the second RAID controller. The HDD module typically includes a set of HDD/Flash SDD units. Also coupled to the second switch is a communications module having a set (at least one) of ports. | 2011-12-15 |
20110307645 | IMPLEMENTING ENHANCED HOST TO PHYSICAL STORAGE MAPPING USING NUMERICAL COMPOSITIONS FOR PERSISTENT MEDIA - A method and a storage system are provided for implementing host to physical mapping for persistent media including flash memory. Numerical compositions at multiple granularities are used to store the host to physical mappings. A plurality of groupings, each grouping including a fixed number of blocks is encoded using recursive composition, eliminating the need to store separate lengths. | 2011-12-15 |
20110307646 | Memory system and method of accessing a semiconductor memory device - A memory system is provided with a processor, a main memory, and a flash memory. Performance of the memory system is improved through achievement of speed-up and high data reliability. The memory system includes a nonvolatile memory device and a controller configured to drive a control program to control the nonvolatile memory device. The control program executes a second access operation for the nonvolatile memory device even before a first access operation to the nonvolatile memory device is completed. | 2011-12-15 |
20110307647 | SYSTEMS AND METHODS FOR RAPID PROCESSING AND STORAGE OF DATA - Systems and methods of building massively parallel computing systems using low power computing complexes in accordance with embodiments of the invention are disclosed. A massively parallel computing system in accordance with one embodiment of the invention includes at least one Solid State Blade configured to communicate via a high performance network fabric. In addition, each Solid State Blade includes a processor configured to communicate with a plurality of low power computing complexes interconnected by a router, and each low power computing complex includes at least one general processing core, an accelerator, an I/O interface, and cache memory and is configured to communicate with non-volatile solid state memory. | 2011-12-15 |
20110307648 | Map Data Product, Map Data Processing Program Product, Map Data Processing Method and Map Data Processing Device - A first data product that can be read into a computer or a map data processing apparatus, contains therein map data having map-related information of a map. The map data includes: a structure having the map-related information divided into units of a plurality of divisions into which the map is divided; and a structure having management information for the map-related information divided into units of the divisions, and: the map-related information obtained by the computer or the map data processing apparatus can be updated in units of the individual divisions by using the management information. | 2011-12-15 |
20110307649 | MULTIPLE LEVEL CELL MEMORY DEVICE WITH SINGLE BIT PER CELL, RE-MAPPABLE MEMORY BLOCK - A system having a non-volatile memory device has a plurality of memory cells that are organized into memory blocks. Blocks can operate in either a multiple bit per cell mode or a single bit per cell mode. A processor controls the system and selects blocks to operate in the multiple bit per cell mode and single bit per cell mode. One dedicated memory block is capable of operating only in the single bit per cell mode. If the dedicated memory block is found to be defective, a defect-free block can be remapped to that dedicated memory block location to act only in the single bit per cell mode. | 2011-12-15 |
20110307650 | Method for Securing Electronic Device Data Processing - A method for securing electronic device processes against attacks (e.g. side channel attacks) during the processing of sensitive and/or confidential data by a Central Processing Unit (CPU) to the volatile memory (e.g. RAM) of an electronic device such as, for example, a smart card, a PDA or a cellular phone is described herein. The method involves the storage of the confidential data to a dynamically and randomly assigned memory location, thereby rendering more difficult the analysis and subsequently the attacks (e.g. side channel attacks). | 2011-12-15 |
20110307651 | ROBUST INDEX STORAGE FOR NON-VOLATILE MEMORY - A non-volatile memory data address translation scheme is described that utilizes a hierarchal address translation system that is stored in the non-volatile memory itself. Embodiments of the present invention utilize a hierarchal address data and translation system wherein the address translation data entries are stored in one or more data structures/tables in the hierarchy, one or more of which can be updated in-place multiple times without having to overwrite data. This hierarchal address translation data structure and multiple update of data entries in the individual tables/data structures allow the hierarchal address translation data structure to be efficiently stored in a non-volatile memory array without markedly inducing write fatigue or adversely affecting the lifetime of the part. The hierarchal address translation of embodiments of the present invention also allow for an address translation layer that does not have to be resident in system RAM for operation. | 2011-12-15 |
20110307652 | HYBRID STORAGE SYSTEM WITH MID-PLANE - The present invention relates to semiconductor storage systems (SSDs). Specifically, the present invention relates to a hybrid storage system with a mid-plane. In a typical embodiment, a mid-plane is provided. Coupled to one side of the mid-plane is a system control board and a communications module having a set (at least one) of ports. Coupled to a second side of the mid-plane is (among other components) a first RAID controller, which itself is coupled to a double data rate semiconductor storage device (DDR SSD) module having a set of DDR SSD units. Also coupled to the second side of the mid-plane is a second RAID controller, which itself is coupled to a hard disk drive (HDD) module having a set of HDD/Flash SDD units. | 2011-12-15 |
20110307653 | CACHE COHERENCE PROTOCOL FOR PERSISTENT MEMORIES - Subject matter disclosed herein relates to cache coherence of a processor system that includes persistent memory. | 2011-12-15 |
20110307654 | WRITE OPERATIONS IN A FLASH MEMORY-BASED OBJECT STORE - Approaches for improving writing to solid state devices. An object cache or store, maintained on one or more flash storage devices, comprises two or more slabs. A slab is an allocated amount of memory for storing objects of a particular size. A request to write requested data to a slab is received. The size of the requested data is less than the maximum capacity of objects stored in the slab. After writing the requested data to the slab, unrequested data is written up to the maximum capacity of an object in the slab in the same write operation. Writing the unrequested data to the particular slab is performed for purposes of reducing the time required to write the requested data to the SSD. | 2011-12-15 |
20110307655 | METHOD AND APPARATUS FOR UPDATING TABLE ENTRIES OF A TERNARY CONTENT ADDRESSABLE MEMORY - A method and an apparatus for updating table entries of a TCAM are disclosed. The method comprises: creating a virtual TCAM list, of which respective first TCAM table entries are one-to-one corresponding to respective second TCAM table entries stored in a hardware TCAM; determining, in idle resources of the hardware TCAM, a storage position of a second TCAM table entry to be updated corresponding to a first TCAM table entry to be updated, according to a pre-specified precedence relationship between the storage positions of the first TCAM table entry to be updated and other first TCAM table entry in the virtual TCAM list; and performing an updating operation on the second TCAM table entry to be updated based on the determined storage position. According to the present invention, the storage position of the second TCAM table entry to be updated is selected from the idle resources of the hardware TCAM so far as possible, and thus the problem of a low efficiency in updating table entries because of the rewriting of a lot of other second TCAM table entries caused by updating the second TCAM table entries in the hardware TCAM is overcome. | 2011-12-15 |
20110307656 | EFFICIENT LOOKUP METHODS FOR TERNARY CONTENT ADDRESSABLE MEMORY AND ASSOCIATED DEVICES AND SYSTEMS - Lookup techniques are described, which can achieve improvements in energy efficiency, speed, and cost, of IP address lookup, for example, in devices and systems employing ternary content addressable memory (TCAM). The disclosed subject matter describes dividing a route table into several sub-tries with disjoint range boundaries. In addition, the disclosed subject matter describes storing sub-tries of a route table between a TCAM and a faster and less costly memory. The disclosed details enable various refinements and modifications according to system design and tradeoff considerations. | 2011-12-15 |
20110307657 | Selective Processing of File System Objects for Image Level Backups - Systems, methods, and computer program products are provided for reducing the size of image level backups. An example method receives backup parameters identifying a physical or Virtual Machine (VM) to backup and at least one file system object to include in the backup. The method connects to production storage corresponding to the selected physical or virtual machine and obtains access to data stored in disk corresponding to the selected file system object(s). The method fetches file allocation table (FAT) blocks from the disk and parses contents of the FAT blocks to determine if the disk blocks correspond to the selected file system object(s). The method creates a backup disk image FAT comprising blocks corresponding to the selected file system object(s). The method creates a reconstructed disk image FAT blocks corresponding to the backup FAT and disk image data blocks belonging to the selected file system object(s) and all other disk image data blocks are saved as zero blocks. A reconstructed disc image is compressed and stored in a backup file on backup storage, or replicated (copied) to another storage intact. | 2011-12-15 |
20110307658 | STORAGE SYSTEM AND METHOD OF OPERATING THE SAME - A storage system comprising a storage apparatus having a storage control unit communicatively coupled to an external apparatus, forming a plurality of virtual storage areas each serving as a unit storage area used by the external apparatus as a data storing area, using a unit logical storage area selected among a plurality of unit logical storage areas provided by a physical storage medium, linking to each of the virtual storage areas, and any one of a plurality of attributes each representing a storage state of data stored in the virtual storage area, and maintaining the link wherein the storage control unit | 2011-12-15 |
20110307659 | Hardware-Accelerated Lossless Data Compression - Systems for hardware-accelerated lossless data compression are described. At least some embodiments include data compression apparatus that includes a plurality of hash memories each associated with a different lane of a plurality of lanes (each lane including data bytes of a data unit being received by the compression apparatus), an array including array elements each including a plurality of validity bits (each validity bit within an array element corresponding to a different lane of the plurality of lanes), control logic that initiates a read of a hash memory entry if a corresponding validity bit indicates that said entry is valid, and an encoder that compresses at least the data bytes for the lane associated with the hash memory comprising the valid entry if said valid entry comprises data that matches the lane data bytes. | 2011-12-15 |
20110307660 | REDUNDANT ARRAY OF INDEPENDENT DISKS SYSTEM, METHOD FOR WRITING DATA INTO REDUNDANT ARRAY OF INDEPENDENT DISKS SYSTEM, AND METHOD AND SYSTEM FOR CREATING VIRTUAL DISK - A redundant array of independent disks (RAID) system stores data mapped to a virtual disk, where the virtual disk includes a plurality of virtual sub-disks. The RAID system includes a plurality of storage devices and a controller. The controller is electrically connected to the storage devices, and is utilized for configuring the storage devices into a plurality of zone stripes, where each storage device includes a plurality of zones, each zone stripe includes one zone of each of the storage devices, and each zone stripe stores data mapped to a portion of data of each of the virtual sub-disks. | 2011-12-15 |
20110307661 | MULTI-PROCESSOR CHIP WITH SHARED FPGA EXECUTION UNIT AND A DESIGN STRUCTURE THEREOF - An integrated circuit chip having plural processors with a shared field programmable gate array (FPGA) unit, a design structure thereof, and method for allocating the shared FPGA unit. A method includes storing a plurality of data that define a plurality of configurations of a field programmable gate array (FPGA), wherein the FPGA is arranged in the execution pipeline of at least one processor; selecting one of the plurality of data; and programming the FPGA based on the selected one of the plurality of data. | 2011-12-15 |
20110307662 | MANAGING CACHE COHERENCY FOR SELF-MODIFYING CODE IN AN OUT-OF-ORDER EXECUTION SYSTEM - A method, system, and computer program product for managing cache coherency for self-modifying code in an out-of-order execution system are disclosed. A program-store-compare (PSC) tracking manager identifies a set of addresses of pending instructions in an address table that match an address requested to be invalidated by a cache invalidation request. The PSC tracking manager receives a fetch address register identifier associated with a fetch address register for the cache invalidation request. The fetch address register is associated with the set of addresses and is a PSC tracking resource reserved by a load store unit (LSU) to monitor an exclusive fetch for a cache line in a high level cache. The PSC tracking manager determines that the set of entries in an instruction line address table associated with the set of addresses is invalid and instructs the LSU to free the fetch address register. | 2011-12-15 |
20110307663 | Storage Unsharing - A method is described to partition the memory of application-specific hardware compiled from a software program. Applying the invention generates multiple small memories that need not be kept coherent and are defined over a specific region of the program. The invention creates application specific hardware which preserves the memory image and addressing model of the original software program. The memories are dynamically initialized and flushed at the entries and exits of the program region they are defined in. | 2011-12-15 |
20110307664 | Cache device for coupling to a memory device and a method of operation of such a cache device - A cache device is provided for use in a data processing apparatus to store data values for access by an associated master device. Each data value has an associated memory location in a memory device, and the memory device is arranged as a plurality of blocks of memory locations, with each block having to be activated before any data value stored in that block can be accessed. The cache device comprises regular access detection circuitry for detecting occurrence of a sequence of accesses to data values whose associated memory locations follow a regular pattern. Upon detection of such an occurrence of a sequence of accesses by the regular access detection circuitry, an allocation policy employed by the cache to determine a selected cache line into which to store a data value is altered with the aim of increasing a likelihood that when an evicted data value output by the cache is subsequently written to the memory device, the associated memory location resides within an already activated block of memory locations. Hence, by detecting regular access patterns, and altering the allocation policy on detection of such patterns, this enables a reuse of already activated blocks within the memory device, thereby significantly improving memory utilisation, thereby giving rise to both performance improvements and power consumption reductions. | 2011-12-15 |
20110307665 | PERSISTENT MEMORY FOR PROCESSOR MAIN MEMORY - Subject matter disclosed herein relates to a system of one or more processors that includes persistent memory. | 2011-12-15 |
20110307666 | DATA CACHING METHOD - Data caching for use in a computer system including a lower cache memory and a higher cache memory. The higher cache memory receives a fetch request. It is then determined by the higher cache memory the state of the entry to be replaced next. If the state of the entry to be replaced next indicates that the entry is exclusively owned or modified, the state of the entry to be replaced next is changed such that a following cache access is processed at a higher speed compared to an access processed if the state would stay unchanged. | 2011-12-15 |
20110307667 | MEMORY SYSTEM - A memory system according to an embodiment of the present invention comprises: a first management table that manages addresses concerning the data written in a first storing area; and a second management table that manages, in an address unit of a second management unit, information indicating temporal order of the data stored in the first storing area and manages, for each of addresses in a second management unit, number-of-valid-data information indicating a number of data in the first management unit included in the addresses in the second management unit. | 2011-12-15 |
20110307668 | METHOD AND SYSTEM OF UPDATING SHARED MEMORY - A method and system is disclosed for updating a shared memory or other memory location where multiple entities rely on code stored to the same memory to support one or more operation functions. The shared memory may be updated such that the code intended to the replace the currently stored code may be relied upon prior to replacement of the code currently written to the shared memory. | 2011-12-15 |
20110307669 | SHARED MEMORY ARCHITECTURE - A shared memory architecture is disclosed to support operations associated with executing shared functions from a shared memory space in such a manner that separate pieces of software can execute the shared functions. | 2011-12-15 |
20110307670 | ENCODING DATA INTO CONSTRAINED MEMORY - Encoding data into constrained memory using a method for writing data that includes receiving write data to be encoded into a write word, receiving constraints on symbol values associated with the write word, encoding the write data into the write word, and writing the write word to a memory. The encoding includes: representing the write data and the constraints as a first linear system in a first field of a first size; embedding the first linear system into a second linear system in a second field of a second size, the second size larger than the first size; solving the second linear system in the second field resulting in a solution; and collapsing the solution into the first field resulting in the write word, the write word satisfying the constraints on symbol values associated with the write word. | 2011-12-15 |
20110307671 | Training a Memory Controller and a Memory Device Using Multiple Read and Write Operations - Systems and methods to set a voltage value associated with a communication bus that includes memory controller coupled to a memory device are disclosed. A particular method may include performing a first calibration operation associated with first data written from a memory controller to a memory device. A second calibration operation may be associated with second data read at the memory controller from the memory device. The operating parameter may be set based on a result of at least one of the first and the second calibration operations at the memory device or the memory controller. | 2011-12-15 |
20110307672 | MEMORY INTERFACE WITH INTERLEAVED CONTROL INFORMATION - A memory system communicates at least partially temporally overlapping write-data sequences associated with independent column write accesses on data links from a memory controller to a memory device via bidirectional links. Each of these write-data sequences may be associated with a different bank set in the memory IC. These bank sets may be micro-threaded so that each bank set is independently addressable and can concurrently perform operations associated with independent commands, including simultaneous column read/write. Furthermore, temporally interleaved data-mask information for the write-data sequences may be communicated from the memory controller to the memory IC via a data-mask link, so that alternate bits in the interleaved data-mask information may correspond to different write sequences. | 2011-12-15 |
20110307673 | RECONFIGURABLE INTERLEAVER HAVING RECONFIGURABLE COUNTERS - A reconfigurable interleaver is provided, configured to produce a sequence of interleaved addresses, configurable for at least two different interleaving patterns. The reconfigurable interleaver comprises a plurality of reconfigurable counters. The number of values that the counters count is configurable as are their start values. The interleaver further comprises a plurality of memory in which the counters indicate memory positions so that values may be retrieved. Computational elements compute an interleaved sequence of addresses in dependency on the retrieved values. By reconfiguring the counters and possibly changing the content of the memories, the interleaver may be configured for a different interleaving pattern. | 2011-12-15 |
20110307674 | APPARATUS AND METHOD FOR SYNCHRONIZING A SNAPSHOT IMAGE - An apparatus and method for synchronizing a snapshot image are provided. A synchronization page is detected based on whether a page fault is generated in a snapshot page that is part of a snapshot image and based on attributes of a process that generated the page fault. The detected synchronization page is reflected in the snapshot image at a specific time. | 2011-12-15 |
20110307675 | METHOD AND APPARATUS FOR DE-DUPLICATION AFTER MIRROR OPERATION - An amount of storage capacity used during mirroring operations is reduced by applying de-duplication operations to the mirror volumes. Data stored to a first volume is mirrored to a second volume. The second volume is a virtual volume having a plurality of logical addresses, such that segments of physical storage capacity are allocated for a specified logical address as needed when data is stored to the specified logical address. A de-duplication operation is carried out on the second volume following a split from the first volume. A particular segment of the second volume is identified as having data that is the same as another segment in the second volume or in the same consistency group. A link is created from the particular segment to the other segment and the particular segment is released from the second volume so that physical storage capacity required for the second volume is reduced. | 2011-12-15 |
20110307676 | STORAGE SYSTEM AND COPY METHOD - In a storage system, one or more storage apparatuses provide a management computer with a first volume for storing data from the management computer, provide a host computer with a second volume for storing data from the host computer, and manage a volume address for the one or more storage apparatuses to manage the first volume and the second volume in the one or more storage apparatuses. The management computer issues a command specifying an arbitrary volume address to the one or more storage apparatuses, and designates, when receiving a normal response from the arbitrary volume address, a volume with the arbitrary volume address as the second volume. | 2011-12-15 |
20110307677 | DEVICE FOR MANAGING DATA BUFFERS IN A MEMORY SPACE DIVIDED INTO A PLURALITY OF MEMORY ELEMENTS - In a device for managing data buffers in a memory space distributed over a plurality of memory elements, the memory space is allocatable by memory pages, each buffer including one or more memory pages. The buffers are usable by at least one processing unit for the execution of an application, the application being executed by a plurality of processing units executing tasks in parallel. The memory elements are accessible in parallel by the processing units. The device includes means for allocating buffers to the tasks during the execution of the application and means for managing access rights to the buffers. The means for managing the access rights to the buffers include means for managing access rights to the pages in a given buffer, to verify that writing to a given page does not modify data currently being read from the page or that reading from a given page does not access data currently being written to the page, in such a way as to share the buffer between unsynchronized tasks. | 2011-12-15 |
20110307678 | STORAGE APPARATUS, STORAGE SYSTEM - An object of the present invention is to provide a storage apparatus which can maintain a performance even if an unused storage area is not released. | 2011-12-15 |
20110307679 | MANAGING WEAR ON INDEPENDENT STORAGE DEVICES - In a method of managing wear on a plurality of independent storage devices having respective sets of memory cells, access characteristics of the memory cells in the plurality of independent storage devices are monitored. In addition, an instruction to access data on at least one of the memory cells is received and an independent storage device of the plurality of independent storage devices is selected to access data on at least one of the memory cells of the selected independent storage device based upon one or more predetermined selection policies and the monitored access characteristics of the memory cells in the plurality of independent storage devices. Moreover, the selected independent storage device is assigned to access data on at least one of the memory cells of the selected independent storage device according to the received instruction. | 2011-12-15 |
20110307680 | STORAGE SYSTEM - The temporary area capacity required to be secured with respect to the whole permanent area is calculated in accordance with the capacity and access frequency of a host computer data permanent area of a disk device contained in the storage system and a disk device of an external storage device that is managed by a storage virtualization function of this storage system. The nonvolatile memory is defined as the temporary area and is used to temporarily store host computer data when a data I/O from the host computer is processed. The required capacity of the temporary area is re-calculated in accordance with an event such as a configuration change in the external storage system. | 2011-12-15 |
20110307681 | Apparatus and method for mapping architectural registers to physical registers - An apparatus and method are provided for performing register renaming, whereby architectural registers from a set of architectural registers are mapped to physical registers from a set of physical registers. Available register identifying circuitry is provided which is responsive to a current state of the apparatus to identify which physical registers form a pool of physical registers available to be mapped by register renaming circuitry to an architectural register specified by an instruction to be executed. Configuration storage stores configuration data whose value is modified during operation of the processing circuitry, such that when the configuration data has a first value, the configuration data identifies at least one architectural register of the architectural register set which does not require mapping to a physical register by the register renaming circuitry. The available register identifying circuitry is arranged to reference the configuration storage, such that when the configuration data has the first value, the number of physical registers in the pool is increased due to the reduction in the number of architectural registers which require mapping to physical registers. This enables the performance benefits from performing register renaming to be improved, without the need to increase the number of physical registers within the physical register set. | 2011-12-15 |
20110307682 | BLOCK MANAGEMENT FOR MASS STORAGE - An embodiment of the present invention includes a nonvolatile memory system comprising nonvolatile memory for storing sector information, the nonvolatile memory being organized into blocks with each block including a plurality of sectors, each sector identified by a logical block address and for storing sector information. A controller is coupled to the nonvolatile memory for writing sector information to the latter and for updating the sector information, wherein upon updating sector information, the controller writes to the next free or available sector(s) of a block such that upon multiple re-writes or updating of sector information, a plurality of blocks are substantially filled with sector information and upon such time, the controller rearranges the updated sector information in sequential order based on their respective logical block addresses thereby increasing system performance and improving manufacturing costs of the controller. | 2011-12-15 |
20110307683 | INDEX ENTRY EVICTION - Systems, methods embodied on computer-readable media, and other embodiments associated with index entry eviction are described. One example method includes selecting an index entry for eviction from a bucket of index entries based on a time value, a utility value, and a precedence value. A precedence value may be a value associated with an index entry that is static over time. Additionally, results of a function that compares two precedence values may be static over time. The example method may also include providing an index entry identifier that identifies the index entry. | 2011-12-15 |
20110307684 | Image Processing Address Generator - An image processing system including a vector processor and a memory adapted for attaching to the vector processor. The memory is adapted to store multiple image frames. The vector processor includes an address generator operatively attached to the memory to access the memory. The address generator is adapted for calculating addresses of the memory over the multiple image frames. The addresses may be calculated over the image frames based upon an image parameter. The image parameter may specify which of the image frames are processed simultaneously. A scalar processor may be attached to the vector processor. The scalar processor provides the image parameter(s) to the address generator for address calculation over the multiple image frames. An input register may be attached to the vector processor. The input register may be adapted to receive a very long instruction word (VLIW) instruction. The VLIW instruction may be configured to transfer only: (i) parameters for image processing calculations over the image frames by the ALU units and (ii) a single bit to the address generator. | 2011-12-15 |
20110307685 | Processor for Large Graph Algorithm Computations and Matrix Operations - A multiprocessor system and method for performing matrix operations includes multiple processors cooperatively performing a sparse matrix operation. Distributed among the processors are non-zero matrix elements of first and second sparse matrices. Mapped across the processors are the matrix elements of a results matrix. Each processor receives, from the other processors, non-zero matrix elements of the first matrix that had been distributed to those other processors and generates partial results based on the received non-zero matrix elements of the first matrix and on the non-zero matrix elements of the second matrix distributed to that processor. Each processor receives those partial results generated by other processors and associated with the matrix elements of the results matrix mapped to that processor. Each processor generates a final value for each matrix element of the results matrix mapped to that processor based on the partial results generated by that processor and on the partial results received from the other processors associated with that matrix element of the results matrix. | 2011-12-15 |
20110307686 | Method for Instructing a data processor to process data - A data processor which executes instructions described in first and second instruction formats. The first instruction format defines a register-addressing field of a predetermined size, while the second instruction format defines a register-addressing field of a size larger than that of the register-addressing field defined by the first instruction format. The data processor includes: instruction-type identifier, responsive to an instruction, for identifying the received instruction as being described in the first or second instruction format by the instruction itself; a first register file including a plurality of registers; and a second register file also including a plurality of registers, the number of the registers included in the second register file being larger than that of the registers included in the first register file. | 2011-12-15 |
20110307687 | IN-LANE VECTOR SHUFFLE INSTRUCTIONS - In-lane vector shuffle operations are described. In one embodiment a shuffle instruction specifies a field of per-lane control bits, a source operand and a destination operand, these operands having corresponding lanes, each lane divided into corresponding portions of multiple data elements. Sets of data elements are selected from corresponding portions of every lane of the source operand according to per-lane control bits. Elements of these sets are copied to specified fields in corresponding portions of every lane of the destination operand. Another embodiment of the shuffle instruction also specifies a second source operand, all operands having corresponding lanes divided into multiple data elements. A set selected according to per-lane control bits contains data elements from every lane portion of a first source operand and data elements from every corresponding lane portion of the second source operand. Set elements are copied to specified fields in every lane of the destination operand. | 2011-12-15 |
20110307688 | SYNTHESIS SYSTEM FOR PIPELINED DIGITAL CIRCUITS - Computer-implemented methods and systems for synthesizing a hardware description for a pipelined datapath for a digital circuit. A transactional datapath specification framework and a transactional design automation system automatically synthesize pipeline implementations. The transactional datapath specification framework captures an abstract datapath, whose execution semantics is interpreted as a sequence of “transactions” where each transaction reads the state values left by the preceding transaction and computes a new set of state values to be seen by the next transaction. The transactional datapath specification framework exposes sufficient information about state accesses that can occur in a datapath, which is necessary for performing precise data hazards analysis, and eventually pipeline synthesis. | 2011-12-15 |
20110307689 | PROCESSOR SUPPORT FOR HARDWARE TRANSACTIONAL MEMORY - A processing core of a plurality of processing cores is configured to execute a speculative region of code as a single atomic memory transaction with respect one or more others of the plurality of processing cores. In response to determining an abort condition for an issued one of the plurality of program instructions and in response to determining that the issued program instruction is not part of a mispredicted execution path, the processing core is configured to abort an attempt to execute the speculative region of code. | 2011-12-15 |
20110307690 | SYSTEM AND METHOD FOR RAPID BOOT OF SECONDARY OPERATING SYSTEM - The primary operating system of a computer such as a notebook computer is stored on disk in a hard disk drive and a smaller, secondary operating system such as an email operating system, wireless phone operating system, DVD player operating system, etc. is stored on disk and is transferred to flash memory within the HDD upon power-down of the primary operating system. In this way, should the user subsequently elect to power up the computer only for a limited secondary purpose, the user can elect to boot the associated secondary operating system from flash memory of the HDD without having to spin up the disks, saving energy and reducing boot time. | 2011-12-15 |