52nd week of 2009 patent applcation highlights part 15 |
Patent application number | Title | Published |
20090315137 | SEMICONDUCTOR DEVICES, CMOS IMAGE SENSORS, AND METHODS OF MANUFACTURING SAME - A semiconductor device includes: a trench device isolating region formed in a substrate to define a photodiode active region; a channel stop impurity region formed in the substrate contacting the device isolating region, wherein the channel stop impurity region surrounds a bottom and a sidewall of the device isolating region; and a photodiode formed within the photodiode active region. | 2009-12-24 |
20090315138 | METHOD AND STRUCTURE FOR SOI BODY CONTACT FET WITH REDUCED PARASITIC CAPACITANCE - In one embodiment, the present invention provides a semiconductor device that includes a substrate including a semiconducting layer positioned overlying an insulating layer the semiconducting layer including a semiconducting body and isolation regions present about a perimeter of the semiconducting body; a gate structure overlying the semiconducting layer of the substrate, the gate structure present on a first portion on an upper surface of the semiconducting body; and a silicide body contact that is in direct physical contact with a second portion of the semiconducting body that is separated from the first portion of the semiconducting body by a non-silicide semiconducting region. | 2009-12-24 |
20090315139 | PATTERNING METHOD AND SEMICONDUCTOR DEVICE - A patterning method includes defining, in the case of an electric current which exceeds an allowable limit flowing between first conduction type well regions arranged in a semiconductor substrate, a first pattern between the first conduction type well regions; defining a second pattern by removing, in the case of a first region in which arrangement is inhibited being in the first pattern, the first region from the first pattern; defining a third pattern by removing, in the case of a second region which exceeds a fabrication limit being in the second pattern, the second region from the second pattern; and using the third pattern as a dummy active region in a second conduction type well region arranged in the semiconductor substrate. | 2009-12-24 |
20090315140 | METHOD OF FORMING A DEVICE WAFER WITH RECYCLABLE SUPPORT - A method for forming a device wafer with a recyclable support by providing a wafer having first and second surfaces, with at least the first surface of the wafer comprising a semiconductor material that is suitable for receiving or forming electronic devices thereon, providing a supporting substrate having upper and lower surfaces, and providing the second surface of the wafer or the upper surface of the supporting substrate with void features in an amount sufficient to enable a connecting bond therebetween to form a construct wherein the bond is formed at an interface between the wafer and the substrate and is suitable to maintain the wafer and supporting substrate in association while forming or applying electronic devices to the first surface of the wafer, but which connecting bond is severable at the interface due to the void features to separate the substrate from the wafer so that the substrate can be reused. | 2009-12-24 |
20090315141 | ISOLATION LAYER OF SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An isolation layer of a semiconductor device, and a method of manufacturing the same, may include a trench formed in a semiconductor substrate, a first liner protective layer formed along an inner surface of the trench, a low-K material pattern formed over the first liner protective layer filling the trench, a recess formed over the low-K material pattern such that an upper sidewall of the first liner protective layer is exposed, and a second liner protective layer formed in the recess preventing the low-K material pattern from being exposed. | 2009-12-24 |
20090315142 | Semiconductor component and method of manufacture - A semiconductor component that includes an integrated passive device and method for manufacturing the semiconductor component. Vertically integrated passive devices are manufactured above a substrate. In accordance with one embodiment, a resistor is manufactured in a first level above a substrate, a capacitor is manufactured in a second level that is vertically above the first level, and a copper inductor is manufactured in a third level that is vertically above the second level. The capacitor has aluminum plates. In accordance with another embodiment, a resistor is manufactured in a first level above a substrate, a copper inductor is manufactured in a second level that is vertically above the first level, and a capacitor is manufactured in a third level that is vertically above the second level. The capacitor may have aluminum plates or a portion of the copper inductor may serve as one of its plates. | 2009-12-24 |
20090315143 | Methods of Forming Integrated Circuit Devices Including Insulating Support Layers and Related Structures - An integrated circuit device may include a substrate, a plurality of storage electrode landing pads on the substrate, and a plurality of storage electrodes. Each of the plurality of storage electrodes may be on a portion of a respective one of the plurality of storage electrode landing pads. In addition, an insulating support layer may be on the substrate, on portions of the storage electrode landing pads that are free of the storage electrodes, and on portions of sidewalls of storage electrodes. Moreover, portions of sidewalls of the storage electrodes may be free of the insulating support layer. Related methods and structures are also discussed. | 2009-12-24 |
20090315144 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE - An upper electrode of a ferroelectric capacitor has a first layer formed of a first oxide expressed by a chemical formula AO | 2009-12-24 |
20090315145 | ADJUSTABLE BIPOLAR TRANSISTORS FORMED USING A CMOS PROCESS - By providing a novel bipolar device design implementation, a standard CMOS process ( | 2009-12-24 |
20090315146 | Compact dual direction BJT clamps - In a dual direction BJT clamp, multiple emitter and base fingers are alternatingly connected to ground and pad and share a common sub-collector. | 2009-12-24 |
20090315147 | SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE - A wire embedded in a semiconductor substrate is covered with an insulating film, and a bias voltage is applied to the semiconductor substrate or to the wire to form a depletion layer extending from an edge of the insulating film. Alternatively, a semiconductor layer having a different conductivity type from the semiconductor substrate is formed within the semiconductor substrate to surround the insulating film. | 2009-12-24 |
20090315148 | ELECTROPLATING METHOD FOR DEPOSITING CONTINUOUS THIN LAYERS OF INDIUM OR GALLIUM RICH MATERIALS - An electrochemical deposition method to form uniform and continuous Group IIIA material rich thin films with repeatability is provided. Such thin films are used in fabrication of semiconductor and electronic devices such as thin film solar cells. In one embodiment, the Group IIIA material rich thin film is deposited on an interlayer that includes 20-90 molar percent of at least one of In and Ga and at least | 2009-12-24 |
20090315149 | MANUFACTURING METHOD OF NITRIDE SUBSTRATE, NITRIDE SUBSTRATE, AND NITRIDE-BASED SEMICONDUCTOR DEVICE - A manufacturing method of a nitride substrate includes the steps of preparing a ground substrate; forming a mask on the ground substrate; placing the ground substrate in a reactor, and heating the ground substrate to a temperature of 850° C. to 1100° C. In the step of heating the ground substrate, HCl and NH3 are supplied into the reactor so that partial pressure P | 2009-12-24 |
20090315150 | III-Nitride Crystal Manufacturing Method, III-Nitride Crystal Substrate, and III-Nitride Semiconductor Device - Affords methods of manufacturing bulk III-nitride crystals whereby at least the surface dislocation density is low globally. | 2009-12-24 |
20090315151 | Method for testing group III-nitride wafers and group III-nitride wafers with test data - The present invention discloses a new testing method of group III-nitride wafers. By utilizing the ammonothermal method, GaN or other Group III-nitride wafers can be obtained by slicing the bulk GaN ingots. Since these wafers originate from the same ingot, these wafers have similar properties/qualities. Therefore, properties of wafers sliced from an ingot can be estimated from measurement data obtained from selected number of wafers sliced from the same ingot or an ingot before slicing. These estimated properties can be used for product certificate of untested wafers. This scheme can reduce a significant amount of time, labor and cost related to quality control. | 2009-12-24 |
20090315152 | DIFFUSION BARRIER AND METHOD OF FORMATION THEREOF - A method of forming a device is presented. The method includes providing a structure having first and second regions. A diffusion barrier is formed between at least a portion of the first and second regions. The diffusion barrier comprises cavities that reduce diffusion of elements between the first and second regions. | 2009-12-24 |
20090315153 | NANO STRUCTURE AND MANUFACTURING METHOD OF NANO STRUCTURE - To provide a method of manufacturing a nano structure having a pattern of 2 μm or more in depth formed on the surface of a substrate containing Si and a nano structure having a pattern of a high aspect and nano order. A nano structure having a pattern of 2 μm or more in depth formed on the surface of a substrate containing Si, wherein the nano structure is configured to contain Ga or In on the surface of the pattern, and has the maximum value of the concentration of the Ga or the In positioned within 50 nm of the surface of the pattern in the depth direction of the substrate. Further, its manufacturing method is configured such that the surface of the substrate containing Si is irradiated with a focused Ga ion or In ion beam, and the Ga ions or the In ions are injected, while sputtering away the surface of the substrate, and a layer containing Ga or In is formed on the surface of the substrate, and with this layer taken as an etching mask, a dry etching is performed. | 2009-12-24 |
20090315154 | SEMICONDUCTOR WITH THROUGH-SUBSTRATE INTERCONNECT - Semiconductor devices are described that have a metal interconnect extending vertically through a portion of the device to the back side of a semiconductor substrate. A top region of the metal interconnect is located vertically below a horizontal plane containing a metal routing layer. Method of fabricating the semiconductor device can include etching a via into a semiconductor substrate, filling the via with a metal material, forming a metal routing layer subsequent to filling the via, and removing a portion of a bottom of the semiconductor substrate to expose a bottom region of the metal filled via. | 2009-12-24 |
20090315155 | METHOD AND APPARATUS TO IMPROVE THE RELIABILITY OF THE BREAKDOWN VOLTAGE IN HIGH VOLTAGE DEVICES - A structure to diminish high voltage instability in a high voltage device when under stress includes an amorphous silicon layer over a field oxide on the high voltage device. | 2009-12-24 |
20090315156 | PACKAGED INTEGRATED CIRCUIT HAVING CONFORMAL ELECTROMAGNETIC SHIELDS AND METHODS TO FORM THE SAME - Example packaged integrated circuit (IC) chips having conformal electromagnetic shields and methods to form the same are disclosed. A disclosed packaged IC chip comprises an IC attached to a first surface of a substrate, the substrate having a conductive pad on the first surface, a first conductive element electrically coupled to the conductive pad on the first surface of the substrate, a molding compound to encapsulate the IC and the first conductive element, the molding compound exposing a surface of the first conductive element, a conformal electromagnetic shield on the molding compound in electrical contact with the exposed surface of the first conductive element, and an externally exposed second conductive element attached to a second surface of the substrate, the second conductive element in electrical contact with the first conductive element. | 2009-12-24 |
20090315157 | PROTECTION FOR PROXIMITY ELECTRONICS AGAINST ELECTROSTATIC DISCHARGE - A system of protecting a proximity communication system against electrostatic discharge (ESD). The proximity communication system includes two chips, each having an array of electrical pads at its surface and covered by a thin dielectric layer such that capacitive coupling circuits are formed between the chips when they are joined together. In at least one of the chips, an additional protection pad is formed away from the array, and heavy protection circuitry is connected to it. Its surface is exposed through the dielectric surface over it such that, when an ESD aggressor approaches, the discharge occurs to the protection pad. | 2009-12-24 |
20090315158 | WIRING BOARD AND ELECTRICAL SIGNAL TRANSMISSION SYSTEM - A wiring board equipped with differential lines which compensate for differences in via lengths to minimize signal deterioration is disclosed. Two conductors are couple to different substrate levels through vias of different lengths. Compensation means are provided to correct for the phase difference caused by the different lengths. | 2009-12-24 |
20090315159 | LEADFRAMES HAVING BOTH ENHANCED-ADHESION AND SMOOTH SURFACES AND METHODS TO FORM THE SAME - Example leadframes having both rough surfaces to enhance adhesion to molding compounds and selectively smoothed surfaces to enhance bonding wire performance, and methods to form the same are disclosed. A disclosed example packaged integrated circuit chip includes a bond wire, a leadframe having a die pad coupled to a carrier rail, and an inner lead coupled to an outer lead via a dam bar, the inner lead having a first portion having a rough surface and a second portion having a smoothed surface, a first end of the bond wire attached to the second portion of the inner lead, an integrated circuit attached to the die pad, a second end of the bond wire attached to a pad disposed on the integrated circuit, and a molding compound to encapsulate the inner lead, the integrated circuit and the bond wire. | 2009-12-24 |
20090315160 | PREFABRICATED LEAD FRAME AND BONDING METHOD USING THE SAME - A prefabricated lead frame to bond a chip and a substrate, and a bonding method using the prefabricated lead frame. The prefabricated lead frame includes an inner ring, an outer ring, and a plurality of wires, wherein inner ends and outer ends of the wires are respectively connected to the inner ring and the outer ring, and the prefabricated lead frame has a wire shape corresponding to a chip and a substrate to be bonded. The prefabricated lead frame may be manufactured in batch production to increase the manufacturing efficiency of semiconductor devices, and the prefabricated lead frame may be used instead of a general wire bonding process. | 2009-12-24 |
20090315161 | DIE ATTACH METHOD AND LEADFRAME STRUCTURE - In one aspect of the invention, a method of attaching a semiconductor die to a microarray leadframe is described. The method comprises stamping an adhesive onto discrete areas of the microarray leadframe using a multi-pronged stamp tool. The adhesive is applied to the leadframe as a series of dots, each dot corresponding to an associated prong of the stamping tool. In some embodiments the adhesive used to attach the semiconductor die to a leadframe is a black epoxy based adhesive material. In an apparatus aspect of the invention, lead traces in a microarray leadframe are arranged to have tails that extend beyond their associated contact posts on the side of the contact post that is opposite a wire bonding region such that such lead traces extends on two opposing sides of their associated contact posts. The tails do not attach to other structures within the lead frame (such as a die attach structure). The width of at least some of these tailed lead traces in a region that overlies their associated contact post is narrower than their associated contact post. Thus, these narrowed lead traces have extensions that extend beyond their associated contact posts. The extensions provide additional surface area that gives an adhesive applied to the narrowed lead trace (as for example by stamping) room to bleed (flow) along the top surface of the lead trace on both sides of the associated contact pad. | 2009-12-24 |
20090315162 | Micro-Modules with Molded Passive Components, Systems Using the Same, and Methods of Making the Same - Semiconductor die packages, methods of making said packages, and systems using said packages are disclosed. An exemplary package comprises at least one semiconductor die disposed on one surface of a leadframe and electrically coupled to at least one conductive region of the leadframe, and at least one passive electrical component disposed on the other surface of a leadframe and electrically coupled to at least one conductive region of the leadframe. Molding material is disposed over the at least one passive electrical component to provide a molded passive component. | 2009-12-24 |
20090315163 | Semiconductor Die Packages with Stacked Flexible Modules Having Passive Components, Systems Using the Same, and Methods of Making the Same - Disclosed are semiconductor die packages comprising flexible modules having passive components, with the flexible modules and one or more semiconductor dice disposed in a stacked relationship, systems using the same, and methods of making the same. In one exemplary package embodiment, one or more semiconductor dice are disposed on a leadframe that is disposed in a stacked relationship with the flexible module. In another embodiment, one or more semiconductor dice are attached to a surface of a flexible module. | 2009-12-24 |
20090315164 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ENCAPSULATION - An integrated circuit package system includes: connecting a carrier and an integrated circuit mounted thereover; preforming a wire-in-film encapsulation having a cavity; pressing the wire-in-film encapsulation over the carrier and the integrated circuit with the cavity exposing a portion of the integrated circuit; and curing the wire-in-film encapsulation. | 2009-12-24 |
20090315165 | Method and system for the modular design and layout of integrated circuits - An integrated circuit (IC) and fabrication method thereof is provided that include the steps of specifying a plurality of required tile modules suitable for a particular end application, each of the modular tiles being configured to perform a predetermined function and constructed to have approximately the same length and width dimensions. The modular tiles are used to form the IC in a standard IC fabrication process. In many implementations, physical layout of the IC does not include the step of routing. Capabilities also include configuring the modular tiles to have programmable performance parameters and configuring the modular tiles to cooperate usefully with one another based on a programmable parameter. | 2009-12-24 |
20090315166 | STACKED SEMICONDUCTOR DEVICES AND A METHOD FOR FABRICATING THE SAME - The present invention provides a semiconductor device that includes semiconductor packages arranged in a stacked configuration. A plurality of leads are drawn from the stacked semiconductor packages and folded around the outer shape of each semiconductor package such that the leads extend over the upper surfaces of the semiconductor package. Holders affix the stacked semiconductor packages so that first and second leads contact each other, the first leads being drawn from a first one of the stacked semiconductor packages at a lower stacking stage, and the second leads being drawn from a second one of the stacked semiconductor packages at an adjacent, upper stacking stage. | 2009-12-24 |
20090315167 | SEMICONDUCTOR DEVICE - A semiconductor device in which a plurality of semiconductor chips is stacked. A first semiconductor chip is stacked in a region, on a second semiconductor chip, in which a circuit that generates noise is not disposed within said second semiconductor chip, and a wire of a circuit that easily receives noise within said first semiconductor chip is disposed so as not to extend over said circuit that generates noise. | 2009-12-24 |
20090315168 | THROUGH BOARD STACKING OF MULTIPLE LGA-CONNECTED COMPONENTS - A package design is provided where a chip module is connected to a printed circuit board (PCB) via a land grid array (LGA) on the top surface of the PCB, and where a power supply is connected to the PCB via a second LGA on the bottom surface of the PCB. The stack of the chip module, power supply, and LGA is held in place and compressed with actuation hardware forming an adjustable frame. The package allows field replacibility of either the module, or the PS, and provides the shortest possible wiring distance from the PS to the module leading to higher performance. | 2009-12-24 |
20090315169 | FRAME AND METHOD OF MANUFACTURING ASSEMBLY - The frame ( | 2009-12-24 |
20090315170 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED CIRCUITRY AND POST, AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a shaped platform with a conductive post; mounting the shaped platform with the conductive post over a temporary carrier; mounting an integrated circuit device over the temporary carrier; encapsulating the conductive post and the integrated circuit device; removing a portion of the shaped platform isolating the conductive post; and removing the temporary carrier. | 2009-12-24 |
20090315171 | PIN SUBSTRATE AND PACKAGE - A semiconductor die package. Embodiments of the package can include a substrate with solid conductive pins disposed throughout. A semiconductor die can be attached to a surface of the substrate. Electrical connection to the semiconductor die can be provided by the solid conductive pins. | 2009-12-24 |
20090315172 | Semiconductor chip assembly - A semiconductor chip assembly includes a semiconductor chip and a pyrolytic graphite element that is an electrode that is electrically connected to and provides electrical conduction of current from the chip during operation of the chip. | 2009-12-24 |
20090315173 | HEAT-TRANSFER STRUCTURE - An apparatus | 2009-12-24 |
20090315174 | Semiconductor Die Separation Method - According to the invention, die shift is reduced or substantially eliminated, by cutting the wafer in two stages. In some embodiments a first wafer cutting procedure is carried out prior to thinning the wafer to the prescribed die thickness; and in other embodiments the wafer is thinned to the prescribed die thickness prior to carrying out a first wafer cutting procedure. The first wafer cutting procedure includes cutting along a first set of streets to a depth greater than the prescribed die thickness and optionally along a second set of streets to a depth less than the die thickness. The result of the first cutting procedure is an array of strips or blocks of die, each including a plurality of connected die, that are less subject to shift than are individual singulated die. In a second wafer cutting procedure the die are singulated by cutting through along the second set of streets. Subsequent to the first cutting procedure, and prior to the second cutting procedure, additional die preparation procedures that are sensitive to die shift may be carried out. | 2009-12-24 |
20090315175 | ELECTRODE STRUCTURE AND SEMICONDUCTOR DEVICE - In a power MOS transistor, for example, a source electrode is formed so as to be commonly connected to a plurality of source regions formed on the front surface. Thus, a current density varies based on in-plane resistance of the source electrode, thereby providing the necessity of increasing the number of wires connecting the sources and a lead. In the invention, an electrode structure includes a copper plating layer | 2009-12-24 |
20090315176 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE - A semiconductor package of this invention includes external electrode pad | 2009-12-24 |
20090315177 | Semiconductor package with joint reliability - A semiconductor package with improved joint reliability and a method of fabricating the semiconductor package are disclosed. A conductive connector may be formed on a surface of a semiconductor wafer on which semiconductor devices may be arranged. A first insulating layer including a first opening through which a portion of the connection pad is exposed may be formed on the connection pad and the semiconductor wafer. A rewiring line electrically connected to an exposed portion of the connection pad may be formed on the first insulating layer. A second insulating layer including a second opening through which a portion of the rewiring line is exposed may be formed on the rewiring line and the first insulating layer. A connection terminal including one or more entangled wires may be formed on an exposed portion of the rewiring line so as to be electrically connected to the rewiring line. | 2009-12-24 |
20090315178 | CONDUCTIVE BUMP, METHOD FOR PRODUCING THE SAME, AND ELECTRONIC COMPONENT MOUNTED STRUCTURE - A conductive bump formed on an electrode surface of an electronic component. This conductive bump is composed of a plurality of photosensitive resin layers having different conductive filler contents. Consequently, this conductive bump is able to realize conflicting functions, namely, improvement in adhesion strength with the electrode and reduction of contact resistance. | 2009-12-24 |
20090315179 | SEMICONDUCTOR DEVICE HAVING SOLDER BUMPS PROTRUDING BEYOND INSULATING FILMS - A semiconductor device having projection electrodes with a narrow pad pitch, and a method of forming such semiconductor device, are provided. On a semiconductor wafer, a polyimide film, which does not cover each of a plurality of lands, is prepared between the respective lands which adjoin each other among the plurality of lands on the main surface of the semiconductor wafer. A soldering paste material is applied by a printing method, via a mask for printing, on each of a plurality of lands after polyimide film formation, and a solder bump is formed by performing heat curing of the soldering paste material after removing the mask for printing. The solder bump can be provided without generating an electric short circuit between bumps even in the case of a narrow pad pitch. | 2009-12-24 |
20090315180 | Multi-layer thick metallization structure for a microelectronic device, intergrated circuit containing same, and method of manufacturing an integrated circuit containing same - A multi-layer thick metallization structure for a microelectronic device includes a first barrier layer ( | 2009-12-24 |
20090315181 | Liquid phase molecular self-assembly for barrier deposition and structures formed thereby - Methods and associated structures of forming a microelectronic structure are described. Those methods may comprise dissolving a metal precursor in a non-aqueous solvent in a bath; placing a substrate comprising an interconnect opening in the bath, wherein the metal precursor forms a monolayer within the interconnect opening; and placing the substrate in a coreactant mixture, wherein the coreactant reacts with the metal precursor to form a thin barrier monolayer. | 2009-12-24 |
20090315182 | SILICIDE INTERCONNECT STRUCTURE - A method for forming an interconnect structure includes forming a dielectric layer above a first layer having a conductive region defined therein. An opening is defined in the dielectric layer to expose at least a portion of the conductive region. A metal silicide is formed in the opening to define the interconnect structure. A semiconductor device includes a first layer having a conductive region defined therein, a dielectric layer formed above the first layer, and a metal silicide interconnect structure extending through the dielectric layer to communicate with the conductive region. | 2009-12-24 |
20090315183 | LAYER-STACKED WIRING AND SEMICONDUCTOR DEVICE USING THE SAME - A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide formation reaction between the microcrystalline silicon thin film and metal thin film, thereby preventing peeling of the thin film. In a polycrystalline silicon TFT (Thin Film Transistor) using the layer-stacked wiring, the microcrystalline silicon thin film is so configured that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 60% or more of a film thickness of the microcrystalline silicon thin film amount to 15% or less of total number of crystal grains or that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 50% or less of a film thickness of the microcrystalline silicon thin film amount to 85% or more of the total number of crystal grains making up the microcrystalline silicon thin film. | 2009-12-24 |
20090315184 | Semiconductor Device - Disclosed is a semiconductor device that is capable of preventing impurities such as moisture from being introduced into an active region at the time of dicing and at the time of bonding and that is capable of being easily miniaturized. The semiconductor device includes a cylindrical dummy wire having an opening for allowing a wire interconnecting a semiconductor element and an external connection terminal to pass therethrough, extending in an insulation film provided on a semiconductor layer having the semiconductor element to surround the semiconductor element, and disposed inside the external connection terminal. | 2009-12-24 |
20090315185 | SELECTIVE ELECTROLESS METAL DEPOSITION FOR DUAL SALICIDE PROCESS - A method for forming dual salicide contacts includes depositing a low or mid-gap work function metal selectively on an NMOS source/drain (S/D) region of a semiconductor device via electroless deposition; depositing a high work function metal selectively over the low work function metal and a PMOS source/drain (S/D) region of a semiconductor device via electroless deposition; annealing the semiconductor device to form a silicide of the low work function metal over the NMOS source/drain (S/D) region and a silicide of the high work function metal over the PMOS source/drain (S/D) region; and performing a SALICIDE etch to remove the unreacted metals from all regions of the substrate. | 2009-12-24 |
20090315186 | Method for manufacturing semiconductor device and the semiconductor device - An etching stopper film is formed on top of a first insulating film. The etching stopper film is a film formed by depositing at least two films, made of constituent materials identical in quality to each other, one another. Subsequently, a first opening pattern is formed in the etching stopper film. Subsequently, a second insulating film is formed on top of the etching stopper film. Subsequently, a mask pattern is formed on top of the second insulating film. Subsequently, the second insulating film is etched with the use of the mask pattern as a mask to be followed by etching of the first insulating film with the use of the etching stopper film as a mask. | 2009-12-24 |
20090315187 | Semiconductor device - A semiconductor device includes a lower semiconductor layer with first conductive regions and including at least one dummy first conductive region, an upper semiconductor layer with second conductive regions on the lower semiconductor layer and including at least one dummy second conductive region, a penetration hole in the upper semiconductor layer and penetrating the dummy second conductive region and the upper semiconductor layer under the dummy second conductive region, a lower conductive line on the lower semiconductor layer and electrically connected to the first conductive regions, an upper conductive line on the upper semiconductor layer and electrically connected to the second conductive regions, and a first conductive plug in the penetration hole between the lower conductive line and the upper conductive line, the first conductive plug electrically connecting the lower and upper conductive lines and being spaced apart from sidewalls of the penetration hole. | 2009-12-24 |
20090315188 | SILICON-ON-INSULATOR STRUCTURES FOR THROUGH VIA IN SILICON CARRIERS - A silicon-on-insulator (SOI) structure is provided for forming through vias in a silicon wafer carrier structure without backside lithography. The SOI structure includes the silicon wafer carrier structure bonded to a silicon substrate structure with a layer of buried oxide and a layer of nitride separating these silicon structures. Vias are formed in the silicon carrier structure and through the oxide layer to the nitride layer and the walls of the via are passivated. The vias are filled with a filler material of either polysilicon or a conductive material. The substrate structure is then etched back to the nitride layer and the nitride layer is etched back to the filler material. Where the filler material is polysilicon, the polysilicon is etched away forming an open via to the top surface of the carrier wafer structure. The via is then backfilled with conductive material. | 2009-12-24 |
20090315189 | Layered chip package and method of manufacturing same - A layered chip package includes a main body including a plurality of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip, an insulating portion covering at least one side surface of the semiconductor chip, and a plurality of electrodes connected to the semiconductor chip. The insulating portion has an end face located at the side surface of the main body on which the wiring is disposed. Each electrode has an end face surrounded by the insulating portion and located at the side surface of the main body on which the wiring is disposed. To manufacture the layered chip package, a layered chip package substructure is fabricated by: processing a semiconductor wafer to form a plurality of pre-semiconductor-chip portions aligned; forming at least one groove extending to be adjacent to at least one of the pre-semiconductor-chip portions; forming an insulating layer to fill the groove; and forming the electrodes. | 2009-12-24 |
20090315190 | WIRING BOARD, SEMICONDUCTOR DEVICE USING WIRING BOARD AND THEIR MANUFACTURING METHODS - A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires. | 2009-12-24 |
20090315191 | Semiconductor integrated circuit - In order to form a semiconductor integrated circuit capable of effectively using a chip area, there is provided a semiconductor integrated circuit ( | 2009-12-24 |
20090315192 | Method of manufacturing semiconductor device and semiconductor device - A method of manufacturing a semiconductor device includes at least bonding wires between electrode pads on a main surface of a semiconductor chip and connection pads on a wiring board. The wires form loop shapes from the electrode pads of the semiconductor chip. The method of manufacturing a semiconductor device also includes at least forming flat parts on the loop-shaped wires, and using a sealing material to seal the semiconductor chip such as to bury the flat parts. | 2009-12-24 |
20090315193 | SEMICONDUCTOR CHIP INCLUDING IDENTIFYING MARKS - A semiconductor chip includes a first mark for identifying a position of the chip within an exposure field. The semiconductor chip includes a first matrix in a first layer of the chip and a second mark within the first matrix identifying a position of the exposure field on a wafer. | 2009-12-24 |
20090315194 | Semiconductor chip having alignment mark and method of manufacturing the same - Disclosed is a semiconductor chip having an alignment mark which is formed on the surface of the semiconductor chip where no external connection bump is formed, and which has the position information of the external connection bump. A method of manufacturing the semiconductor chip having an alignment mark is also provided. Because the semiconductor chip includes the alignment mark having the position information of the external connection bump, the external connection bump is matched with a via which is formed in the external circuit layer of a printed circuit board including the semiconductor chip, thus improving electrical connection with the printed circuit board, and increasing the reliability of the printed circuit board including the semiconductor chip. | 2009-12-24 |
20090315195 | Carburettors - A carburettor includes a flow duct ( | 2009-12-24 |
20090315196 | DEVICE FOR GAS-LIQUID CONTACTING - One exemplary embodiment can be a device for a gas-liquid contacting apparatus. The gas-liquid contacting apparatus can include a member. The member can include:
| 2009-12-24 |
20090315197 | CONSTANT TEMPERATURE GAS/LIQUID MIXTURE GENERATING SYSTEM FOR USE IN WAFER DRYING PROCESS - A constant temperature gas/liquid mixture generating system for using in wafer drying process includes: an interior tank; a first liquid supplying device for supplying liquid IPA to the interior tank; a gas supplying device for supplying nitrogen to the interior tank; an exhausting device for exhausting IPA and nitrogen mixture from said constant temperature gas/liquid mixture generating system; an exterior tank, surrounding the interior tank; a second liquid supplying device for supplying a second liquid to the exterior tank; a temperature control device for controlling the second liquid to be within a desired temperature range; and a draining device for draining the second liquid out of the exterior tank. | 2009-12-24 |
20090315198 | Metal Mold Assembly for Optical Part and Method of Setup Therefor - A mold assembly that is adapted to clamp fixed mold and movable mold together while making temperature adjustment and inject a molding material into a molding cavity provided therebetween, thereby producing an optical part. The mold assembly is one including fixed platen supporting fixed mold, provided on a part of its mold-side surface with locating hole and including ring of configuration with external and internal surfaces, fitted at its external surface in the locating hole, wherein the fixed mold is provided with a locating projection protruding toward the fixed platen, fitted in the internal surface of the locating hole, and wherein the ring consists of a material whose linear expansion coefficient is smaller than those of the material of the fixed platen and the material of the locating projection. | 2009-12-24 |
20090315199 | PHOTOCHROMIC COATING EXHIBITING IMPROVED PERFORMANCE - A photochromic coating exhibiting improved performance and photochromic lenses made using the coating. The coating has excellent photochromic darkening and fatigue properties. The coating formulation is made from a monomer blend having at least two different types of monomers. A metal salt catalyst is used along with an initiator. An antioxidant is used in combination with a hindered amine light stabilizer. The coating is suitable for use in an in-mold coating process. | 2009-12-24 |
20090315200 | METHOD FOR MAKING LENS ARRAY - A method for making a lens array, is provided. The method includes: providing a mold core having a plurality of molding surfaces to form the optical surfaces of the lenses; applying a molding material on the mold core; placing a transparent sheet on the molding material and pressing the molding material toward the molding surfaces of the mold core, the transparent sheet having a smooth surface for contacting the molding material; applying a given light beam onto the transparent sheet to solidify the molding material beneath the transparent sheet; and removing the mold core and the transparent sheet to obtain a lens array. | 2009-12-24 |
20090315201 | METHOD OF FORMING MICRO-LENSES - A method of fabricating micro-lenses is provided. A first layer is formed on a substrate. The first layer is comprised of a first material and the substrate is comprised of a second material. An opening is formed in the first layer and an etchant is provided in the opening to etch both the substrate and the first layer to form a first mold for a first micro-lens. The etchant etches the first layer at a different rate than the substrate. A lens material is added to the etched molds to form micro-lenses. | 2009-12-24 |
20090315202 | METHOD OF SHAPING AN ASPHERICAL OPTICAL ELEMENT - A method of shaping an aspherical optical element, such as a composite mirror element, the method comprising the following steps: | 2009-12-24 |
20090315203 | Method For Producing Microparticles In A Continuous Phase Liquid - A continuous phase liquid and a dispersed phase liquid are permitted to flow together through a co-flow channel. Preferably, the dispersed phase liquid is arranged to flow within the flowing body of the continuous phase liquid in the co-flow channel so that the dispersed phase liquid is sheathed by the continuous phase liquid. The continuous phase and dispersed phase liquids are comminuted into microparticles in the co-flow channel by intermittently blocking the co-flow channel. | 2009-12-24 |
20090315204 | Method for Producing Polymer Particles by the Polymerization of Fluid Drops in a Gas Phase - A process for producing polymer particles by polymerizing liquid droplets in a gas phase by metering a liquid comprising at least one monomer from at least one feed by means of a multitude of bores into a reaction chamber comprising the gas phase, wherein ratio of length of the feed to greatest diameter of the feed in the region of the multitude of bores is at least 10. | 2009-12-24 |
20090315205 | CONTROL METHOD OF INJECTION MOLDING AND CONTROL APPARATUS OF INJECTION MOLDING - A control method of injection molding includes the steps of: filling molten resin in an injection molding die by velocity control until a detection value of a filling pressure of the molten resin reaches a first set pressure value; filling the molten resin by switching control from the velocity control to pressure control by which the control is performed at the first set pressure value at a time point when the detection value of the filling pressure reaches or exceeds the first set pressure value; and switching the control to holding pressure control by which the control is performed at a second set pressure value at a time point when the filling velocity drops to or below a set velocity while filling is performed by the pressure control. | 2009-12-24 |
20090315206 | Positionable gas injection nozzle assembly for an underwater pelletizing system - A positionable gas nozzle assembly having a nozzle tube for injecting and directing pressurized air or other inert gas into a pellet slurry so as to increase the velocity of the slurry from a pelletizer to and through a dryer. The variably positionable nozzle tube can be inserted, retracted and/or intermediately positioned either manually or using an automated control system. The automated control system preferably includes a pneumatic cylinder movably engaged with a carriage that is fixedly coupled to the nozzle tube. The pneumatic cylinder contains a piston that is magnetically coupled with the carriage such that movement of the piston in response to the injection of pressurized air into the cylinder also moves the carriage and the nozzle tube to obtain the variable positions. | 2009-12-24 |
20090315207 | SIZER FOR FORMING SHAPED POLYMERIC ARTICLES AND METHOD OF SIZING POLYMERIC ARTICLES - A sizer assembly for providing a shaped polymeric article in an extrusion process includes a sizer body having a product profile channel corresponding to the shaped polymeric article formed therethrough. The sizer body includes a plurality of cooling liquid inlet slots forming an opening substantially around the product profile channel and a plurality of vacuum slots forming an opening substantially around the product profile channel for removing cooling liquid expelled from said cooling liquid inlet slots. | 2009-12-24 |
20090315208 | BIOABSORBABLE STENTS WITH REINFORCED FILAMENTS - According to an aspect of the present invention, a stent is provided, which contains at least one filament that has a longitudinal axis and comprises a bioabsorbable polymeric material. Polymer molecules within the bioabsorbable polymeric material are provided with a helical orientation which is aligned with respect to the longitudinal axis of the filament. The stent is at least partially bioabsorbed by a patient upon implantation or insertion of the stent into the patient. | 2009-12-24 |
20090315209 | Polypropylene/soy-protein compositions of bio-composite materials, bio-composite sheet using that and preparing method thereof - The present invention relates to polypropylene/soybean protein composition for a bio-composite material for an automotive interior or exterior material, a bio-composite sheet prepared by using the composition and its preparation method, and particularly relates to composition for a bio-composite material comprising polypropylene resin, soy protein particles and ZnSO | 2009-12-24 |
20090315210 | PRODUCTION ASSEMBLY AND PROCESS FOR MASS MANUFACTURE OF A THERMOPLASTIC PALLET INCORPORATING A STIFFENED INSERT - An assembly and related process for mass producing a resin coated article including an input line transporting a plurality of inserts and an output line removing the resin coated articles. One or more mold supporting and closed loop conveyor lines extend between the input and output lines, the conveyor line including a mold assembly line and an empty mold return line. A first lift and transfer mechanism communicates between the input line and mold assembly line for collecting, in succession, an insert and an upper mold half for installation with a lower mold half supported upon the assembly line. A mixing and dispensing station communicates with each mold in succession to fill an interior thereof with a viscous and curable resin material. A second lift and transfer mechanism is communicable between the mold assembly line and output line for removing the finished articles from the mold and depositing upon the output line, concurrent with redirecting the empty mold halves along return lines for redelivery to said mold assembly line. | 2009-12-24 |
20090315211 | Hand and object casting method and kit - A hand and object casting method and kit, introduction sheet FIG. | 2009-12-24 |
20090315212 | INTERMITTENT FILM FORMING SYSTEM AND INTERMITTENT FILM FORMING METHOD - An intermittent film forming system is provided, comprising a mold having a fine projections and depressions shape formed on the surface, a press for pressing a film to the surface of the mold, a transportation for carrying the film, and a releasing device for releasing the film from the mold surface. The releasing device is provided with a stripper roll for stripping the film, a means for rotary driving the stripper roll, an auxiliary roll arranged substantially in parallel with the stripper roll across a film path line, a means for moving the auxiliary roll on the periphery of the stripper roll such that the film embraces the stripper roll, and a guide for moving the stripper roll and the auxiliary roll in the vicinity of the surface of the mold in parallel therewith, while maintaining the relative positional relationship that the film embraces the stripper roll. | 2009-12-24 |
20090315213 | METHOD FOR PRODUCING TWIN TANK RAILS FOR TWO-WHEELED VEHICLE - A method for producing light-weight twin tank rails of a two-wheeled vehicle including bending a rear portion of each of a pair of tubular rails downward using a roll bending machine to form a pair of primarily bent tubular rails. Each of the primarily bent tubular rails is bent using a press molding machine at its front portion to form a pair of secondarily bent tubular rails. Then, a pressurized liquid is fed into each of the second secondarily bent tubular rails while maintaining the secondarily bent tubular rail in the mold cavity of the press molding machine to plastically deform the peripheral wall thereof into conformity with the mold cavity of the corresponding press molding machine. | 2009-12-24 |
20090315214 | MELT MOLDING POLYMER COMPOSITE AND METHOD OF MAKING AND USING THE SAME - The invention relates to a hot melt dispensable polymeric composite and process for making and using the composite. Particulates of adequate particle size are mixed with a polymer that exhibits low viscosities at temperatures typically provided by hot-melt glue guns to form rods that vary significantly in density from the base polymer. Novel articles can be manufactured by dispensing the composite from a glue gun into molds or by placement of the melt molding compound into preformed cavities within an end article. | 2009-12-24 |
20090315215 | MOLDING MOLD AND MANUFACTURING METHOD OF MOLDED PRODUCT - A molding mold includes a runner to fill a molding material from a sprue to a cavity, the runner including a bent portion, in which a cross-sectional area of a flow channel passing through an inner side of the bent portion and a cross-sectional area of a flow channel passing through an outer side of the bent portion are different from each other in at least one region along the runner from the bent portion to the cavity. | 2009-12-24 |
20090315216 | MOLDING STATION WITH DEFORMABLE MOLD AND METHOD - A molding station and method comprising a hopper having a mouth closable with at least a lower door and a mold to be filled, the hopper and the mold being movable to a filling position in which the hopper is closed by the lower door; the lower door then opening to allow an amount of moldable material to be released into the mold; the mold being made in a deformable material, so that an interior volume of the mold is temporarily reduced when releasing the moldable material into the mold. | 2009-12-24 |
20090315217 | METHOD OF FABRICATING STRUCTURE - In a method of fabricating a structure by plastically deforming a processing portion provided at a movable segment, a restraint segment configured to restrain movement of the movable segment is provided before an external force is applied to the processing portion. After processing of the processing portion is completed, the restraint segment is removed. | 2009-12-24 |
20090315218 | INJECTION MOLD AND MOLDING METHOD FOR RESIN MOLDING - Molten resin supplied from a sprue to a runner in a mold closed state flows substantially radially in the runner and then flows from an entire circumferential edge portion of the runner into a cavity via a film gate. When the molten resin is filled in the cavity and molding is completed, the core part is slid while keeping the mold closed state to thereby cut a thin portion formed in the film gate in a manner of pulling the runner part by Z pins. After gate cutting, when the movable mold is opened with respect to the fixed mold, the resin molding (ring-shaped part) formed in the cavity is taken out. | 2009-12-24 |
20090315219 | SCREW DESIGNS HAVING IMPROVED PERFORMANCE WITH LOW MELTING PET RESINS - Disclosed is a process for a melt processing a polyethylene terephthalate resin characterized by one or more of the following. The polyester particles may have at least two melting peaks wherein one of the at least two melting peaks is a low peak melting point with a range from 140° C. to 220° C., or from 140° C. to 230° C., and having a melting endothermic area of at least the absolute value of 1 J/g. The polyester particles may have one or more melting peaks at least one of which when measured on a DSC first heating scan has a heating curve departing from a baseline in the endothermic direction at a temperature of less than or equal to 200° C. The polyester particles may have an It.V. at their surface which is less than 0.25 dL/g higher than the It.V. at their center. The polyester particles may have not been solid stated. The melt processing device comprises a screw with a total length, L, a feed zone length in the range from 0.16L and 0.45L, a taper angle, φ, in the range from 0.5 degrees and 5.0 degrees and a compression ratio, CR, in the range from 2.0 and 5.0. | 2009-12-24 |
20090315220 | MELT PURIFICATION AND DELIVERY SYSTEM - An apparatus to pump a melt is disclosed. The pump has a chamber that defines a cavity configured to hold the melt. A gas source is in fluid communication with the chamber. A first valve is between the chamber and a first pipe and a second valve is between the chamber and a second pipe. The valves may be check valves in one embodiment. | 2009-12-24 |
20090315221 | METHOD FOR DEMOLDING CERAMIC PRODUCTS AND APPARATUS FOR IMPLEMENTING THE METHOD - A demolding method for extracting a ceramic product ( | 2009-12-24 |
20090315222 | Apparatus, System And Method For Manufacturing A Plugging Mask For A Honeycomb Substrate - A method and system for manufacturing a mask for plugging cells in a honeycomb substrate includes capturing an image of the substrate's end through an end-adhered transparent or translucent film using a camera, forming openings using a laser, wherein a working distance, WD | 2009-12-24 |
20090315223 | TEMPLATE AND PATTERN FORMING METHOD - A template includes a substrate, an element pattern formed on a surface of the substrate, and a light absorbing portion formed on or inside the substrate. | 2009-12-24 |
20090315224 | METHOD FOR MAKING SHAPED FILTRATION ARTICLES - Shaped filtration articles are made from a monocomponent nonwoven web formed by flowing first and second fiber-forming materials of the same polymeric composition through first and second die cavities in respective fluid communication with first and second sets of orifices in a meltblowing die tip. The first fiber-forming material flows at a lesser flow rate or viscosity through the first die cavity and first set of orifices to form a set of smaller size filaments and the second fiber-forming material flows at a greater flow rate or viscosity through the second die cavity and second set of orifices to form a set of larger size filaments. The collected nonwoven web contains a meltblown bimodal mass fraction/fiber size mixture of intermingled continuous microfibers and larger size fibers of the same polymeric composition. | 2009-12-24 |
20090315225 | BLADDER-MOLDED FISHING ROD AND METHOD OF MANUFACTURING SAME - A method of forming a fishing rod with at least one integrally formed support includes providing a bladder over a mandrel, wrapping a resin-impregnated material over the bladder to provide a wrapped resin-impregnated material, removing the mandrel from the wrapped resin-impregnated material, folding the wrapped resin-impregnated material onto itself at least once to form a tubular body, wherein folding the wrapped resin-impregnated material forms at least two separate bladder portions and the integrally formed support within the tubular body, placing the tubular body into a mold, and molding the tubular body to provide the fishing rod with the integrally formed support. | 2009-12-24 |
20090315226 | Injection Stretch Blow Molded Articles and Polymers for Use Therein - Injection stretch blow molded (ISBM) articles and methods of forming the same are described herein. The ISBM articles generally include a propylene-based impact copolymer. | 2009-12-24 |
20090315227 | Method for making a refractory ceramic material having a high solidus temperature - A powder metallurgy process for the manufacture of powders of a refractory ceramic material, comprising the consecutive steps of:
| 2009-12-24 |
20090315228 | METHOD AND DEVICE FOR COOLING AND STABILIZING STRIP IN A CONTINUOUS LINE - The invention concerns a method for cooling metal strips using cooling chambers by blowing a gas, in a continuous heat treatment line, wherein: the chambers ( | 2009-12-24 |
20090315229 | INDUSTRIAL PLANT HAVING SAFETY-RELEVANT AREA - In an industrial plant for producing or processing liquid, red-hot or hot metal a safety-relevant area is formed in the direct vicinity of the liquid or red-hot metal and the presence of a person is at least periodically not allowed. A detector unit is provided for the surveillance of the area, detecting electromagnetic radiation emitted by a present person or identifying the absence of electromagnetic radiation blocked by a present person. Furthermore, an evaluation unit is able to detect the presence of a person from the output data of the detector unit, and for a control unit which is connected to the evaluation unit. If a person is present in the safety-relevant area, the control unit automatically initiates an action acting against the presence of the person. By forming a plurality of safety-relevant areas having different danger levels, gentle stopping of the industrial plant is made possible. | 2009-12-24 |
20090315230 | BLAST FURNACE GAS BURNING FACILITY AND METHOD FOR OPERATING THE SAME - Provided is a blast furnace gas burning facility with a simple configuration and capable of operating at nearly rated load while preventing a wet type dust collector from freezing under such conditions that the temperature of blast furnace gas does not exceed the freezing lower-limit temperature of the wet type dust collector, and also provided is a method for operating the blast furnace gas burning facility. In a blast furnace gas burning facility 1 that burns blast furnace gas discharged from a blast furnace by supplying the gas to a combustor | 2009-12-24 |
20090315231 | COOLING SYSTEM FOR FORMING MOLD AND METHOD OF COOLING FORMING MOLD - In a forming mold equipped with a cooling channel for circulation of a refrigerant composed of a cooling gas and a atomized cooling liquid, any increase of back pressure attributed to evaporation of the refrigerant fed to the cooling channel is inhibited to thereby attain cooling acceleration, and further any occurrence of rust or scale by the refrigerant circulated through the cooling channel is prevented. Accordingly, a channel for supply of the refrigerant to the cooling channel of the forming mold is provided with air pressure source for trapping of air in the supply channel and pressure feeding of the same; oxygen separation means for separation removal of oxygen from the pressure fed air to thereby lower the oxygen concentration of the air; and atomizing means for spraying of the cooling liquid into the air with oxygen concentration lowered. The oxygen separated from the air by the oxygen separation means is returned to the refrigerant forcedly emitted from the cooling channel by means of forced exhaust means. | 2009-12-24 |
20090315232 | Dissolution Apparatus for Noble Metals - Provided is an apparatus for dissolving noble metals, including: a sealed dissolution reactor provided with agitators; a sealed electrolysis type chlorine producing unit for supplying chlorine gas produced via electrolysis to the dissolution reactor; a pH adjusting unit for controlling and maintaining pH of the liquid inside the dissolution reactor to convert the chlorine gas supplied to the dissolution reactor into a chlorine compound; and an inorganic material extraction unit for extracting inorganic materials from the liquid received from the dissolution reactor via heating/evaporation, wherein the pH adjusting unit controls pH of the liquid inside the dissolution reactor in such a manner that the chlorine compound is produced, the noble metal in a noble metal-containing sample introduced into the dissolution reactor is dissolved by the chlorine compound, and the liquid evaporated from the inorganic material extraction unit is recycled to the dissolution reactor. | 2009-12-24 |
20090315233 | PROCESS AND INSTALLATION FOR GRANULATING SLAG - In a process for granulating slag, from a blast furnace or a smelting reduction plant, in which a granule/water mixture formed during the granulation is fed to a granulation tank and then to a dewatering installation, in which the slag granules are dewatered. H | 2009-12-24 |
20090315234 | SEALING APPARATUS FOR A SLAG DOOR OF A METALLURGICAL FURNANCE - A sealing apparatus for a slag door of a metallurgical furnace, having a mounting assembly for mounting the apparatus to the furnace, and at least one closure element, moveable from an open position that is exterior of the slag door opening, to a closed position that effectively seals against the slag door and extends into the slag door opening with the rear panel of the closure element(s) being proximally aligned with the interior wall of the furnace. The apparatus may also have at least one wiping component moveable so as to sweep across the lower surface of the slag door to remove obstructions. | 2009-12-24 |
20090315235 | AXIAL SHEAR-LEG ISOLATOR - An elastomeric isolator has an elastomeric body which incorporates an inner structural member that extends through an outer structural member. The elastomeric body includes an axial shear leg extending between the inner and outer structural members that undergo shearing stresses during deflection of the elastomeric isolator. The inner structural member includes radial flanges which are axially offset from radial flanges of the outer structural member. The axial shear leg extends between the pair of radial flanges and is bonded to them at a position outside of the outer structural member. With this configuration compression of the shear hub during high loads is avoided. | 2009-12-24 |
20090315236 | STRIP OFF PIN CLAMP - A pin clamp assembly is provided that includes a housing, a locating pin, and a finger. The locating pin is movable with respect to the housing. The locating pin can also selectively entirely retract inside the housing. A finger is supported by the locating pin and retractable and extendable into and out of the locating pin. The finger is also extendable out of the locating pin when at least a portion of the locating pin supporting the finger is exterior of the housing. | 2009-12-24 |