52nd week of 2010 patent applcation highlights part 51 |
Patent application number | Title | Published |
20100330770 | Diodes, And Methods Of Forming Diodes - Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes. | 2010-12-30 |
20100330771 | Moisture Barrier Capacitors in Semiconductor Components - Structures and methods of forming moisture barrier capacitor on a semiconductor component are disclosed. The capacitor is located on the periphery of a semiconductor chip and includes an inner plate electrically connected to a voltage node, an outer plate with fins for electrically connecting to a different voltage node. | 2010-12-30 |
20100330772 | METHODS FOR DEPOSITING HIGH-K DIELECTRICS - Methods for depositing high-K dielectrics are described, including depositing a first electrode on a substrate, wherein the first electrode is chosen from the group consisting of platinum and ruthenium, applying an oxygen plasma treatment to the exposed metal to reduce the contact angle of a surface of the metal, and depositing a titanium oxide layer on the exposed metal using at least one of a chemical vapor deposition process and an atomic layer deposition process, wherein the titanium oxide layer comprises at least a portion rutile titanium oxide. | 2010-12-30 |
20100330773 | SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS - Provided is a substrate processing method, which can fill an insulating film in a groove having a small width with a high aspect ratio and improve the productivity. The substrate processing method comprises loading a substrate into a processing chamber, supplying silicon compound gas including carbon and hydrogen into the processing chamber, irradiating ultraviolet light on the silicon compound gas supplied into the processing chamber to process the substrate, unloading the processed substrate from the processing chamber, and processing the inside of the processing chamber with excited oxygen-containing gas. Accordingly, an adhered matter generated when irradiating the ultraviolet light on the silicon compound gas to process the substrate and adhered to a structure such as an inner wall of the processing chamber can be processed with the excited oxygen-containing gas to modify it. | 2010-12-30 |
20100330774 | METHOD OF FORMING SEMICONDUCTOR DEVICE - A semiconductor device may include, but is not limited to, first and second well regions, and a well isolation region isolating the first and second well regions. The first and second well regions each may include an active region, a device isolation groove that defines the active region, and a device isolation insulating film that fills the device isolation groove. The first and second well regions may include first and second well layers, respectively. The well isolation region may include a well isolation groove, a well isolation insulating film that fills the well isolation groove, and a diffusion stopper layer disposed under a bottom of the well isolation groove. The first and second well layers have first and second bottoms respectively, which are deeper in depth than a bottom of the device isolation groove and shallower in depth than the bottom of the well isolation groove. | 2010-12-30 |
20100330775 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH BURIED GATE - A method for fabricating a semiconductor device with a buried gate includes: etching a substrate to form a plurality of trenches; forming a plurality of buried gates that fill lower portions of the trenches; forming a plurality of sealing layers that gap-fill upper portions of the trenches and have protrusions higher than a top surface of the substrate; forming an inter-layer insulation layer over the whole surface of the substrate including the sealing layers; and etching the inter-layer insulation layer to form a contact hole that is aligned with a space between the protrusions of the sealing layers. | 2010-12-30 |
20100330776 | BONDING APPARATUS AND METHOD - A bonding apparatus and method holds first and second bodies peripherally, one above the other, on respective shelves. A lower heat-transfer body is configured to lift the first body from below and press the first and second bodies against an upper heat-transfer body to enable bonding between the first and second bodies. | 2010-12-30 |
20100330777 | METHOD FOR REPROCESSING SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SOI SUBSTRATE - Disclosed is a method for reprocessing a semiconductor substrate which is by-produced in manufacturing a silicon-on-insulator substrate. The method includes: forming an embrittlement layer in a single crystal semiconductor substrate; bonding the single crystal semiconductor substrate with a base substrate having an insulating surface; and separating the single crystal semiconductor substrate along the embrittlement layer to give a silicon-on-insulator substrate and a semiconductor substrate to be reprocessed. The above steps provide, in the peripheral portion on the semiconductor substrate, a projection comprising the embrittlement layer and a single crystal semiconductor layer over the embrittlement layer. The method is characterized by an etching step to selectively remove the projection without etching a portion where the projection is absent, which allows the semiconductor substrate to be reused for the production of another silicon-on-insulator substrate. | 2010-12-30 |
20100330778 | METHOD FOR REPROCESSING SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SOI SUBSTRATE - The embrittlement layer and the semiconductor layer remaining on the periphery of the semiconductor substrate after separation are selectively removed using a mixed solution containing a substance functioning as an oxidizer for oxidizing a semiconductor, a substance dissolving an oxide of a semiconductor, and a substance functioning as a decelerator of oxidization of a semiconductor and dissolution of an oxide of a semiconductor. Note that the semiconductor film is separated from the semiconductor substrate along an embrittlement layer that is formed in the semiconductor substrate by implantation of an H | 2010-12-30 |
20100330779 | METHOD FOR MANUFACTURING SOI SUBSTRATE AND SOI SUBSTRATE - A bond substrate is irradiated with accelerated ions to form an embrittled region in the bond substrate; an insulating layer is formed over a surface of the bond substrate or a base substrate; the bond substrate and the base substrate are bonded to each other with the insulating layer interposed therebetween; a region in which the bond substrate and the base substrate are not bonded to each other and which is closed by the bond substrate and the base substrate is formed in parts of the bond substrate and the base substrate; the bond substrate is separated at the embrittled region by heat treatment; and a semiconductor layer is formed over the base substrate. | 2010-12-30 |
20100330780 | MULTI-FUNCTION TAPE FOR A SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - A multifunction tape for a semiconductor package and configured to bond to a device-formed side of a semiconductor substrate having a plurality of devices thereon while performing a process of grinding a side of the semiconductor substrate opposite to the device-formed side and a process of dicing the semiconductor substrate into individual chips with a dicing tape having a UV-curable adhesive layer bonded to the ground side of the semiconductor substrate, the multifunction tape being bonded to the individual chips while the individual chips, separated from each other by the dicing process, are picked up and die-attached and a method of manufacturing a semiconductor device using the same, the multifunction tape including a base film; a UV-curable adhesive layer on one side of the base film; and first and second bonding layers on the adhesive layer. | 2010-12-30 |
20100330781 | SUBSTRATE PROCESSING APPARATUS , METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SUBSTRATE - There are provided a substrate processing apparatus, a method of manufacturing a semiconductor device, and a method of manufacturing a substrate, for growing a SiC epitaxial film at a high-temperature condition. The substrate processing apparatus comprises: a reaction chamber; a first gas supply system configured to supply at least a gas containing silicon atoms and a gas containing chlorine atoms, or a gas containing silicon and chlorine atoms; a second gas supply system configured to supply at least a reducing gas; a third gas supply system configured to supply at least a gas containing carbon atoms; a first gas supply nozzle connected to the first gas supply system or the first and third gas supply systems; a second gas supply nozzle connected to the second gas supply system or the second and third gas supply systems; and a controller configured to control the first to third gas supply systems. | 2010-12-30 |
20100330782 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - A semiconductor region having an upper surface and a side surface is formed on a substrate. A first impurity region is formed in an upper portion of the semiconductor region. A second impurity region is formed in a side portion of the semiconductor region. The resistivity of the second impurity region is substantially equal to or smaller than that of the first impurity region. | 2010-12-30 |
20100330783 | ELECTRICAL FUSE HAVING A FULLY SILICIDED FUSELINK AND ENHANCED FLUX DIVERGENCE - A contiguous block of a stack of two heterogeneous semiconductor layers is formed over an insulator region such as shallow trench isolation. A portion of the contiguous block is exposed to an etch, while another portion is masked during the etch. The etch removes an upper semiconductor layer selective to a lower semiconductor layer in the exposed portion. The etch mask is removed and the entirety of the lower semiconductor layer within the exposed region is metallized. A first metal semiconductor alloy vertically abutting the insulator region is formed, while exposed surfaces of the stack of two heterogeneous semiconductor layers, which comprises the materials of the upper semiconductor layer, are concurrently metallized to form a second metal semiconductor alloy. An inflection point for current and, consequently, a region of flux divergence are formed at the boundary of the two metal semiconductor alloys. | 2010-12-30 |
20100330784 | METHOD FOR PREPARING COMPOUND SEMICONDUCTOR SUBSTRATE - Provided is a method for preparing a compound semiconductor substrate. The method includes coating a plurality of spherical balls on a substrate, growing a compound semiconductor epitaxial layer on the substrate coated with the spherical balls while allowing voids to be formed under the spherical balls, and cooling the substrate on which the compound semiconductor epitaxial layer is grown so that the substrate and the compound semiconductor epitaxial layer are self-separated along the voids. The spherical ball treatment can reduce dislocation generations. In addition, because the substrate and the compound semiconductor epitaxial layer are separated through the self-separation, there is no need for laser lift-off process. | 2010-12-30 |
20100330785 | METHOD OF MANUFACTURING CRYSTALLINE SEMICONDUCTOR THIN FILM - Provided is a method of manufacturing a crystalline semiconductor thin film formed on an amorphous or poly-crystalline substrate such as a glass substrate, a ceramic substrate, and a plastic substrate through induction heating using photo-charges. The method of manufacturing a crystalline semiconductor thin film includes a process of forming a low-concentration semiconductor layer on an inexpensive amorphous or poly-crystalline substrate such as a glass substrate, a ceramic substrate, and a plastic substrate and a process of crystallizing the low-concentration semiconductor layer through an induction heating manner using photo-charges. Accordingly, a low-concentration crystalline semiconductor thin film having characteristics better than those of general amorphous or poly-crystalline semiconductor thin film can be obtained by using simple processes at low production cost. | 2010-12-30 |
20100330786 | Method For Producing An Epitaxially Coated Semiconductor Wafer - Epitaxially coated semiconductor wafers are produced by minimally the following steps in the order specified: (a) depositing an epitaxial layer on one side of a semiconductor wafer; (b) first polishing the epitaxially coated side of the semiconductor wafer with a polishing pad with fixed abrasive while supplying a polishing solution which is free of solids; (c) CMP polishing of the epitaxially coated side of the semiconductor wafer with a soft polishing pad which contains no fixed abrasive, while supplying a polishing agent suspension; (d) depositing another epitaxial layer on the previously epitaxially coated and polished side of the semiconductor wafer. | 2010-12-30 |
20100330787 | APPARATUS AND METHOD FOR ULTRA-SHALLOW IMPLANTATION IN A SEMICONDUCTOR DEVICE - Methods and devices for forming an ultra-thin doping layer in a semiconductor substrate include introducing a thin film of a dopant onto a surface of the substrate and driving at least a portion of the thin dopant layer into a surface of the semiconductor. Gas ions used in the driving-in process may be inert to minimize contamination during the drive in process. The thin films can be deposited using know methods, such as physical deposition and atomic layer deposition. The dopant layers can be driven into the surface of the semiconductor using known techniques, such as pulsed plasma discharge and ion beam. In some embodiments, a standard ion implanter can be retrofit to include a deposition source. | 2010-12-30 |
20100330788 | THIN WAFER HANDLING STRUCTURE AND METHOD - A thin wafer handling structure includes a semiconductor wafer, a release layer that can be released by applying energy, an adhesive layer that can be removed by a solvent, and a carrier, where the release layer is applied on the carrier by coating or laminating, the adhesive layer is applied on the semiconductor wafer by coating or laminating, and the semiconductor wafer and the carrier is bonded together with the release layer and the adhesive layer in between. The method includes applying a release layer on a carrier, applying an adhesive layer on a semiconductor wafer, bonding the carrier and the semiconductor wafer, releasing the carrier by applying energy on the release layer, e.g. UV or laser, and cleaning the semiconductor's surface by a solvent to remove any residue of the adhesive layer. | 2010-12-30 |
20100330789 | Method of Forming Nonvolatile Memory Device - A method of forming the gate patterns of a nonvolatile memory device comprises stacking a gate insulating layer and a first conductive layer over a semiconductor substrate; forming isolation hard mask patterns over the first conductive layer; etching the first conductive layer using the isolation hard mask patterns as etch barriers, thus exposing the gate insulating layer; etching the gate insulating layer using the isolation hard mask patterns as etch barriers, thus exposing the semiconductor substrate; after exposing the semiconductor substrate, forming a passivation layer on the sidewalls of the first conductive layers and on the sidewalls of the gate insulating layers; and etching the semiconductor substrate using the passivation layer and the isolation hard mask patterns as etch barriers, thus forming trenches in the semiconductor substrate. | 2010-12-30 |
20100330790 | TECHNIQUE FOR EXPOSING A PLACEHOLDER MATERIAL IN A REPLACEMENT GATE APPROACH BY MODIFYING A REMOVAL RATE OF STRESSED DIELECTRIC OVERLAYERS - In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process. | 2010-12-30 |
20100330791 | Method for Fabricating Contacts in Semiconductor Device - Disclosed is a method for fabricating a contact in a semiconductor device, including: obtaining a pattern layout including bit lines arranged across a cell matrix region of a semiconductor substrate, cell storage node contacts arranged to pass through a portion of a first interlayer insulation layer between the bit lines, and dummy storage node contacts additionally arranged in an end of the arrangement of the cell storage node contacts; and forming the cell storage node contacts and the dummy storage node contacts using the pattern layout. | 2010-12-30 |
20100330792 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes the steps of forming conductive patterns on a substrate; forming an interlayer dielectric between the conductive patterns; defining contact holes in the interlayer dielectric to expose portions of the substrate between the conductive patterns; forming a first conductive layer on a surface including the contact holes; forming contact plugs in such a way as to be isolated in the respective contact holes, by etching a surface of the first conductive layer to expose upper end surfaces of the conductive patterns; etching a partial thickness of the conductive patterns so that the upper end surfaces of the conductive patterns are lower than an upper end surface of the interlayer dielectric; and forming an insulation layer on the resultant structure. | 2010-12-30 |
20100330793 | METHOD FOR FORMING SEMICONDUCTOR DEVICE - A method for forming a highly integrated semiconductor device having multiplayer conductive lines is presented. The method includes the operations of forming, etching, burying and forming. The first forming operation includes forming a line-type conductive layer on a semiconductor substrate including a buried gate to expose the gate. The etching operation includes etching the conductive layer to expose at least a region between one side of an active area defined in the semiconductor substrate and an opposite side of the neighboring active area, both the active areas being arranged next to each other in a major axis direction of the gate. The burying operation includes burying a first insulating film in the etched line-type conductive layer. The second forming operation includes forming a bit line passing through the center of the active area in a direction perpendicular to the major axis direction of the gate. | 2010-12-30 |
20100330794 | METHOD FOR CLEANING A SEMICONDUCTOR DEVICE - There is provided a method for cleaning a semiconductor device capable of making compatible the inhibition of dissolution of a gate metal material and the acquisition of a favorable contact resistance. A method for cleaning a semiconductor device includes steps: a semiconductor substrate including silicon, and having a main surface is prepared; a multilayer gate including a metal layer and a silicon layer stacked sequentially from the bottom is formed over the main surface; a silicide layer is formed over the main surface and the silicon layer surface; an insulation layer is formed over the silicide layer in each of the main surface and the multilayer gate surface; a shared contact hole is formed in the insulation layer in such a manner that the silicide layer in the main surface of the semiconductor substrate and the surface of the multilayer gate is exposed from the insulation layer; and the shared contact hole is subjected to sulfuric acid cleaning, aqueous hydrogen peroxide cleaning, and APM cleaning separately, respectively, thereby to remove an altered layer formed in the shared contact hole. | 2010-12-30 |
20100330795 | Krypton Sputtering of Low Resistivity Tungsten - A method of depositing a bilayer of tungsten over tungsten nitride by a plasma sputtering process in which krypton is used as the sputter working gas during the tungsten deposition. Argon may be used as the sputtering working gas during the reactive sputtering deposition of tungsten nitride. The beneficial effect of reduction of tungsten resistivity is increased when the thickness of the tungsten layer is less than 50 nm and further increased when less than 35 nm. The method may be used in forming a gate stack including a polysilicon layer over a gate oxide layer over a silicon gate region of a MOS transistor in which the tungsten nitride acts as a barrier. A plasma sputter chamber in which the invention may be practiced includes gas sources of krypton, argon, and nitrogen. | 2010-12-30 |
20100330796 | Manufacturing method of semiconductor device - The manufacturing method includes: forming a seed film on a semiconductor chip; forming a photoresist having an opening above an electrode of the semiconductor chip on the seed film; forming a first Au bump on the seed film in the opening by electrolytic plating with a current density of 1.5 A/dm | 2010-12-30 |
20100330797 | FABRICATION METHOD FOR CIRCUIT SUBSTRATE HAVING POST-FED DIE SIDE POWER SUPPLY CONNECTIONS - A circuit substrate uses post-fed top side power supply connections to provide improved routing flexibility and lower power supply voltage drop/power loss. Plated-through holes are used near the outside edges of the substrate to provide power supply connections to the top metal layers of the substrate adjacent to the die, which act as power supply planes. Pins are inserted through the plated-through holes to further lower the resistance of the power supply path(s). The bottom ends of the pins may extend past the bottom of the substrate to provide solderable interconnects for the power supply connections, or the bottom ends of the pins may be soldered to “jog” circuit patterns on a bottom metal layer of the substrate which connect the pins to one or more power supply terminals of an integrated circuit package including the substrate. | 2010-12-30 |
20100330798 | Formation of TSV Backside Interconnects by Modifying Carrier Wafers - An integrated circuit structure includes a semiconductor wafer, which includes a first notch extending from an edge of the semiconductor wafer into the semiconductor wafer. A carrier wafer is mounted onto the semiconductor wafer. The carrier wafer has a second notch overlapping at least a portion of the first notch. A side of the carrier wafer facing the semiconductor wafer forms a sharp angle with an edge of the carrier wafer. The carrier wafer has a resistivity lower than about 1×10 | 2010-12-30 |
20100330799 | SEMICONDUCTOR DEVICE AND PROCESS FOR PRODUCING THE SAME - Improved control over formation of low k air gaps in interlayer insulating films is achieved by plasma pretreatment of the region of the insulating film to be removed. The intended air gap region is exposed through a mask while the film region to be preserved is shielded by the mask. The intended air gap region is then exposed to a plasma so as to render it more susceptible to removal in a subsequent treatment. One or more Cu interconnects are embedded in both regions of the insulator film. The insulator film in the intended air gap region is then selectively removed to form air gaps adjacent a Cu interconnect in that region. | 2010-12-30 |
20100330800 | METHODS OF FORMING LAYERS OF ALPHA-TANTALUM - A method of forming a layer of alpha-tantalum on a substrate including the steps of depositing a layer of titanium nitride on a substrate; and depositing a layer of alpha-tantalum on the layer of titanium nitride, wherein the deposition of the alpha-tantalum is carried out at temperatures below about 300° C. | 2010-12-30 |
20100330801 | Method of Fabricating Landing Plug in Semiconductor Device - A method of fabricating a landing plug in a semiconductor memory device, which in one embodiment includes forming a landing plug contact hole on a semiconductor substrate having an impurity region to expose the impurity region; forming a landing plug by filling the landing plug contact hole with a polysilicon layer, wherein the landing plug is divided into a first region, a second region, a third region, and a fourth region from a lower portion of the landing plug, and the first region is doped with a first doping concentration that is relatively lowest, the second region is doped with a second doping concentration that is higher than the first doping concentration, the third region is doped with a third doping concentration that is higher than the second doping concentration and the fourth region is not doped; and annealing the resulting product formed with the landing plug. | 2010-12-30 |
20100330802 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A semiconductor manufacturing method includes forming a word line crossing with an active region on a semiconductor substrate; forming a diffusion layer region; forming a first insulating film as high as a bit line to be formed; etching the first insulating film, while using, as a mask, a pattern having a linear aperture extending to the active region on the first insulating film so as to form a groove pattern for exposing the surface of the semiconductor substrate; embedding a conductive film in the groove pattern; forming a mask pattern passing over a portion, in which a bit contact is formed, on the first insulating film; and removing the first insulating film and the conductive layer until the upper layer insulating film of the word line is exposed, while using the mask pattern as a mask so as to isolate a bit contact from another contact. | 2010-12-30 |
20100330803 | METHOD FOR FORMING VIAS IN A SUBSTRATE - The present invention relates to a method for forming vias in a substrate, including the following steps: (a) providing a substrate having a first surface and a second surface; (b) forming a groove on the substrate; (c) filling the groove with a conductive metal; (d) removing part of the substrate which surrounds the conductive metal, wherein the conductive metal is maintained so as to form an accommodating space between the conductive metal and the substrate; (e) forming an insulating material in the accommodating space; and (f) removing part of the second surface of the substrate to expose the conductive metal and the insulating material. In this way, thicker insulating material can be formed in the accommodating space, and the thickness of the insulating material in the accommodating space is even. | 2010-12-30 |
20100330804 | Method for Fabricating Bitline in Semiconductor Device - A method of a fabricating a bitline in a semiconductor device, comprising: forming an interlayer insulation layer that defines a bitline contact hole on a semiconductor substrate; forming a contact layer to fill the bitline contact hole; forming a bitline contact by planarizing the contact layer; forming a bitline stack aligned with the bitline contact; forming a high aspect ratio process (HARP) layer that extends along the bitline stack and the interlayer insulation layer while covering a seam exposed in a side portion of the bitline stack by excessive planarization during formation of the bitline contact; and forming an interlayer gap-filling insulation layer on the HARP layer that gap-fills the entire bitline stack. | 2010-12-30 |
20100330805 | METHODS FOR FORMING HIGH ASPECT RATIO FEATURES ON A SUBSTRATE - Methods for forming anisotropic features for high aspect ratio application in etch process are provided. The methods described herein advantageously facilitates profile and dimension control of features with high aspect ratios. In one embodiment, a method for anisotropic etching a dielectric layer on a substrate includes providing a substrate having a patterned mask layer disposed on a dielectric layer in an etch chamber, supplying a gas mixture including at least a fluorine and carbon containing gas and a silicon fluorine gas into the etch chamber, and etching features in the dielectric layer in the presence of a plasma formed from the gas mixture. | 2010-12-30 |
20100330806 | Method of forming contact hole arrays using a hybrid spacer technique - One embodiment of the invention provides a method of forming a plurality of contact holes, including forming a first feature and a second feature over an underlying material, forming sidewall spacers on the first and second features, removing the first and second features without removing the sidewall spacers, forming a cover mask at least partially exposing the sidewall spacers, and etching the underlying material using the cover mask and the sidewall spacers as a mask to form the plurality of contact holes. | 2010-12-30 |
20100330807 | SEMICONDUCTOR APPARATUS MANUFACTURING METHOD AND IMPRINT TEMPLATE - A method for manufacturing a semiconductor apparatus, includes: supplying a first imprint material onto a dicing region surrounding each chip of a semiconductor wafer; bringing a first template having a frame-like configuration into contact with the first imprint material and curing the first imprint material; peeling the first template from the first imprint material to form a first pattern in the first imprint material after the curing of the first imprint material; supplying a second imprint material onto a chip region of the semiconductor wafer on an inner side of the first pattern; bringing a second template into contact with the second imprint material and curing the second imprint material; peeling the second template from the second imprint material to form a second pattern in the second imprint material after the curing of the second imprint material; etching the semiconductor wafer, the first imprint material having the first pattern and the second imprint material having the second pattern being used as a mask. | 2010-12-30 |
20100330808 | CAP LAYER REMOVAL IN A HIGH-K METAL GATE STACK BY USING AN ETCH PROCESS - In a replacement gate approach, the dielectric cap layers of the gate electrode structures are removed in a separate removal process, such as a plasma assisted etch process, in order to provide superior process conditions during the subsequent planarization of the interlayer dielectric material for exposing the sacrificial gate material. Due to the superior process conditions, the selective removal of the sacrificial gate material may be accomplished with enhanced uniformity, thereby also contributing to superior stability of transistor characteristics. | 2010-12-30 |
20100330809 | POLISHING LIQUID FOR METALS - A liquid for polishing metals, which is used in the chemical and/or mechanical flattening of a semiconductor device, the polishing liquid being characterized in that it comprises at least one member selected from the group consisting of tetrazoles or triazoles represented by any one of the following general formulas (I) to (III): | 2010-12-30 |
20100330810 | METHOD FOR REMOVING THRESHOLD VOLTAGE ADJUSTING LAYER WITH EXTERNAL ACID DIFFUSION PROCESS - The present invention provides a method of forming a threshold voltage adjusted gate stack in which an external acid diffusion process is employed for selectively removing a portion of a threshold voltage adjusting layer from one device region of a semiconductor substrate. The external acid diffusion process utilizes an acid polymer which when baked exhibits an increase in acid concentration which can diffuse into an underlying exposed portion of a threshold voltage adjusting layer. The diffused acid reacts with the exposed portion of the threshold voltage adjusting layer providing an acid reacted layer that can be selectively removed as compared to a laterally adjacent portion of the threshold voltage adjusting layer that is not exposed to the diffused acid. | 2010-12-30 |
20100330811 | Method for forming via holes - An improved method of forming a via hole is provided. This method makes it possible to form a via hole having a highly accurate processed shape in an insulating body. The insulating body has a multi-layer structure made of different kinds of insulating layers. The insulating body has, for example, a first insulating layer and a second insulating layer on the first insulating layer. The first insulating layer is provided on a lower wiring layer. The method includes a step of forming a first through hole in the second insulating layer by dry etching. The first through hole reaches the first insulating layer. The side wall of the first through hole defines an exposed portion of the second insulating layer. The bottom of the first through hole defines an exposed portion of the first insulating layer. The method also includes a step of assimilating the exposed portion of the second insulating layer and the exposed portion of the first insulating layer so that the exposed portions of the first and second insulating layers have the same composition. The method also includes a step of forming a second through hole extending from the first through hole to the lower wiring layer by dry etching. The first and second through holes defines a via hole. The via hole is made by removing the exposed portion of the first insulating layer. | 2010-12-30 |
20100330812 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes forming a first-conductivity-type well and a second-conductivity-type well in a silicon substrate; stacking a first high-dielectric-constant insulating film and a first cap dielectric film above the silicon substrate; removing at least the first cap dielectric film from above the second-conductivity-type well; conducting a first annealing at a first temperature to cause an element included in the first cap dielectric film to diffuse into the first high-dielectric-constant insulating film disposed above the first-conductivity-type well; after the first annealing, stacking a second high-dielectric-constant insulating film and a second cap dielectric film above the silicon substrate; removing the second cap dielectric film disposed above the first-conductivity-type well; and conducting a second annealing at a second temperature lower than the first temperature to cause an element included in the second cap dielectric film to diffuse into the second high-dielectric-constant insulating film disposed above the second-conductivity-type well. | 2010-12-30 |
20100330813 | DIELECTRIC FILM AND SEMICONDUCTOR DEVICE USING DIELECTRIC FILM - The present invention provides a dielectric film having a high permittivity and a high heat resistance. An embodiment of the present invention is a dielectric film ( | 2010-12-30 |
20100330814 | METHODS OF FORMING OXIDE LAYERS ON SUBSTRATES - Methods for processing substrates are provided herein. In some embodiments, a method for processing a substrate includes providing a substrate having an oxide layer disposed thereon, the oxide layer including one or more defects; and exposing the oxide layer to a plasma formed from a process gas comprising an oxygen-containing gas to repair the one or more defects. In some embodiments, the oxide layer may be formed on the substrate. In some embodiments, forming the oxide layer further comprises depositing the oxide layer atop the substrate. In some embodiments, forming the oxide layer further comprises thermally oxidizing the surface of the substrate to form the oxide layer. In some embodiments, a processing temperature is maintained at about 700 degrees Celsius or below during the thermal oxidation of the surface. | 2010-12-30 |
20100330815 | APPARATUS AND METHOD FOR HEATING SUBSTRATE AND COATING AND DEVELOPING SYSTEM - A substrate heating apparatus includes a top plate arranged above a hot plate so that a vertical space is formed between the hot plate and the top plate. The top plate has an evacuated internal chamber serving as a vacuum insulating layer that suppresses heat transfer from a first surface of the top plate facing the hot plate to a second surface of the top plate opposite to the first surface. When heating the substrate, a gas flow flowing through the space between the hot plate and the top plate is generated. | 2010-12-30 |
20100330816 | ROTATABLE ADAPTER FOR ELECTRICAL PLUGS - One embodiment of an adapter for an electrical plug may include a bottom connector, a top connector and an electrical connection mechanism. The bottom connector may include a plurality of male connectors capable of being inserted in a wall socket. The top connector may be rotatably coupled to the bottom connector. The top connector may be capable of rotating in a plane parallel to a plane of the wall socket. The top connector may include a plurality of female connectors for receiving the electrical plug. The plurality of female connectors may be electrically coupled to the plurality of male connectors, and may be disposed perpendicular to the plurality of male connectors. The electrical connection mechanism may be configured to electrically coupling the plurality of male connectors and the plurality of female connectors. | 2010-12-30 |
20100330817 | BALL PLUNGER-STYLE CONNECTOR ASSEMBLY FOR ELECTRICAL CONNECTIONS - A ball plunger-style lateral connector assembly for electrical connections, comprising an electrically conductive connector body with an electrically conductive pin positioned in an aperture in a closed end of the body. A first end portion of the pin member extends at least partially into the interior area of the connector body. An electrically conductive connector plate is adjacent to the closed end of the connector body and engages the first end portion of the pin member and provides an electrical connection therebetween. An insulator sleeve may be disposed in the interior area of the connector body and adjacent to the sidewall of the connector body. An electrically conductive biasing member is disposed in the interior area of the connector body. The biasing member has a first end portion in engagement with the connector plate, and wherein the insulator sleeve is disposed between the biasing member and the connector body. An electrically conductive ball track is positioned within the interior area of the connector body and is in engagement with a second end portion of the biasing member. An electrically conductive ball is disposed in the open end portion of the connector body and is seated in the concave seating portion of the ball track. The ball is configured to roll within ball track during use of the lateral connector. | 2010-12-30 |
20100330818 | INSULATION DISPLACEMENT CONNECTOR (IDC) - An electrical insulation displacement connector includes a body having at least one channel with an open top side configured for receipt of an insulated conductive core wire therein. A contact element is fixed in the body with a first insulation displacement end defined by opposed blades oriented across the channel, and a second end extending from a bottom surface of the body and configured for electrical contact with a PCB. The body includes retaining structure extending into the channel at a location relative to a depth of the blades within the channel such that the insulation portion of a wire inserted into the channel and pressed down into the first end of the contact element is pushed below the retaining structure, thereby preventing the wire from being inadvertently pulled out from the first end of the contact. | 2010-12-30 |
20100330819 | Gentle Disconnect Connector For Printed Circuit Boards and Tool Therefor - An electrical connector has a first and second connector body. A tool fits over the first connector body to assist in demating the two connector bodies from one another. Compressing the tool compresses spring fingers in one of the connector bodies, allowing the connector bodies to be easily demated from one another without excessive force and damaging printed circuit boards to which the connector may be connected. | 2010-12-30 |
20100330820 | ELECTRICAL CONNECTOR SYSTEM HAVING REDUCED MATING FORCES - An electrical connector system includes a circuit board having a mounting side and first and second electrical connectors mounted to the mounting side of the circuit board. The first and second electrical connectors each having a mating interface. The first and second electrical connectors being mounted to the circuit board in an offset configuration such that the mating interfaces of the first and second electrical connectors are parallel to one another and non-coplanar with respect to one another. Optionally, the mating interfaces may be perpendicular to the mounting side. The first and second electrical connectors may be identical to one another. | 2010-12-30 |
20100330821 | BOARD-TO-BOARD CONNECTOR - A board-to-board connector pair includes first and second intermateable connectors with each including a housing and a plurality of terminals therein. The first connector includes a first planar reinforcing locking bracket stamped from sheet metal and the second connector includes a second planar reinforcing locking bracket stamped from sheet metal and configured to mate with the first planar reinforcing locking bracket. | 2010-12-30 |
20100330822 | ELECTRICAL CONNECTOR HAVING CONTACT WITH UPPER TERMINAL AND LOWER TERMINAL - An electrical connector includes an insulative housing and a plurality of contacts. The insulative housing have a top surface, a bottom surface, and a plurality of passageways extending through the top and the bottom surfaces. Each contact includes an upper terminal mounted into the passageway form the top surface and a lower terminal mounted into the passageway from the bottom surface. The upper terminal is configured with an upper retention portion and an upper spring arm extending beyond the top surface of the insulative housing. The lower terminal is configured with a lower retention portion, a lower spring arm extending beyond the bottom surface of the insulative housing, and a lower engaging portion extending upwardly from the lower retention portion to elastically contact with the upper terminal. | 2010-12-30 |
20100330823 | Cast grid array (CGA) package and socket - A cast grid array (CGA) package comprises shaped solder posts which may be reflowed and connected directly to a circuit board, such as mother board, or remain in a solid state with the shape allowing them to be secured within a CGA socket which, in turn, may be connected to the a board. Embodiments of the CGA allows for a lower cost socket and package combination by using solder post to interface the socket and not requiring a loading mechanism on every socket. | 2010-12-30 |
20100330824 | Unified retention mechanism for CPU/socket Loading and thermal solution attach - An apparatus for removably retaining an IC package in engagement with a socket such that the contacts of both the IC package and the socket are properly engaged is disclosed. Specifically, a universal retention mechanism (URM) which may be fabricated in a diecast material, may comprise a retention frame to engage a socket. A load plate hinged to the retention frame may be caused to press the socket and IC package together through force selectively applied through the use of a load lever. In addition, the frame may contain features to attach a thermal solution (e.g. a heat sink or other cooling device) directly to the frame thus eliminating the need to attach it directly to a motherboard or through a backplate. | 2010-12-30 |
20100330825 | CONDUCTIVE CONTACT AND ELECTRONIC APPARATUS EMPLOYING THE SAME - A conductive contact includes a contacting member and a resilient member. The contacting member includes a contacting component, a fastening component, and a rim. The fastening component includes a fastening neck, a guiding portion, and a blocking portion connected between the fastening neck and the guiding portion. A maximum width of the guiding portion is gradually decreased from a fixing end connected with the blocking portion to a free end opposite to the fixing end, and a thickness of the guiding portion is larger than that of the blocking portion. The rim is connected between the contacting component and the fastening neck. A maximum width of the fastening neck is less than that of the rim and the blocking portion. The resilient member slides through the guiding portion and the blocking portion to fixedly sleeve on the fastening neck. | 2010-12-30 |
20100330826 | Speed Wire Device - A speed wire device connects to standard screw terminals on traditional receptacle and switch devices. The speed wire device includes forked lugs positioned to engage screw terminal present on known traditional electrical receptacle and switch devices. The forked lugs engage the standard screw terminals and prevent miss-wiring during finally assembly after dry wall installation. The speed wire device may be a single piece device, or a two piece plug together device allowing simple “hot-swapping” of traditional receptacle and switch devices in applications were power must remain on, for example, in hospitals. | 2010-12-30 |
20100330827 | METHODS AND APPARATUS FOR A GROUNDING GASKET - A conductive gasket includes a deformable contact region configured to provide compressive contact between the mounting surface of a connector (e.g., a right-angle micro-D connector) and a grounded surface of the substrate (e.g., PCB). A fastener region extends from the deformable contact region and is configured to align with a mounting region of the connector. A keep-out zone is provided adjacent to the deformable contact region and the fastener region and is configured to allow the pins of the connector to pass therethrough. | 2010-12-30 |
20100330828 | RETRACTABLE MEMORY DRIVE - A retractable memory drive in accordance with the present invention comprises a top casing, a middle carrier, an electronic device such as a USB thumb drive, and a bottom casing. There are guide rails that allow the middle carrier to remain in an appropriate position. There is also a metal spring clip coupled to the middle carrier for contacting a connector of a device coupled to the drive to provide for improved EMI and ESD protection. | 2010-12-30 |
20100330829 | ADJUSTABLE PLUG AND EARPHONE UTILIZING THE SAME - A plug assembly includes an insulation housing and an insertion pole fixed to the insulation housing. The insertion pole is made of elastic material and includes at least two insertion portions extended along an extension direction of the insertion pole. | 2010-12-30 |
20100330830 | Vertical probe intrface system - A vertical probe interface system includes a flex PCB system where a portion of the flex PCB is pressed together to form a solid board and the other portion of the flex PCB is in layer or layers form. A metal plate mounts the flex PCB to the stiffener of the probe interface board. The flex PCB is electrically connected to the probe interface board by connectors, soldering or other known method. | 2010-12-30 |
20100330831 | LAMP HOLDING UNIT - A lamp holding unit includes a coupling terminal and a main body. The coupling terminal includes a coupling plate extended in a direction crossing a longitudinal direction of a lamp. The coupling plate has a cutout portion to receive a lead line of the lamp so that the cutout portion of the coupling plate making contact with the lead line. The main body is coupled with the coupling terminal and guiding the lamp. Therefore, an electrical connection between the lamp holding unit and the lead line of the lamp is stabilized, so that noise or spark caused by mal-connection is prevented. | 2010-12-30 |
20100330832 | Plug Locking Assembly and System - A system comprises a plug locking assembly and a key. The plug locking assembly comprises a cover for receiving and holding a plug comprising a latch and a latch support surface positionable under the latch. A rotatable cam comprising a stop surface and a slot may carry the latch support surface and may interact with a cam latch comprising an arm. The arm is alternately positionable to abut the stop surface and to lie within the slot. The key may comprise a shaft, a key tab and a limit tab. The key mates with a key receiving member associated with the cover. The limit tab is positioned on a top surface of the shaft and helps prevent over-rotation of the latch support member. | 2010-12-30 |
20100330833 | PCB CONNECTOR - For connecting multiple PC boards to form a PCB pane, a PCB connector is disclosed include a bearing strip, which has locating grooves spaced along the length, upright pins disposed in the locating grooves and inserted through respective through holes on connection portions of the PC boards to be connected and studs spaced along the length and disposed beyond the locating grooves, and a holding down strip, which has locating grooves corresponding to the locating grooves of the bearing strip for receiving the connection strips of the PC boards, pin holes respectively press-fitted onto the upright pins and sockets respectively fastened to the studs of the bearing strip. | 2010-12-30 |
20100330834 | ELECTRICAL CONTACT DEVICE - An electrical contact device for an arrangement includes two apparatuses, between which a relative movement takes place along a first movement path. In at least one embodiment, the electrical contact device includes a first contact, including a first contact surface, and includes a second contact including a first multiplicity of contact arms, each provided with a contact projection for making contact with the first contact surface. In at least one embodiment, in order to prevent excessive friction wear to the first contacts even when the contact projections of the associated second contacts are arranged successively in the same direction as the first movement path, at least one device is provided for controlling a relative movement between the two contacts along a second movement path, which runs parallel to the first contact surface of the first contact and obliquely with respect to the first movement path. | 2010-12-30 |
20100330835 | ELECTRICAL PUSH-PULL PLUG CONNECTOR - An electrical plug connector based on the push-pull system, with a plug component and a matching plug component that can be connected to the plug component, both of which each include one or several associated electrical contacts held by a contact carrier, and with a locking mechanism that is provided on the plug component and includes at least one movable locking element with a latch surface that is associated, on the matching plug component, with a fixed locking element with a matching surface for the latch surface. The plug component includes a plug component housing with an axially displaceable sliding sleeve with an actuation element for the locking element formed on the inside wall, wherein, when the plug component is connected to the matching plug component, a—in the plug-in direction—frontal section of the circumferential wall area of the plug component housing overlaps the matching plug component on the outside in a plug-in area. The locking element projects radially beyond an inner surface of the circumferential wall area, and the locking of the locking element with the matching locking element is achieved by moving the locking element transversely to the plug-in direction of the plug connector along the circumferential wall area. | 2010-12-30 |
20100330836 | Devices for Connecting Conductors of Twisted Pair Cable to Insulation Displacement Contacts - An interconnection junction between a twisted pair communications cable and a communications connector having a plurality of IDCs includes: a housing having an aperture and a pair of first and second IDCs extending within the aperture; a twisted pair communications cable having a twisted pair of first and second conductors and a separator positioned between the first and second conductors; and a termination device. The termination device comprises: a body having an outer surface; a channel in the outer surface of the body, the channel being sized and configured to receive a twist of the first and second conductors and to maintain the twist in position; and IDC guide structure configured to guide the first IDC into engagement with the first conductor at a first engagement location and the second IDC into engagement with the second conductor at a second engagement location, the first and second engagement locations being positioned within the channel and within the twist of the first and second conductors. | 2010-12-30 |
20100330837 | Computer Cable Connector Protector - A device and method for reinforcing a connector and a portion of cable adjacent to the connector is herein disclosed and claimed. The device of the present invention is comprised of a body that grips and secures a connector and a portion of cable adjacent to the connector. The body has a longitudinal passage therethrough, the passage having a first section and a second section. The first section is dimensioned to receive the connector and the second section is dimensioned to receive the portion of cable. The body may be comprised of two corresponding clam shell halves which can be fastened together using common fasteners, joined with an adhesive, or otherwise frictionally or chemically joined. The body may also be injection molded around the connector and cable. | 2010-12-30 |
20100330838 | MULTIPLE COAXIAL CABLE PLUG CONNECTION AND METHOD FOR INSTALLING SUCH A MULTIPLE COAXIAL CABLE PLUG CONNECTION - A multiple coaxial cable plug connection ( | 2010-12-30 |
20100330839 | CABLE CONNECTOR ASSEMBLY AND METHOD OF MANUFACTURING THE SAME - A cable connector assembly, for mating with a complementary connector, includes a cable having a number of wires; and a connector comprising a contact module connected with the wires, a mounting ring attached to the cable, and a shielding shell attached to the mounting ring. The shielding shell and the mounting ring both have a number of screw threads to match with each other. An associated method of manufacturing the cable connector assembly comprises screwing the shielding shell onto the mounting ring. | 2010-12-30 |
20100330840 | CONNECTOR WITH INSERT FOR REDUCED CROSSTALK - A differential pair connector has a housing floor, an array of differential pairs passing through the housing floor, and a conductive grid integrated into the housing floor for reducing crosstalk between the differential pairs. The conductive grid can have various structures, such as conductive inserts, plated regions and/or a conductive housing floor surrounding non-conductive inserts protecting the differential pins. Although any suitable means can be used to fasten the conductive grid into the housing floor, the grid is preferably press fitted into the top of the housing floor. | 2010-12-30 |
20100330841 | CABLE CONNECTOR FOR TERMINATING DIFFERENT TYPES OF CABLES - A cable connector assembly ( | 2010-12-30 |
20100330842 | ANTI-MISMATING ELECTRICAL CONNECTOR AND METHOD FOR MANUFACTING SAME - An electrical connector ( | 2010-12-30 |
20100330843 | LAMP SOCKET POWER PLUG ADAPTER - A portable lamp socket power plug adapter connectable to a standard light bulb socket with electrical outlet functions for AC or DC plugs; The AC or DC electrical plug sockets provide any standard shape for the connection of plug to supply electrical appliances. The electrical plug sockets may function as USB sockets in providing DC power supply. | 2010-12-30 |
20100330844 | HIGH DENSITY CONNECTOR FOR HIGH SPEED TRANSMISSION - The high-density connector for high-speed transmission comprises a female connector having a connector body formed with a plurality of contact accommodating concave portions and a plurality of female contacts, and a male connector having a connector body and a plurality of male contacts. The female contacts are arranged in zigzag in a plurality of rows such that adjacent female contacts in a front-back direction are diagonally positioned to each other. Contact portions of the male contacts are arranged in zigzag in a plurality of rows corresponding to the arrangement of the female contacts. Among the rows of the female contacts, two adjacent rows in the front-back direction are rows of a pair of signal line contacts, and one row on either side in the front-back direction of the pair of signal line contacts is a row of a ground contact. | 2010-12-30 |
20100330845 | ELELCTRICAL CONNECTOR HAVING BLADE CONTACTS CONTACTING WITH RIB PORTIONS PROJECTING FROM BOTTOM SURFACE OF HOUSING - An electrical connector includes a base housing and a plurality of blade contacts. The housing includes a base wall, a back wall and a pair of opposing side walls protruding from three edges of the base wall and commonly defining a concave part. Each of the blade contacts includes a fixing portion embedded in the back wall and a contacting portion seated in the concave part. The base wall defines a plurality of rib portions projecting form a bottom surface of the concave part and bottom edges of the contacting portions of the plurality of contacts being in contact with the rib portions. | 2010-12-30 |
20100330846 | ELECTRICAL POWER CONNECTOR SYSTEM - An electrical power connector comprises a housing having a mounting interface and a mating interface. The mating interface defines a plurality of receptacles spaced apart in more than one direction. A plurality of electrical contacts is supported by the housing. These electrical contacts define respective mounting ends that are configured to electrically connect with an electrical component at the mounting interface, and opposed mating ends. At least one of the electrical contacts defines a common contact beam disposed within at least a select one of the receptacles. This common contact beam is configured to be electrically connected to a pair of adjacent electrical contacts of a mated electrical connector. | 2010-12-30 |
20100330847 | ELECTRICAL CONNECTOR WITH ELASTIC LEAD SECTIONS - An electrical connector includes an insulative housing and a pair of contacts. The insulative housing defines a mating face, a rear face opposite to the mating face, and a receiving cavity between and running through the mating face and the rear face. The contacts are retained in two opposite sides of the receiving cavity and each defining a contacting portion, a retaining portion extending backward from the contacting portion and at least a terminal portion extending from the contacting portion. A pair of elastic pieces integrally extend backward from the mating face of the insulative housing to the receiving cavity and free ends of the contacting portions resist on the elastic piece. The elastic pieces shift away from the receiving cavity under a condition that a mating electrical connector is inserted in the receiving cavity and press against the elastic pieces. The contacts are wider than the elastic pieces. | 2010-12-30 |
20100330848 | MULTIPOLAR CONNECTOR - The invention provides a multipolar connector wherein one terminal row can be divided into a plurality of rows (row conversion) while reducing an impedance mismatch. A multipolar connector ( | 2010-12-30 |
20100330849 | ELECTRICAL CONNECTOR WITH CONTACT MODULES - An electrical connector includes an insulative housing including a base portion and mating tongue plate protruding forwardly from the base portion; two contact modules being retained with each other and each including an insulative block, and a row of contacts being insert molded in the insulative housing, and a metal shell enclosing the insulative housing and the contact modules. A receiving space is formed between the shell and the tongue plate. The insulative blocks each defines a front portion inserted in the cavity of the insulative housing for the contact modules being retained with the insulative housing reliably. | 2010-12-30 |
20100330850 | Electromagnetic Switch for Starter - Terminal bolts are inserted in the bottom of contact cover through collars. C-rings are fitted into U-shaped grooves formed in the terminal bolts and constitute locking parts. Circular notch parts are formed on the inner surface at the contact chamber side of the collars and the notch parts are engaged with the C-ring whereby ring terminals receive pressing force of nuts tightened on the terminal bolts. Accordingly, spaces are created at places being closer to the contact chamber side than the C ring side of the terminal bolts are, by interposing O-rings with large thickness in the spaces in elastically compressed states, whereby an airtightness of the contact chamber can be secured without expanding an outer diameter of the contact cover. Thus, an electromagnetic switch can adopt sealing members with sufficient thickness without expanding an outer diameter of the contact cover. | 2010-12-30 |
20100330851 | CONTACT ASSEMBLY HAVING AN INTEGRALLY FORMED CAPACITIVE ELEMENT - A contact assembly includes a conductive body, a dielectric layer and a conductive layer. The conductive body extends along a longitudinal axis between a mating end and a mounting end. The dielectric layer is disposed over the conductive body between the mating end and the mounting end. The conductive layer is disposed over the dielectric layer and is separated from the conductive body by the dielectric layer. The conductive layer, the dielectric layer, and the conductive body form a capacitive element. | 2010-12-30 |
20100330852 | ELECTRICAL CONTACT HAVING FOLDED CONTACTING PORTION - An electrical contact made from a metal sheet includes a contacting portion for mating with a mating contact, a terminal portion for connecting with a printed circuit board and a retaining portion connecting the contacting portion and the terminal portion. The contacting portion defines first and second contacting pieces made from the metal sheet and folded to abut against each other, and the terminal portion extends from one of the contacting pieces, which can reduced the cost of the electrical contact. | 2010-12-30 |
20100330853 | METHOD FOR CONTROLLING A DRIVE SYSTEM IN A MOTOR BOAT - In recreational boats, multiple drive units, e.g., multiple outboard motors, Z-drives, or jet drives, are often provided to propel the boat, at least one of the drive units having a propulsion reversal function for executing a reverse propulsion. To facilitate execution of a turning maneuver with a boat in an extremely tight space, and to ensure that even an unskilled person is able to reliably execute such a turning maneuver, it is provided that the drive units be activated automatically for executing the turn on the spot as a function of a command for turning. The command may be made via a switch, which is operated by the driver of the boat. One drive unit is then operated automatically in propulsion reversal mode, and the other drive unit is operated in propulsion mode. The power of the drive units is then controlled in such a way that the instantaneous efficiency of the drive units operated during turning is taken into account. The drive units are activated by at least one control unit in such a way that the boat is turned automatically. The driver of the boat here may preferably specify the direction of the turn. | 2010-12-30 |
20100330854 | JET PROPULSION DEVICE - A jet propulsion device and method for controlling movement of the jet propulsion device, where liquid inlets are positioned at a distance from the surface of the device. Preferably, the inlets are positioned in the stabilizing fins of the device. When the device reaches a certain speed, a Riabouchinsky cavity forms around the device, and the radius of the Riabouchinsky cavity is substantially equal to the distance between the inlets and the longitudinal axis of the device. | 2010-12-30 |
20100330855 | Water intake grill for personal watercraft - A water intake grill for attachment to a water intake port associated with a jet watercraft, the water intake grill comprising a plurality of elongate members mounted to and in between fore and aft mounts. The fore mount comprising a base having an angularly orientated bottom surface for attaching first ends of the elongate members and an angularly orientated top surface for mounting atop thereof a key element having an overall geometric structure suited to fit within a mount socket integral to a forward wall section of the water intake port. The aft mount comprising a horizontally positioned base for accepting thereon at least one spacer and mounting thereto an extension support to support apart therefrom a cross support member for attaching second ends of the elongate members. Each elongate member comprising a teardrop geometric profile that effectively reduces the amount debris into the water intake port while allowing continued passage of water into the water intake port to yield sustained operating performance of the jet watercraft. | 2010-12-30 |
20100330856 | PAPERMAKING FABRICS WITH CONTAMINANT RESISTANT NANOPARTICLE COATING AND METHOD OF IN SITU APPLICATION - A papermaking fabric is treated by applying a nanoparticle type coating to improve their resistance to contamination by foreign matter in the papermaking system. The coating is applied during fabric manufacture and cured during heat setting. Alternatively, the coating applied or renewed by utilizing an existing shower or locating a spray boom or other suitable coating application device in the dryer section to apply the coating to the fabric in a controlled, uniform manner. Prior to application of the coating, the fabric is first thoroughly cleaned such as by showering or spraying, and then dried. Following controlled application of the coating, any excess material is removed by a suitable means, such as by vacuum, and the remaining coating on the fabric is then cured, either by utilizing the ambient heat of the dryer section or by a portable bank of heaters. In this manner, the fabric does not have to be removed from the machine in order to apply or renew the contaminant resistant coating. | 2010-12-30 |
20100330857 | SOIL RESIST METHOD - A method of imparting soil resistance to a substrate comprising applying to the substrate a composition comprising a) a polyfluoro organic compound having at least one urethane or urea, b) 1,3-propanediol, and c) a surfactant, the soil resist composition having freeze thaw stability. | 2010-12-30 |
20100330858 | MOLDED ARTICLE CONTAINING STACKED CARBON FIBER AND METHOD FOR PRODUCING SAME - A molded article having both of sufficient strength and peel resistance, especially a heat insulating material for a high temperature furnace, is provided. | 2010-12-30 |
20100330859 | METHOD OF CREATING COMPOSITE COMPONENTS WITH A PREFORM WITH HYBRID LAYUP - A method for manufacturing a thin structural component made of composite and intended to withstand, on the one hand, working loads and, on the other hand, accidental loadings. The method involves creating a dry fiber preform of the component that is to be manufactured, and impregnating the aforementioned perform with a matrix-forming resin by resin transfer. The perform is created by assembling at least one structural layer, a first surface reinforcing layer on a first face of the aforementioned structural layer, and a second surface reinforcing layer on a second face of the structural layer. A number of plies in the two surface reinforcing layers is first of all calculated so that the finished component will be able to withstand the accidental loadings, then a number of plies in the structural layer is calculated, with due consideration given to increases in structural strength contributed by the surface reinforcing layers so that the finished component will be able to withstand the working loads. | 2010-12-30 |
20100330860 | Absorbent Hygiene Product - A multiple-ply fluid-absorbing hygiene item for use in a garment, the item comprising an outer layer; said outer layer comprising a layer of a UV-crosslinking pressure-sensitive adhesive; the pressure-sensitive adhesive being crosslinked from a liquid pressure-sensitive adhesive precursor by UV radiation; the pressure-sensitive adhesive precursor having, at a temperature of at most 80° C., a viscosity below 5000 mPas. | 2010-12-30 |
20100330861 | HYDROPHOBIC ADDITIVE FOR USE WITH FABRIC, FIBER, AND FILM - The present invention relates to a hydrophobic additive for use with fabric, fiber, and film. One aspect of the present invention comprises a master batch composition for use in preparing a non-woven fabric in order to increase the hydrophobicity of the non-woven fabric. In one embodiment, the master batch composition includes a polymer and a lipid ester. The lipid ester comprises from 10 wt. % to 40 wt. % of the master batch. The fabric, when including the master batch composition, has a contact angle ranging from 100° to 125° when measured according to test method ASTM D2578. | 2010-12-30 |
20100330862 | METHOD FOR MANUFACTURING IMAGE DISPLAY ELEMENT - A method for manufacturing an image display element including: a front panel; a back panel facing the front panel; plural pixels arranged in a matrix between the panels, and to be selected to be in a display or non-display state; and plural electrodes for controlling the pixels, the panels being bonded with the pixels and the electrodes interposed therebetween, and the electrodes being connected to a driving control circuit via metal wires, includes a first step of performing dicing from the back side of the opposing surface from the front panel, and forming a groove part such that electrode terminals connected to the electrodes are exposed between adjacent plural pixel lines, with the back panel bonded thereto, and a second step of forming the metal wires so as to be connected to the electrode terminals exposed at the groove part. | 2010-12-30 |
20100330863 | METHOD FOR PRODUCING PLASMA DISPLAY PANEL - The present invention provides a method for producing a plasma display panel, including a step of providing a back substrate with a barrier rib to form a plurality of recesses separated each other by the barrier rib, and a step of applying a phosphor ink to the recesses using an inkjet device, | 2010-12-30 |
20100330864 | MANUFACTURING METHOD OF PLASMA DISPLAY PANEL - In the manufacturing method of the plasma display panel, the protective layer of the front plate has a base film evaporated on a dielectric layer, and this base film is surface-treated, and an ink film formed of agglomerated particles agglomerating a plurality of crystal particles of metal oxide and an organic solvent is formed, and after vacuum drying, the organic solvent is removed from the ink film, and thereby the plurality of agglomerated particles are bonded and formed on the base film. | 2010-12-30 |
20100330865 | ALL PAPER PRODUCTS FLYING MODEL AIRCRAFT - A flying model aircraft kit is invented for use with radio control and electric power and is constructed entirely of paper products without any other materials necessary for structural support, with the exception of glue. The aircraft kit provides for extremely inexpensive and simple manufacturing methods, while also providing for ease of construction, lightweight, high strength, durability, scale appearance, and the ability to effectively repair after crashing. The airframe is also designed such that structural pieces can be manufactured using smaller standard paper sizes, which enable extraordinarily low cost manufacture. The airframe derives its strength using a paper skin exoskeleton impregnated with epoxy resins such that tensile strength is derived from the aircraft skin itself, in addition to internal supports made of heavy card. The wing utilizes innovative construction that produces a precise and flyable wing made entirely of paper products. | 2010-12-30 |
20100330866 | AIR SHIFTER TOY MODEL - The present invention provides an unconventional and proprietary radio control (RC) or infrared remote control (IR) toy model/airplane which can intentionally shift or change its center of gravity (COG) to different positions along the longitudinal centerline of the aircraft or fuselage. The incremental shifting or moving of the COG from front to rear or vice versa incrementally changes the “angle of attack” of the wing, thereby producing a variable range of viable flight attitudes and resultant terminal velocities (top speeds). Therefore, users can easily select an appropriate speed for the airplane to fly in limited indoor spaces or in larger outdoor areas. Additionally, the COG shifting of the present invention can be applied not only to RC and IR controlled toy models/aircrafts but may also be implemented into real aircrafts including manned and unmanned aircraft for civilian and/or military applications. | 2010-12-30 |
20100330867 | TOY CONSTRUCTION SYSTEM - A toy construction system is designed based round a generally square piece having ball ( | 2010-12-30 |
20100330868 | TOY HAVING WATER SPRAY - A toy vehicle playset is disclosed herein the playset having: a vessel configured to define a receiving area; an object being located proximate to the vessel, the object having a pair of body portions configured for movement between a first position wherein the pair of body portions are next to each other and a second position wherein the pair of body portions are moved away from each other; first and second track segments disposed proximate to the vessel such that a gap is formed between the first and second track segments and across the vessel; a trigger disposed on the second track segment; a toy vehicle having a thermochromic paint thereon that is configured to travel along the first and second track segments, wherein the thermochromic paint on the toy vehicle changes from a first color to a second color in response to a temperature change of the thermochromic paint; wherein the pair of body portions are moved from the first position to the second position when the toy vehicle travels along the second track segment and actuates the trigger; and wherein the object has at least one spray nozzle fluidly coupled to a tank of fluid wherein a user operated pump sprays fluid from the tank towards the receiving area, the fluid being capable of changing the temperature of the thermochromic paint. | 2010-12-30 |
20100330869 | Hair Styling Mechanisms And Hair Styling Dolls - A hair styling doll with a hair styling mechanism is disclosed. The doll includes a body with a head to which a lock of hair is coupled. The doll includes an adjustment mechanism that can be manipulated to adjust the length and shape or configuration of the lock of hair. The hair is braided and the adjustment mechanism includes an elongate member that is coupled to the different sections of the braided hair. The elongate member is coupled to the hair in an alternating configuration or pattern such that pulling the elongate member results in the braided hair coiling and forming a bun-like structure. | 2010-12-30 |