Patent application number | Description | Published |
20080297213 | Signaling with Superimposed Clock and Data Signals - A data receiver circuit includes an interface to receive an input signal that includes a data signal and a clock signal superimposed on the data signal. The data signal has an associated symbol rate and an associated symbol period equal to the reciprocal of the associated symbol rate. The clock signal has a frequency N times the associated symbol rate, where N is an integer. A phase-locked loop (PLL) coupled to the interface extracts the clock signal from the input signal to provide an extracted clock signal. A phase interpolator adjusts the phase of the extracted clock signal to provide a phase-adjusted extracted clock signal. A sampling circuit samples the data signal at a sampling point. The sampling circuit is synchronized to the phase-adjusted extracted clock signal. | 12-04-2008 |
20080310491 | MULTI-MODE TRANSMITTER - A multi-mode transmitter within an integrated circuit device. The multi-mode transmitter transmits a first data sequence in a baseband signal when a first transmission mode is enabled, and transmits the first data sequence in a multi-band signal when a second transmission mode is enabled. | 12-18-2008 |
20090243681 | Embedded Source-Synchronous Clock Signals - A synchronous communication system includes two transmitters that transmit respective first and second data signals that are phase offset from one another by about 90 degrees. On the receive side, a pair of extraction circuits extract a first clock signal from the first data signal and a second clock signal from the second data signal. The clock signals are offset from one another by about 90 degrees due to the phase offset of the corresponding data signals. Edges of the first clock signal are thus centered within the symbols of the second data signal, and edges of the second clock signal are centered within the symbols of the first data signal. A pair of receivers employs the first clock signal to sample the second data symbol and the second clock signal to sample the first data signal. | 10-01-2009 |
20100128813 | Multi-channel Signaling with Equalization - A data transmission circuit comprises a plurality of data preparation circuits and a combiner. Each data preparation circuit receives a respective data stream and generates a respective sub-channel signal. Each respective data stream has a respective symbol rate and a respective Nyquist bandwidth. The combiner combines the respective sub-channel signals to generate a data transmission signal having an associated bandwidth. The bandwidth associated with the data transmission signal is greater than or equal to the sum of the Nyquist bandwidths for the respective data streams. Each data preparation circuit comprises a programmable linear equalizer that equalizes the respective sub-channel signal across the bandwidth of the data transmission signal. | 05-27-2010 |
20100149039 | MULTI-ANTENNA BEAM-FORMING SYSTEM FOR TRANSMITTING CONSTANT ENVELOPE SIGNALS DECOMPOSED FROM A VARIABLE ENVELOPE SIGNAL - Embodiments in the present disclosure pertain to a multi-antenna beam-forming system for transmitting constant envelope signals decomposed from a variable envelope signal. The variable envelope signal is decomposed into two constant envelope signals. Each of the constant envelope signals are separately amplified by power amplifiers and transmitted over separate antennas. Beam steering delays can be added to the transmit paths of the constant envelope signals to direct the beam to the location of a receiver. The transmitted constant envelope signals combine through spatial out-phasing such that a receiving antenna receives a variable envelope signal. | 06-17-2010 |
20100183090 | MULTI-ANTENNA TRANSMITTER FOR MULTI-TONE SIGNALING - Embodiments of a communication circuit are described. This communication circuit includes an input node ( | 07-22-2010 |
20100202565 | COMMUNICATION USING CONTINUOUS-PHASE MODULATED SIGNALS - Embodiments of a circuit are described. In this circuit, a modulation circuit provides a first modulated electrical signal and a second modulated electrical signal, where a given modulated electrical signal, which can be either the first modulated electrical signal or the second modulated electrical signal, includes minimum-shift keying (MSK) modulated data. Moreover, a first phase-adjustment element, which is coupled to the modulation circuit, sets a relative phase between the first modulated electrical signal and the second modulated electrical signal based on a phase value of the first phase-adjustment element. Additionally, an output interface, which is coupled to the first phase-adjustment element, is coupled to one or more antenna elements which output signals. These signals include a quadrature phase-shift-keying (QPSK) signal corresponding to the first modulated electrical signal and the second modulated electrical signal. | 08-12-2010 |
20100235673 | SIMPLIFIED RECEIVER FOR USE IN MULTI-WIRE COMMUNICATION - An encoder encodes data into a series of parallel codewords. Each codeword is expressed two sets of logic values (e.g., a set of logic 0s and a set of logic 1s) on output nodes. The encoder selects a current codeword from a group of codewords in a codespace which does not overlap the other group of codewords, i.e., codewords in a given group of codewords are not included in any other group of codewords in the codespace. This property allows a receiver of the codewords to be simplified. In particular, a mathematical operation performed on symbols in the current codeword uniquely specifies the corresponding group of codewords. This allows a decoder to decode the current codeword using comparisons of symbols received on a subset of all possible combinations of node pairs. | 09-16-2010 |
20100259449 | TECHNIQUE FOR DETERMINING AN ANGLE OF ARRIVAL IN A COMMUNICATION SYSTEM - Embodiments of a circuit are described. In this circuit, a transmit circuit provides signals to antenna elements during an acquisition mode, where a given signal to a given antenna element includes at least two frequency components having associated phases, and where the phase of a given frequency component in the given signal is different from phases of the given frequency component for the other antenna elements. Moreover, an output node couples the transmit circuit to the antenna elements that transmit the signals. Note that these signals establish an angle of a communication path between the circuit and another circuit. | 10-14-2010 |
20100290481 | ENCODING AND DECODING TECHNIQUES WITH IMPROVED TIMING MARGIN - Embodiments of an encoder and a decoder are described. The encoder encodes data into a series of parallel codewords. Each codeword is expressed two sets of logic values (e.g., a set of logic 0s and a set of logic 1s) on two corresponding sets of output nodes, a first set and a second set. The encoder selects a current codeword such that it differs from the immediately preceding codeword by a fixed number of zero-to-one transitions on the first set of nodes and a fixed number of one-to-zero transitions on the second set of nodes. A decoder receives and decodes the codewords by comparing symbols on node pairs for which the symbols expressed in the prior code word were alike and decoding the results of those comparisons. | 11-18-2010 |
20120189045 | Signaling with Superimposed Clock and Data Signals - A data receiver circuit includes an interface to receive an input signal that includes a data signal and a clock signal superimposed on the data signal. The data signal has an associated symbol rate and an associated symbol period equal to the reciprocal of the associated symbol rate. The clock signal has a frequency N times the associated symbol rate, where N is an integer. A phase-locked loop (PLL) coupled to the interface extracts the clock signal from the input signal to provide an extracted clock signal. A phase interpolator adjusts the phase of the extracted clock signal to provide a phase-adjusted extracted clock signal. A sampling circuit samples the data signal at a sampling point. The sampling circuit is synchronized to the phase-adjusted extracted clock signal. | 07-26-2012 |
20140286450 | MULTI-ANTENNA TRANSMITTER FOR MULTI-TONE SIGNALING - Embodiments of a communication circuit are described. This communication circuit includes an input node to receive a set of data symbols and a partitioner coupled to the input node. This partitioner is to divide the set of data symbols into M irregular subgroups of data symbols, a given one of which includes non-consecutive data symbols in the set of data symbols. Moreover, this given irregular subgroup of data symbols includes at least two pairs of adjacent data symbols having different inter-data-symbol spacings in the set of data symbols. This communication circuit also includes M modulators coupled to the partitioner, where the given irregular subgroup of data symbols is coupled to a given modulator in the M modulators. Furthermore, the communication circuit includes M output nodes, where a given output node in the M output nodes is coupled to the given modulator and is to couple to an antenna element in M antenna elements. | 09-25-2014 |
20140307833 | COMMUNICATION USING CONTINUOUS-PHASE MODULATED SIGNALS - Embodiments of a circuit are described. In this circuit, a modulation circuit provides a first modulated electrical signal and a second modulated electrical signal, where a given modulated electrical signal, which can be either the first modulated electrical signal or the second modulated electrical signal, includes minimum-shift keying (MSK) modulated data. Moreover, a first phase-adjustment element, which is coupled to the modulation circuit, sets a relative phase between the first modulated electrical signal and the second modulated electrical signal based on a phase value of the first phase-adjustment element. Additionally, an output interface, which is coupled to the first phase-adjustment element, is coupled to one or more antenna elements which output signals. These signals include a quadrature phase-shift-keying (QPSK) signal corresponding to the first modulated electrical signal and the second modulated electrical signal. | 10-16-2014 |