Patent application number | Description | Published |
20090125861 | Wiring design processing method and wiring design processing apparatus - A wiring design processing method is for designing an automatic wiring processing process as an execution sequence of various processing in automatic wiring processing for printed circuit boards by using a computer. The wiring design processing method includes storing, in a storage unit, printed circuit board information including various physical information regarding the printed circuit boards, for each of the printed circuit boards; creating an automatic wiring processing process automatically according to a result of analyzing setting, wiring progress, and wiring situation at present regarding each of the printed circuit boards, after reading the printed circuit board information, stored in the storage unit at the storing, for each of the printed circuit boards; and executing the automatic wiring processing according to the automatic wiring processing process created at the creating, for each of the printed circuit boards. | 05-14-2009 |
20090125862 | Wiring path information creating method and wiring path information creating apparatus - A wiring processing apparatus decides each group formed by sorting signals that flow between component pins. Then, the wiring processing apparatus reads printed circuit board data and identifies a net cluster that belongs to each group. After a net cluster that belongs to each group is identified, the wiring processing apparatus refers to the printed circuit board data about the identified net cluster, and automatically creates each wiring route that indicates a wiring scanning area of the signal cluster in each group. Thus the wiring processing apparatus displays them on the printed board data. After the wiring route is automatically created, the wiring processing apparatus automatically creates wiring route information that corresponds to each wiring route, and controls them according to each wiring route. | 05-14-2009 |
20100031213 | DESIGN INFORMATION GENERATING APPARATUS - A design information generating apparatus that generates design information of a substrate includes a substrate region generating unit that generates a plurality of substrate regions in which the substrate is arranged based on a shape of the substrate included in a design condition, when the design condition of the substrate is obtained; and a design information generating unit that generates the design information by transferring the substrate generated based on the design condition to the plurality of substrate regions after at least one of the substrate regions of the plurality of the substrate regions is inverted. | 02-04-2010 |
20100106274 | WIRING DESIGN APPARATUS - A wiring design apparatus includes a first acquirer that acquires a first wiring block whose region has a maximum number of crossings with regions of other wiring blocks from printed circuit board data of a printed circuit board having a plurality of wiring blocks with a specific region on a wiring layer, a second acquirer that acquires second wiring blocks whose region does not cross the first wiring block from the printed circuit board data, and a wiring execution requester that causes a wiring processor to perform wiring processing on the first wiring block and the second wiring blocks in parallel. | 04-29-2010 |
20100170083 | Leading wiring method, leading wiring program, and leading wiring apparatus - When a formed position of a via formed on a board is the same as a position of a footprint of a chip component located on the back surface of the board corresponding to an area on which a BGA is mounted, a board designing apparatus determines that the chip component and the BGA can be connected using chip on hole. When it is determined that the chip component and the BGA can be connected, the board designing apparatus carries out chip on hole by forming a via in an area of the board on which the BGA is mounted, the via leading to the footprint of the chip component located on the back surface of the board. | 07-08-2010 |
20100235804 | WIRING DESIGN APPARATUS AND METHOD - A wiring design apparatus for designing a plurality of wiring lines of a printed circuit board including a plurality of connection posts arranged in a matrix, includes a processor, the processor providing an orthogonal grid including a plurality of rows and columns running over and between the connection posts, providing a plurality of diagonal paths each connecting at least one of the rows with at least one of the columns each running between each of adjacent pairs of the connection posts, and determining a route for each of the wiring lines by exclusively allocating to each of the wiring lines a selected part of the rows, the columns and the paths so that the selected part connects both ends of each of the wiring lines. | 09-16-2010 |
20100325594 | PRINTED CIRCUIT BOARD DESIGN ASSISTING METHOD, PRINTED CIRCUIT BOARD DESIGN ASSISTING DEVICE, AND STORAGE MEDIUM - A printed circuit board design assisting method, device and storage medium are provided. The assisting method includes referring to the position of terminals of a grid array package part, and attributes indicating whether each of the terminals is a power source terminal or a ground terminal, and selecting the power source terminals as a terminal to be researched, searching for a new connection path between the terminal which has been selected, and one of the ground terminals, by way of a first decoupling capacitor, determining whether there is duplication of paths between the new connection path and an connection path between the terminals connected by way of a second decoupling capacitor, changing the position of the second decoupling capacitor if duplication is detected, and re-searching a connection path between the terminals by way of the second decoupling capacitor, which is not in duplicate with the new connection path. | 12-23-2010 |
20110061039 | CIRCUIT BOARD DESIGN AID APPARATUS, CIRCUIT BOARD DESIGN AID METHOD, AND COMPUTER-READABLE STORAGE MEDIUM STORTING CIRCUIT BOARD DESIGN AID PROGRAM - The present disclosure includes a basic shield pattern element generation section configured to generate a basic shield pattern element based on a geometry of the pattern element and a preset pattern generation condition; a prohibition region generation section configured to generate a prohibition region based on a geometry of an element for which a clearance check is to be performed located around the wiring pattern and a clearance condition between the element for performing a clearance check and the wiring pattern; and a shield pattern geometry generation section configured to generate the shield pattern by excluding the geometry of the prohibition region from a geometry of the basic shield pattern element, thereby improving the design efficiency and design quality by efficiently generating shield patterns even when an element for which a clearance check is to be performed is present in the vicinity of the wiring pattern. | 03-10-2011 |
20110231809 | WIRING DESIGN DEVICE, METHOD AND RECORDING MEDIUM - A wiring design device to conduct wiring design on a printed wiring board that includes a plurality of conductive layers, the wiring design device including: noise contaminating part extracting means for extracting a part in a condition where noise contaminates a signal, the part being on a wiring-designed line, based on a route of the line and a physical condition around the route; route modification processing means for modifying the route of the line by moving the extracted part on the line in the condition where noise contaminates the signal to a position that avoids the condition where noise contaminates the signal; and line length adjusting means for conducting a line length adjustment on the line to compensate for a variation of the line length of the line when the variation of the line length of the line occurs due to modifying the route of the line. | 09-22-2011 |
20110246955 | METHOD, PROGRAM, AND APPARATUS FOR AIDING WIRING DESIGN - A wiring-design aiding method for causing a computer to execute generating paths for buses so that the buses do not cross each other with respect to a wiring area including at least one wiring layer, the paths being represented by corresponding graphics The computer further executes verifying, for each bus, whether wires for nets belonging to the bus are successfully extracted from a component to which the bus is connected; and recording, in the wiring area, graphics representing the nets belonging to a bus for which it is determined in the verification that all the nets belonging to the bus are successfully extracted. The bus-path generation is re-executed with respect to the bus for which it is determined in the verification that at least one of the nets is not successfully extracted. | 10-06-2011 |
20120117529 | APPARATUS, DESIGN METHOD AND RECORDING MEDIUM - A computer-readable medium storing a design program causing a computer to execute a process is provided. The process includes virtually routing, when routing of a wire to be connected between a first component and a second component at least one of which includes a swapping pin is being designed, the wire to be connected between a first pin of the first component and a first counterpart pin of the second component such that implementation of an actual routed wire connected therebetween is secured regardless of a net allocated to the swapping pin, and swapping one of the virtually routed first pin and the virtually routed first counterpart pin with the swapping pin such that the net allocated to the swapping pin is identical to a net allocated to the other one of the virtually routed first pin and the virtually routed first counterpart pin. | 05-10-2012 |
20130167101 | WIRING DESIGN APPARATUS AND METHOD - A wiring design apparatus for designing a plurality of wiring lines of a printed circuit board including a plurality of connection posts arranged in a matrix, includes a processor, the processor providing an orthogonal grid including a plurality of rows and columns running over and between the connection posts, providing a plurality of diagonal paths each connecting at least one of the rows with at least one of the columns each running between each of adjacent pairs of the connection posts, and determining a route for each of the wiring lines by exclusively allocating to each of the wiring lines a selected part of the rows, the columns and the paths so that the selected part connects both ends of each of the wiring lines. | 06-27-2013 |