Patent application number | Description | Published |
20140143637 | LOG-LIKELIHOOD RATIO (LLR) DAMPENING IN LOW-DENSITY PARITY-CHECK (LDPC) DECODERS - Described embodiments provide a media controller to read data stored in a media. The media controller determines a value for each bit of a shortened codeword from the media. The shortened codeword includes a plurality of non-shortened bits of a full codeword, where the full codeword includes the plurality of non-shortened bits and one or more shortened bits. Shortened bits correspond to bits unused in the shortened codeword. The media controller converts the determined values for each bit of the shortened codeword into a first set of log-likelihood ratio (LLR) values. The full codeword is decoded using the first set of LLR values for the shortened codeword. The media controller dampens one or more LLR values corresponding to non-shortened bits of the codeword to produce a second set of LLR values and decodes the second set of LLR values. | 05-22-2014 |
20150015984 | Storage Media Inter-Track interference Cancellation - Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. A decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track and a second adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of each adjacent track and subtracts the estimated ITI of each adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the decoder, Which decodes the ITT cancelled data and provides the decoded ITI cancelled data as output of the read channel. | 01-15-2015 |
20150092489 | FLASH MEMORY REFERENCE VOLTAGE DETECTION WITH TRACKING OF CROSS-POINTS OF CELL VOLTAGE DISTRIBUTIONS USING HISTOGRAMS - Cross-points of flash memory cell voltage distributions are determined by reading data from a portion of the flash memory two or more times using two or more different candidate reference voltages and determining corresponding decision patterns. The frequency of occurrence of the decision patterns in the data read from the flash memory is used to conceptually construct a histogram. The histogram is used to estimate the cross-points. Employing decision patterns enables multiple cross-point voltages to be determined with a minimum of read operations. | 04-02-2015 |
20150113205 | Systems and Methods for Latency Based Data Recycling in a Solid State Memory System - Systems and method relating generally to solid state memory, and more particularly to systems and methods for recycling data in a solid state memory. | 04-23-2015 |
20150113318 | Systems and Methods for Soft Data Utilization in a Solid State Memory System - Systems and methods relating generally to solid state memory, and more particularly to systems and methods for recovering data from a solid state memory. | 04-23-2015 |
20150113354 | GENERATING SOFT DECODING INFORMATION FOR FLASH MEMORY ERROR CORRECTION USING HARD DECISION PATTERNS - A flash memory controller having soft-decoding error correcting code (ECC) logic generates log likelihood ratio or similar ECC decoder soft input information from decision patterns obtained from reading data from the same portion of flash memory two or more times. Each decision pattern corresponds to a voltage region bordering one of the reference voltages. Each decision pattern represents a combination of flash memory bit value decisions for a cell voltage within the voltage region corresponding to the decision pattern when a corresponding combination of the reference voltages are used to read the cell. Numerical values are then computed in response to combinations of the flash memory bit value decisions represented by the decision patterns. The numerical values are provided to the soft-decoding ECC logic to serve as soft input information. | 04-23-2015 |
20150117097 | Systems and Methods for Sub-Zero Threshold Characterization in a Memory Cell - Systems and method relating generally to data processing, and more particularly to systems and methods for characterizing a solid state memory. | 04-30-2015 |
20150127883 | REDUCTION OR ELIMINATION OF A LATENCY PENALTY ASSOCIATED WITH ADJUSTING READ THRESHOLDS FOR NON-VOLATILE MEMORY - Channel information and channel conditions that are determined by an Offline Tracking process are used to determine whether or not an adjustment to the read reference voltage can be avoided altogether without detrimentally affecting performance, or, alternatively, to determine a precision with which a read reference voltage adjustment should be made. If it is determined based on the channel conditions that a read reference voltage adjustment can be avoided altogether, read performance is improved by reducing the probability that a read reference voltage adjustment needs to be made during normal read operations. If it is determined based on the channel conditions that a read reference voltage adjustment needs to be made with a particular precision, the read reference voltage is adjusted with that precision. This latter approach is advantageous in that a determination that the precision with which the adjustments can be made is relatively low leads to fewer adjustments having to be made during normal read operations. | 05-07-2015 |