Patent application number | Description | Published |
20100235811 | Promotion of a Child Procedure in Heterogeneous Architecture Software - A method for promotion of a child procedure in a software application for a heterogeneous architecture, wherein the heterogeneous architecture comprises a first architecture type and a second architecture type, comprises inserting a parameter representing a parallel frame pointer to a parent procedure of the child procedure into the child procedure; and modifying a reference in the child procedure to a stack variable of the parent procedure to include an indirect access to the parent procedure via the parallel frame pointer. | 09-16-2010 |
20130125105 | UNIFIED PARALLEL C WORK-SHARING LOOP CONSTRUCT TRANSFORMATION - Control flow information and data flow information associated with a program containing a upc_forall loop are built. A shared reference map data structure using the control flow information and the data flow information is created. All local shared accesses are hashed to facilitate a constant access stride after being rewritten. All local shared references in a hash entry having a longest list are privatized. The upc_forall loop is rewritten into a for loop. Responsive to a determination that an unprocessed upc_forall loop does not exist, dead store elimination is run. The control flow information and the data flow information associated with the program containing the for loop is rebuilt. | 05-16-2013 |
20130167130 | Data Prefetching and Coalescing for Partitioned Global Address Space Languages - An illustrative embodiment of a computer-implemented process for shared data prefetching and coalescing optimization versions a loop containing one or more shared references into an optimized loop and an un-optimized loop, transforms the optimized loop into a set of loops, and stores shared access associated information of the loop using a prologue loop in the set of loops. The shared access associated information pertains to remote data and is collected using the prologue loop in absence of network communication and builds a hash table. An associated data structure is updated each time the hash table is entered, and is sorted to remove duplicate entries and create a reduced data structure. Patterns across entries of the reduced data structure are identified and entries are coalesced. Data associated with a coalesced entry is pre-fetched using a single communication and a local buffer is populated with the fetched data for reuse. | 06-27-2013 |
20140115276 | INTRAPROCEDURAL PRIVATIZATION FOR SHARED ARRAY REFERENCES WITHIN PARTITIONED GLOBAL ADDRESS SPACE (PGAS) LANGUAGES - Partitioned global address space (PGAS) programming language source code is retrieved by an executed PGAS compiler. At least one shared memory array access indexed by an affine expression that includes a distinct thread identifier that is constant and different for each of a group of program execution threads targeted to execute the PGAS source code is identified within the PGAS source code. It is determined whether the at least one shared memory array access results in a local shared memory access by all of the group of program execution threads for all references to the at least one shared memory array access during execution of a compiled executable of the PGAS source code. A direct memory access executable code is generated for each shared memory array access determined to result in the local shared memory access by all of the group of program execution threads. | 04-24-2014 |
20140130025 | COMPILER OPTIMIZATION BASED ON COLLECTIVITY ANALYSIS - An embodiment is directed to determining, by a compiler, that a call to a named barrier is matched across all of a plurality of threads, and based at least in part on determining that the call to the named barrier is matched across all of the plurality of threads, replacing, by the compiler, the named barrier with an unnamed barrier. | 05-08-2014 |
20140196018 | COMPILER OPTIMIZATION BASED ON COLLECTIVITY ANALYSIS - An embodiment is directed to determining, by a compiler, that a call to a named barrier is matched across all of a plurality of threads, and based at least in part on determining that the call to the named barrier is matched across all of the plurality of threads, replacing, by the compiler, the named barrier with an unnamed barrier. | 07-10-2014 |
20140372724 | ALLOCATION OF DISTRIBUTED DATA STRUCTURES - Allocating distributed data structures and managing allocation of a symmetric heap can include defining, using a processor, the symmetric heap. The symmetric heap includes a symmetric partition for each process of a partitioned global address space (PGAS) system. Each symmetric partition of the symmetric heap begins at a same starting virtual memory address and has a same global symmetric break. One process of a plurality of processes of the PGAS system is configured as an allocator process that controls allocation of blocks of memory for each symmetric partition of the symmetric heap. Using the processor executing the allocator process, isomorphic fragmentation among the symmetric partitions of the symmetric heap is maintained. | 12-18-2014 |
20140372725 | ALLOCATION OF DISTRIBUTED DATA STRUCTURES - Allocating distributed data structures and managing allocation of a symmetric heap can include defining, using a processor, the symmetric heap. The symmetric heap includes a symmetric partition for each process of a partitioned global address space (PGAS) system. Each symmetric partition of the symmetric heap begins at a same starting virtual memory address and has a same global symmetric break. One process of a plurality of processes of the PGAS system is configured as an allocator process that controls allocation of blocks of memory for each symmetric partition of the symmetric heap. Using the processor executing the allocator process, isomorphic fragmentation among the symmetric partitions of the symmetric heap is maintained. | 12-18-2014 |