Patent application number | Description | Published |
20080215772 | SYSTEM METHOD STRUCTURE IN NETWORK PROCESSOR THAT INDICATES LAST DATA BUFFER OF FRAME PACKET BY LAST FLAG BIT THAT IS EITHER IN FIRST OR SECOND POSITION - A method and structure for determining when a frame of information comprised of one or more buffers of data being transmitted in a network processor has completed transmission is provided. The network processor includes several control blocks, one for each data buffer, each containing control information linking one buffer to another. Each control block has a last bit feature which is a single bit settable to “one” or “zero” and indicates when the data buffer having the last bit is transmitted. The last bit is in a first position when an additional data buffer is to be chained to a previous data buffer indicating an additional data buffer is to be transmitted and a second position when no additional data buffer is to be chained to a previous data buffer. The position of the last bit is communicated to the network processor indicating the ending of a particular frame. | 09-04-2008 |
20080222116 | LONGEST PREFIX MATCH (LPM) ALGORITHM IMPLEMENTATION FOR A NETWORK PROCESSOR - Novel data structures, methods and apparatus for finding the longest prefix match search when searching tables with variable length patterns or prefixes. To find the exact match or the best matching prefix, patterns have to be compared a bit at a time until the exact or first match is found. This requires “n” number of comparisons or memory accesses to identify the closest matching pattern. The trees are built in such a way that the matching result is guaranteed to be a best match, whether it is an exact match or a longest prefix match. Using the trail of all the birds and associated prefix lengths enables determination of the correct prefix result from the trail. By construction, the search tree provides the best matching prefix at or after the first compare during walking of the trail or tree. | 09-11-2008 |
20080222324 | SYSTEM METHOD STRUCTURE IN NETWORK PROCESSOR THAT INDICATES LAST DATA BUFFER OF FRAME PACKET BY LAST FLAG BIT THAT IS EITHER IN FIRST OR SECOND POSITION - A method and structure for determining when a frame of information comprised of one or more buffers of data being transmitted in a network processor has completed transmission is provided. The network processor includes several control blocks, one for each data buffer, each containing control information linking one buffer to another. Each control block has a last bit feature which is a single bit settable to “one or “zero” and indicates the transmission of when the data buffer having the last bit. The last bit is in a first position when an additional data buffer is to be chained to a previous data buffer indicating an additional data buffer is to be transmitted and a second position when no additional data buffer is to be chained to a previous data buffer. The position of the last bit is communicated to the network processor indicating the ending of a particular frame. | 09-11-2008 |
20080229271 | DATA ALIGNER IN RECONFIGURABLE COMPUTING ENVIRONMENT - A data aligner in a reconfigurable computing environment is disclosed. Embodiments employ hardware macros in field configurable gate arrays (FPGAs) to minimize the number of configurable logic blocks (CLBs) needed to shift bytes of data. The alignment mechanism allows flexibility, scalability, configurability, and reduced costs as compared to application specific integrated circuits. | 09-18-2008 |
20080229272 | DATA ALIGNER IN RECONFIGURABLE COMPUTING ENVIRONMENT - A data aligner in a reconfigurable computing environment is disclosed. Embodiments employ hardware macros in field configurable gate arrays (FPGAs) to minimize the number of configurable logic blocks (CLBs) needed to shift bytes of data. The alignment mechanism allows flexibility, scalability, configurability, and reduced costs as compared to application specific integrated circuits. | 09-18-2008 |
20080273539 | SYSTEM FOR PERFORMING A PACKET HEADER LOOKUP - A system for performing a lookup for a packet in a computer network are disclosed. The packet includes a header. The system includes a parser, a lookup engine coupled with the parser, and a processor coupled with the lookup engine. The parser parses the packet for the header prior to receipt of the packet being completed. The lookup engine performs a lookup for the header and returns a resultant. In one aspect, the lookup includes performing a local lookup of a cache that includes resultants of previous lookups. The processor processes the resultant. | 11-06-2008 |
20080317027 | SYSTEM FOR REDUCING LATENCY IN A HOST ETHERNET ADAPTER (HEA) - A system for reducing latency in a host Ethernet adapter (HEA) includes the following. First, the HEA receives a packet with an internet protocol (IP) header and data in the HEA. The HEA parses a connection identifier from the IP header and accesses a negative cache in the HEA to determine if the connection identifier is not in a memory external to the HEA. The HEA applies a default treatment to the packet if the connection identifier is not in the memory, thereby reducing latency by decreasing access to the memory. | 12-25-2008 |
20090083611 | APPARATUS FOR BLIND CHECKSUM AND CORRECTION FOR NETWORK TRANSMISSIONS - Apparatus for providing a checksum in a network transmission. In one aspect of the invention, a checksum for a packet to be transmitted on a network is determined by retrieving packet information from a storage device, the packet information to be included in the packet to be transmitted. A blind checksum value is determined based on the retrieved packet information, and the blind checksum value is adjusted to a protocol checksum based on descriptor information describing the structure of the packet. The protocol checksum is inserted in the packet before the packet is transmitted. | 03-26-2009 |