Patent application number | Description | Published |
20100169197 | CONSOLIDATING LEADS RECEIVED FROM POTENTIAL RENTERS FOR BILLING A LISTER - In some example embodiments, a system and method are illustrated to bill a lister using consolidated leads received from potential renters. The system and method include receiving from at least one potential renter, at least one lead directed to a property listing associated with a lister. The system and method include consolidating two or more leads received from the same potential renter into a lead group. The system and method further include billing the lister according to the number of distinct leads received from potential renters counting each lead group as a distinct lead. In some example embodiments, the system and method further include setting a specified listing period for the lister and checking whether the specified listing period has expired before counting a received lead. | 07-01-2010 |
20100169198 | BILLING A LISTER FOR LEADS RECEIVED FROM POTENTIAL RENTERS WITHIN A LEAD THRESHOLD - In some example embodiments, a system and method are illustrated to bill a lister for lead received from potential renters within a lead threshold. The system and method include setting a lead threshold for a lister. The lead threshold may specify a maximum number of leads relating to a property listing that will be communicated to the lister. The system and method include receiving a lead from potential renters. The lead may be related to the property listing associated with the lister. The system and method include automatically determining whether the lead threshold has been exceeded. The system and method include communicating the lead to the lister based on a determination that the lead threshold has not been exceeded. The system and method further include billing the lister according to a number of leads related to the property listing communicated to the lister. | 07-01-2010 |
20120116926 | CONSOLIDATING LEADS INTO A LEAD GROUP - In some example embodiments, a system and method are illustrated to consolidate leads received from multiple user devices used by a single user. The system and method may include identifying a first plurality of leads received from one or more user devices as being submitted by a same user via the one or more user devices. The first plurality of leads may be directed to a listing provided by a lister. The first plurality of leads may be added to a lead group. Then, a second plurality of leads received from one or more users including the same user may be forwarded to the lister. The forwarding may include notifying the lister of a first count of the second plurality of leads. The first count may include the lead group counted as one lead. | 05-10-2012 |
20140222500 | Consolidating Leads into a Lead Group - In some example embodiments, a system and method are illustrated to consolidate leads received from multiple user devices used by a single user. The system and method may include identifying a first plurality of leads received from one or more user devices as being submitted by a same user via the one or more user devices. The first plurality of leads may be directed to a listing provided by a lister. The first plurality of leads may be added to a lead group. Then, a second plurality of leads received from one or more users including the same user may be forwarded to the lister. The forwarding may include notifying the lister of a first count of the second plurality of leads. The first count may include the lead group counted as one lead. | 08-07-2014 |
Patent application number | Description | Published |
20080222317 | Data Flow Control Within and Between DMA Channels - In one embodiment, a direct memory access (DMA) controller comprises a transmit circuit and a data flow control circuit coupled to the transmit circuit. The transmit circuit is configured to perform DMA transfers, each DMA transfer described by a DMA descriptor stored in a data structure in memory. There is a data structure for each DMA channel that is in use. The data flow control circuit is configured to control the transmit circuit's processing of DMA descriptors for each DMA channel responsive to data flow control data in the DMA descriptors in the corresponding data structure. | 09-11-2008 |
20100011136 | Functional DMA - In one embodiment, a direct memory access (DMA) controller comprises a transmit control circuit, an offload engine, and a receive control circuit. The transmit control circuit is configured to read first DMA data from an address space in a host. Coupled to receive the first DMA data from the transmit control circuit, the offload engine is configured to perform at least a first operation on the first DMA data to produce a result. The offload engine is configured to at least start performing the first operation during a DMA transfer that provides the first DMA data to the offload engine. Coupled to the offload engine to receive the result, the receive control circuit is configured to write the result to the address space in the host according to a DMA descriptor data structure that describes the DMA transfer. | 01-14-2010 |
20110035459 | Network Direct Memory Access - In one embodiment, a system comprises at least a first node and a second node coupled to a network. The second node comprises a local memory and a direct memory access (DMA) controller coupled to the local memory. The first node is configured to transmit at least a first packet to the second node to access data in the local memory and at least one other packet that is not coded to access the local memory. The second node is configured to capture the packet from a data link layer of a protocol stack, and wherein the DMA controller is configured to perform one more transfers with the local memory to access the data specified by the first packet responsive to the first packet received from the data link layer. The second node is configured to process the other packet to a top of the protocol stack. | 02-10-2011 |
20110307759 | Functional DMA - In one embodiment, a direct memory access (DMA) controller comprises a transmit control circuit, an offload engine, and a receive control circuit. The transmit control circuit is configured to read first DMA data from an address space in a host. Coupled to receive the first DMA data from the transmit control circuit, the offload engine is configured to perform at least a first operation on the first DMA data to produce a result. The offload engine is configured to at least start performing the first operation during a DMA transfer that provides the first DMA data to the offload engine. Coupled to the offload engine to receive the result, the receive control circuit is configured to write the result to the address space in the host according to a DMA descriptor data structure that describes the DMA transfer. | 12-15-2011 |
20120036289 | Data Flow Control Within and Between DMA Channels - In one embodiment, a direct memory access (DMA) controller comprises a transmit circuit and a data flow control circuit coupled to the transmit circuit. The transmit circuit is configured to perform DMA transfers, each DMA transfer described by a DMA descriptor stored in a data structure in memory. There is a data structure for each DMA channel that is in use. The data flow control circuit is configured to control the transmit circuit's processing of DMA descriptors for each DMA channel responsive to data flow control data in the DMA descriptors in the corresponding data structure. | 02-09-2012 |
20120297096 | Data Flow Control Within and Between DMA Channels - In one embodiment, a direct memory access (DMA) controller comprises a transmit circuit and a data flow control circuit coupled to the transmit circuit. The transmit circuit is configured to perform DMA transfers, each DMA transfer described by a DMA descriptor stored in a data structure in memory. There is a data structure for each DMA channel that is in use. The data flow control circuit is configured to control the transmit circuit's processing of DMA descriptors for each DMA channel responsive to data flow control data in the DMA descriptors in the corresponding data structure. | 11-22-2012 |
Patent application number | Description | Published |
20100131680 | Unified DMA - In one embodiment, an apparatus comprises a first interface circuit, a direct memory access (DMA) controller coupled to the first interface circuit, and a host coupled to the DMA controller. The first interface circuit is configured to communicate on an interface according to a protocol. The host comprises at least one address space mapped, at least in part, to a plurality of memory locations in a memory system of the host. The DMA controller is configured to perform DMA transfers between the first interface circuit and the address space, and the DMA controller is further configured to perform DMA transfers between a first plurality of the plurality of memory locations and a second plurality of the plurality of memory locations. | 05-27-2010 |
20110314186 | Unified DMA - In one embodiment, an apparatus comprises a first interface circuit, a direct memory access (DMA) controller coupled to the first interface circuit, and a host coupled to the DMA controller. The first interface circuit is configured to communicate on an interface according to a protocol. The host comprises at least one address space mapped, at least in part, to a plurality of memory locations in a memory system of the host. The DMA controller is configured to perform DMA transfers between the first interface circuit and the address space, and the DMA controller is further configured to perform DMA transfers between a first plurality of the plurality of memory locations and a second plurality of the plurality of memory locations. | 12-22-2011 |
20120233360 | Unified DMA - In one embodiment, an apparatus comprises a first interface circuit, a direct memory access (DMA) controller coupled to the first interface circuit, and a host coupled to the DMA controller. The first interface circuit is configured to communicate on an interface according to a protocol. The host comprises at least one address space mapped, at least in part, to a plurality of memory locations in a memory system of the host. The DMA controller is configured to perform DMA transfers between the first interface circuit and the address space, and the DMA controller is further configured to perform DMA transfers between a first plurality of the plurality of memory locations and a second plurality of the plurality of memory locations. | 09-13-2012 |
20120297097 | UNIFIED DMA - In one embodiment, an apparatus comprises a first interface circuit, a direct memory access (DMA) controller coupled to the first interface circuit, and a host coupled to the DMA controller. The first interface circuit is configured to communicate on an interface according to a protocol. The host comprises at least one address space mapped, at least in part, to a plurality of memory locations in a memory system of the host. The DMA controller is configured to perform DMA transfers between the first interface circuit and the address space, and the DMA controller is further configured to perform DMA transfers between a first plurality of the plurality of memory locations and a second plurality of the plurality of memory locations. | 11-22-2012 |
Patent application number | Description | Published |
20130305263 | COMMUNICATIONS MANAGEMENT - The creation of a virtual network adapter is disclosed. At least one existing network device having an existing driver is discovered. At least one of an existing device-to-driver mapping and an existing driver associated with the existing network device is removed. A new driver capable of communicating with the existing network device using a common set of primitive commands is installed. The new driver is mapped to the existing device. The use of the virtual network adapter is also disclosed. | 11-14-2013 |
20130315095 | LINK MICROBENCHMARKING WITH IDLE LINK CORRECTION - Measuring the speed of a link is disclosed. An initial packet train having an initial length over the link is sent. A speed result is determined based at least in part on an actual time of reception of individual packets in the packet train. The quality of the speed result for the initial packet train is evaluated according to a constraint. A determination is made as to whether to send a subsequent packet train based at least in part on the quality of the speed result. | 11-28-2013 |
20140029630 | FRACTIONAL THRESHOLD ENCODING AND AGGREGATION - Fractional encoding of a packet into fractional packets and reconstruction of fractional packets into an original packet is disclosed. A packet is received. A plurality fractional packets is constructed from the received packet such that the received packet is fully reconstructable from a portion of the fractional packets. The portion is fewer than all of the fractional packets. At least one fractional packet is transmitted. | 01-30-2014 |
20140075057 | MULTI-MODEM DEVICE - A multi-modem device is disclosed. The multi-modem device includes a housing. Included within the housing is a plurality of modems, wherein the modems send and receive data along a common data bus. The multi-modem device further includes an interface that provides a connection that enables the modems to communicate with a computer, wherein each of the modems is made available to the computer so that the modems may be selected either individually or in parallel to provide one or more communication links to the computer. | 03-13-2014 |
20140223451 | COMMUNICATIONS DRIVER MANAGEMENT - The creation of a virtual network adapter is disclosed. At least one existing network device having an existing driver is discovered. At least one of an existing device-to-driver mapping and an existing driver associated with the existing network device is removed. A new driver capable of communicating with the existing network device using a common set of primitive commands is installed. The new driver is mapped to the existing device. The use of the virtual network adapter is also disclosed. | 08-07-2014 |
Patent application number | Description | Published |
20140046243 | APPARATUS AND METHODS FOR CLOT DISRUPTION AND EVACUATION - The apparatus includes a catheter having a combined infusion/aspiration lumen, a three lumen proximal portion and a two lumen distal portion. An infusion/aspiration valve located at the distal end of the catheter facilitates performing infusion and aspiration through the same lumen, which in turn reduces the number of lumens, and enables the combined infusion/aspiration lumen to be made larger without the need to increase the diameter of the catheter. Differing material properties in the proximal and distal portions of the catheter enable the proximal portion to be made stiffer for pushability, while the distal portion is more flexible to navigate tortuous vasculature and enable a greater amplitude agitator to be received within the catheter. | 02-13-2014 |
20140046244 | APPARATUS AND METHODS FOR CLOT DISRUPTION AND EVACUATION - The apparatus includes a catheter having a combined infusion/aspiration lumen, a three lumen proximal portion and a two lumen distal portion. An infusion/aspiration valve located at the distal end of the catheter facilitates performing infusion and aspiration through the same lumen, which in turn reduces the number of lumens, and enables the combined infusion/aspiration lumen to be made larger without the need to increase the diameter of the catheter. Differing material properties in the proximal and distal portions of the catheter enable the proximal portion to be made stiffer for pushability, while the distal portion is more flexible to navigate tortuous vasculature and enable a greater amplitude agitator to be received within the catheter. | 02-13-2014 |
20140379012 | Introducer Sheaths, Thrombus Collection Devices, and Associated Methods - A sheath comprises an elastomeric tube having a self-expanding scaffold coupled to a wall. The scaffold can expand to a diameter larger than the tube diameter to provide an enlarged distal opening. An aspiration catheter has a balloon and an aspiration port so that occlusive material can be removed from a blood vessel by drawing the balloon through the vessel while simultaneously aspirating through the port. | 12-25-2014 |
Patent application number | Description | Published |
20090142770 | Hair Follicle Pharmacodynamic Assay for Telomerase Activity - The invention is directed to methods for determining the efficacy of treatment with telomerase modulators in mammals by the analysis of the level of telomerase reverse transcriptase activity in mammalian hair follicle cells. | 06-04-2009 |
20100016407 | Combined Telomerase Inhibitor and Gemcitabine for the Treatment of Cancer - A method and kit for inhibiting the proliferation of cancer cells are disclosed, based on a combination of a gemcitabine and a telomerase inhibitor. When used in cancer therapy, the two compounds in combination enhance the anti-cancer treatment efficacy obtained with gemcitabine alone or the telomerase inhibitor alone. Preferably, efficacy is supraadditive or synergistic in nature relative to the combined effects of the individual agents, with minimal exacerbation of side effects. | 01-21-2010 |
20100104586 | Treatment of Carcinomas with a Combination of EGF-Pathway and Telomerase Inhibitors - A method and kit for inhibiting the proliferation of carcinoma cells are disclosed, based on a combination of an EGF pathway inhibitor and a telomerase inhibitor. When used in cancer therapy, the two compounds in combination enhance the anti-cancer treatment efficacy obtained with the antibody alone or the telomerase inhibitor alone. | 04-29-2010 |
20140248622 | Telomere Length Measurement in Formalin-Fixed, Paraffin Embedded (FFPE) Samples by Quantitative PCR - Methods of reliably quantifying telomere length in cells or tissues that have been formalin fixed and paraffin embedded (FFPE) samples by quantitative polymerase chain reaction protocol and kits for use with such various methods are provided. The methods of the present invention may be used to predetermine an individual's response to treatment with a telomerase inhibitor, a telomere damaging agent or a telomerase activator. | 09-04-2014 |
20150359883 | Treatment of Carcinomas with a Combination of EGF-Pathway and Telomerase Inhibitors - A method and kit for inhibiting the proliferation of carcinoma cells are disclosed, based on a combination of an EGF pathway inhibitor and a telomerase inhibitor. When used in cancer therapy, the two compounds in combination enhance the anti-cancer treatment efficacy obtained with the antibody alone or the telomerase inhibitor alone. | 12-17-2015 |
Patent application number | Description | Published |
20110102788 | Tunable Quantum Cascade Lasers and Photoacoustic Detection of Trace Gases, TNT, TATP and Precursors Acetone and Hydrogen Peroxide - Methods and apparatus for broad tuning of single wavelength quantum cascade lasers and the use of light output from such lasers for highly sensitive detection of trace gases such as nitrogen dioxide, acetylene, and vapors of explosives such as trinitrotoluene (TNT) and triacetone triperoxide (TATP) and TATP's precursors including acetone and hydrogen peroxide. These methods and apparatus are also suitable for high sensitivity, high selectivity detection of other chemical compounds including chemical warfare agents and toxic industrial chemicals. A quantum cascade laser (QCL) system that better achieves single mode, continuous, mode-hop free tuning for use in L-PAS (laser photoacoustic spectroscopy) by independently coordinating gain chip current, diffraction grating angle and external cavity length is described. An all mechanical method that achieves similar performance is also described. Additionally, methods for improving the sensor performance by critical selection of wavelengths are presented. | 05-05-2011 |
20110103411 | Tunable Quantum Cascade Lasers and Photoacoustic Detection of Trace Gases, TNT, TATP and Precursors Acetone and Hydrogen Peroxide - Methods and apparatus for broad tuning of single wavelength quantum cascade lasers and the use of light output from such lasers for highly sensitive detection of trace gases such as nitrogen dioxide, acetylene, and vapors of explosives such as trinitrotoluene (TNT) and triacetone triperoxide (TATP) and TATP's precursors including acetone and hydrogen peroxide. These methods and apparatus are also suitable for high sensitivity, high selectivity detection of other chemical compounds including chemical warfare agents and toxic industrial chemicals. A quantum cascade laser (QCL) system that better achieves single mode, continuous, mode-hop free tuning for use in L-PAS (laser photoacoustic spectroscopy) by independently coordinating gain chip current, diffraction grating angle and external cavity length is described. An all mechanical method that achieves similar performance is also described. Additionally, methods for improving the sensor performance by critical selection of wavelengths are presented. | 05-05-2011 |
20110103412 | Tunable Quantum Cascade Lasers and Photoacoustic Detection of Trace Gases, TNT, TATP and Precursors Acetone and Hydrogen Peroxide - Methods and apparatus for broad tuning of single wavelength quantum cascade lasers and the use of light output from such lasers for highly sensitive detection of trace gases such as nitrogen dioxide, acetylene, and vapors of explosives such as trinitrotoluene (TNT) and triacetone triperoxide (TATP) and TATP's precursors including acetone and hydrogen peroxide. These methods and apparatus are also suitable for high sensitivity, high selectivity detection of other chemical compounds including chemical warfare agents and toxic industrial chemicals. A quantum cascade laser (QCL) system that better achieves single mode, continuous, mode-hop free tuning for use in L-PAS (laser photoacoustic spectroscopy) by independently coordinating gain chip current, diffraction grating angle and external cavity length is described. An all mechanical method that achieves similar performance is also described. Additionally, methods for improving the sensor performance by critical selection of wavelengths are presented. | 05-05-2011 |
20110103416 | Tunable Quantum Cascade Lasers and Photoacoustic Detection of Trace Gases, TNT, TATP and Precursors Acetone and Hydrogen Peroxide - Methods and apparatus for broad tuning of single wavelength quantum cascade lasers and the use of light output from such lasers for highly sensitive detection of trace gases such as nitrogen dioxide, acetylene, and vapors of explosives such as trinitrotoluene (TNT) and triacetone triperoxide (TATP) and TATP's precursors including acetone and hydrogen peroxide. These methods and apparatus are also suitable for high sensitivity, high selectivity detection of other chemical compounds including chemical warfare agents and toxic industrial chemicals. A quantum cascade laser (QCL) system that better achieves single mode, continuous, mode-hop free tuning for use in L-PAS (laser photoacoustic spectroscopy) by independently coordinating gain chip current, diffraction grating angle and external cavity length is described. An all mechanical method that achieves similar performance is also described. Additionally, methods for improving the sensor performance by critical selection of wavelengths are presented. | 05-05-2011 |
20110158270 | Tunable Quantum Cascade Lasers And Photoacoustic Detection Of Trace Gases, TNT, TATP and Precursors Acetone And Hydrogen Peroxide - Methods and apparatus for broad tuning of single wavelength quantum cascade lasers and the use of light output from such lasers for highly sensitive detection of trace gases such as nitrogen dioxide, acetylene, and vapors of explosives such as trinitrotoluene (TNT) and triacetone triperoxide (TATP) and TATP's precursors including acetone and hydrogen peroxide. These methods and apparatus are also suitable for high sensitivity high selectivity detection of other chemical compounds including chemical warfare agents and toxic industrial chemicals. A quantum cascade laser (QCL) system that better achieves single mode, continuous, mode-hop free tuning for use in L-PAS (laser photoacoustic spectroscopy) by independently coordinating gain chip current, diffraction grating angle and external cavity length is described. An all mechanical method that achieves similar performance is also described. Additionally, methods for improving the sensor performance by critical selection of wavelengths are presented. | 06-30-2011 |
Patent application number | Description | Published |
20120044372 | DUAL IMAGE SENSOR IMAGE PROCESSING SYSTEM AND METHOD - Various techniques are provided for processing image data acquired using a digital image sensor. In accordance with aspects of the present disclosure, one such technique may relate to the processing of image data in a system that supports multiple image sensors. In one embodiment, the image processing system may include control circuitry configured to determine whether a device is operating in a single sensor mode (one active sensor) or a dual sensor mode (two active sensors). When operating in the single sensor mode, data may be provided directly to a front-end pixel processing unit from the sensor interface of the active sensor. When operating in a dual sensor mode, the image frames from the first and second sensors are provided to the front-end pixel processing unit in an interleaved manner. For instance, in one embodiment, the image frames from the first and second sensors are written to a memory, and then read out to the front-end pixel processing unit in an interleaved manner. | 02-23-2012 |
20120046930 | Controller and Fabric Performance Testing - In an embodiment, a model may be created using a register-transfer level (RTL) representation (or other cycle-accurate representation) of the controller and the circuitry in the communication fabric to the controller. The request sources may be replaced by transactors, which may generate transactions to test the performance of the fabric and controller. Accordingly, only the designs of the controller and the fabric circuitry may be needed to model performance in this embodiment. In an embodiment, at least some of the transactors may be behavioral transactors that attempt to mimic the operation of corresponding request sources. Other transactors may be statistical distributions, in some embodiments. In an embodiment, the transactors may include a transaction generator (e.g. behavioral or statistical) and a protocol translator configured to convert generated transactions to the communication protocol in use at the point that the transactor is connected to the fabric. | 02-23-2012 |
20150139603 | Modeless Video and Still Frame Capture - In an embodiment, an electronic device may be configured to capture still frames during video capture, but may capture the still frames in the 4×3 aspect ratio and at higher resolution than the 16×9 aspect ratio video frames. The device may interleave high resolution, 4×3 frames and lower resolution 16×9 frames in the video sequence, and may capture the nearest higher resolution, 4×3 frame when the user indicates the capture of a still frame. Alternatively, the device may display 16×9 frames in the video sequence, and then expand to 4×3 frames when a shutter button is pressed. The device may capture the still frame and return to the 16×9 video frames responsive to a release of the shutter button. | 05-21-2015 |
20160065969 | VIDEO ENCODER WITH CONTEXT SWITCHING - A context switching method for video encoders that enables higher priority video streams to interrupt lower priority video streams. A high priority frame may be received for processing while another frame is being processed. The pipeline may be signaled to perform a context stop for the current frame. The pipeline stops processing the current frame at an appropriate place, and propagates the stop through the stages of the pipeline and to a transcoder through DMA. The stopping location is recorded. The video encoder may then process the higher-priority frame. When done, a context restart is performed and the pipeline resumes processing the lower-priority frame beginning at the recorded location. The transcoder may process data for the interrupted frame while the higher-priority frame is being processed in the pipeline, and similarly the pipeline may begin processing the lower-priority frame after the context restart while the transcoder completes processing the higher-priority frame. | 03-03-2016 |