Patent application number | Description | Published |
20110055794 | Method for Modeling a Magnetic Tunnel Junction with Spin-Polarized Current Writing - The junction comprising a stack of at least two magnetic layers, a first layer, for example a soft magnetic layer with controllable magnetization, and a second layer, for example a hard magnetic layer with fixed magnetization, the magnetization of the soft layer being described by a uniform magnetic moment, the dynamic behavior of the junction being modeled by an equivalent electrical circuit comprising at least two coupled parts: a first part representing the stack of the layers, through which a current flows corresponding to the polarized current flowing through said layers whose resistance across its terminals depends on three voltages representing the three dimensions of the magnetic moment along three axes, modeling the tunnel effect; a second part representing the behavior of the magnetic moment, comprising three circuits each representing a dimension of the magnetic moment by the three voltages, each of the three voltages depending on the voltages in the other dimensions and on the voltage across the terminals of the stack, modeling the torque effect exerted by the polarized current on the magnetization of the soft layer. | 03-03-2011 |
20110115522 | MAGNETIC DEVICE FOR PERFORMING A LOGIC FUNCTION - A device for performing a “logic function” consisting of a magnetic structure including at least a first magnetoresistive stack including a first ferromagnetic layer and a second ferromagnetic layer separated by a non-ferromagnetic interlayer and at least one first line of current situated in the vicinity of the first magnetoresistive stack and generating in the vicinity of the first stack a magnetic field when an electric current passes through it. The first line includes at least two current input points so that two currents can be added together in the first line, with the sum of the two currents being determined by the logic function. | 05-19-2011 |
20110221470 | MAGNETIC DEVICE FOR PERFORMING A "LOGIC FUNCTION" - A device for performing a “logic function” including a magnetic structure including at least one first magnetoresistive stack including a first ferromagnetic layer and a second ferromagnetic layer separated by a non-ferromagnetic interlayer, the ferromagnetic hard layer being pinned in a fixed magnetic state which serves as a reference and at least one first and one second current line belonging to a first and a second level of metallization respectively, each of the two lines generating a magnetic field in the vicinity of the first stack when a current flows therethrough. The first and second lines are disposed at various distances of the second ferromagnetic layer, the various distances being determined by the “logic function”. | 09-15-2011 |
20120314487 | Magnetic Random Access Memory Devices Including Multi-Bit Cells - A magnetic random access memory (“MRAM”) cell includes: (1) a first magnetic layer having a first magnetization direction and a magnetic anisotropy axis; (2) a second magnetic layer having a second magnetization direction; and (3) a spacer layer disposed between the first magnetic layer and the second magnetic layer. The MRAM cell also includes a field line magnetically coupled to the MRAM cell and configured to induce a write magnetic field along a magnetic field axis, and the magnetic anisotropy axis is tilted relative to the magnetic field axis. During a write operation, the first magnetization direction is switchable between m directions to store data corresponding to one of m logic states, with m>2, at least one of the m directions is aligned relative to the magnetic anisotropy axis, and at least another one of the m directions is aligned relative to the magnetic field axis. | 12-13-2012 |
20140070844 | VOLATILE/NON-VOLATILE MEMORY CELL - The invention concerns a memory device comprising at least one memory cell comprising: a first transistor ( | 03-13-2014 |
20140078810 | LOADLESS VOLATILE/NON-VOLATILE MEMORY CELL - The invention concerns a memory device comprising at least one memory cell comprising: first and second transistors ( | 03-20-2014 |
20150084671 | REPROGRAMMABLE LOGIC DEVICE RESISTANT TO RADIATIONS - The invention relates to a reprogrammable logic device comprising a plurality of elementary patches, each patch comprising: at least one logic block configurable by one or more volatile memory cells storing configuration data; and a memory comprising: a plurality of non-volatile memory cells storing refresh data, each non-volatile memory cell comprising first and second resistance-switching elements, each being programmable so as to have one of a first and of a second resistance value representative of the refresh data; and a read-write circuit adapted for periodically refreshing the configuration data on the basis of the refresh data. | 03-26-2015 |
20160055908 | NON-VOLATILE MEMORY CELL - The invention concerns a memory cell comprising: first and second resistive elements ( | 02-25-2016 |