| Patent application number | Description | Published |
|---|
| 20080238734 | Fast Implementation Of Decoding Function For Variable Length Encoding - An embodiment of the present inventions is a method for encoding/decoding data of variable length format and is used to omit unnecessary pieces of data for the purpose of improving processing performance, reducing the size of data on communication paths and efficiently using limited physical memory. As examples of such variable length encoding, BER compression and UTF-8 encoding of UNICODE text, etc., are cited. While the amount of data can be reduced through encoding, before the data is actually used, it is necessary to restore (decode) it to the original data, which requires a great deal of processing time. One aspect of the present invention is improving decoding by reducing the processing time required to decode the encoded data. | 10-02-2008 |
| 20080238735 | Fast Implementation Of Decoding Function For Variable Length Encoding - An embodiment of the present inventions is a method for encoding/decoding data of variable length format and is used to omit unnecessary pieces of data for the purpose of improving processing performance, reducing the size of data on communication paths and efficiently using limited physical memory. As examples of such variable length encoding, BER compression and UTF-8 encoding of UNICODE text, etc., are cited. While the amount of data can be reduced through encoding, before the data is actually used, it is necessary to restore (decode) it to the original data, which requires a great deal of processing time. One aspect of the present invention is improving decoding by reducing the processing time required to decode the encoded data. | 10-02-2008 |
| 20080270772 | Reduced data transfer during processor context switching - Data transfer during processor context switching is reduced, particularly in relation to a time-sharing microtasking programming model. Prior to switching context of a processor having local memory from a first to a second process, a portion of the local memory that does not require transfer to system memory for proper saving of data associated with the first process is determined. The context of the processor is then switched from the first to the second process, including transferring all of the local memory as the data associated with the first process, to system memory—except for the portion of the local memory that has been determined as not requiring saving to the system memory for proper saving of the data associated with the first process. Therefore, switching the context from the first to the second process results in a reduction of data transferred from the local memory to the system memory. | 10-30-2008 |
| 20080276256 | Method and System for Speeding Up Mutual Exclusion - In a multiprocessor computer system, a lock operation is maintained with a thread using non-atomic instructions. Identifiers are assigned to each thread. Flags in conjunction with the thread identifiers are used to determine the continuity of the lock with a thread. However, in the event continuity of the lock with the thread ceases, a compare-and-swap operation is executed to reset the lock with the same thread or another thread. Similarly, in the event there has been a collision between two or more threads requesting the lock, a compare-and-swap operation is executed to assign the lock to one of the requesting threads. Accordingly, prolonged ownership of a lock operation by a thread is encouraged to mitigate use of atomic operations in granting of the lock to a non-owning thread. | 11-06-2008 |
| 20090222644 | Merge Operations of Data Arrays Based on SIMD Instructions - A method and apparatus are provided to perform efficient merging operations of two or more streams of data by using SIMD instruction. Streams of data are merged together in parallel and with mitigated or removed conditional branching. The merge operations of the streams of data include Merge AND and Merge OR operations. | 09-03-2009 |
| 20090306952 | SIMULATION METHOD, SYSTEM AND PROGRAM - In a normal operation, a physical unit simulator is allowed to speculatively perform high-speed continuous execution. Only when an actual input comes in, a speculative input and the actual input are compared with each other. Thereafter, in response to inconsistency between the inputs, the physical unit simulator is returned to a point closest to the point of the actual input and is allowed to execute a variable step module to reach the point of the actual input. Upon arrival at the point of the actual input, the simulator is shifted back to the high-speed continuous execution from there. Thus, a processing speed of the simulator can be significantly improved. | 12-10-2009 |
| 20100106949 | SOURCE CODE PROCESSING METHOD, SYSTEM AND PROGRAM - A method, system, and computer readable article of manufacture to enable parallel execution of a divided source code in a multiprocessor system. The method includes the steps of: inputting an original source code by an input device into the computing apparatus; finding a critical path in the original source code by a critical path cut module; cutting the critical path in the original source code into a plurality of process block groups by the critical path cut module; and dividing the plurality of process block groups among a plurality of processors in the multiprocessor system by a CPU assignment code generation module to produce the divided source code. The system includes an input device; a critical path cut module; and a CPU assignment code generation unit to produce the divided source code. The computer readable article of manufacture includes instructions to implement the method. | 04-29-2010 |
| 20100305926 | SIMULATION SYSTEM, METHOD, AND PROGRAM - A system, method and program to improve the processing speed of a simulation system. A processing system finds an entry point so that functional blocks cover a broad range. The processing system places code of a look-ahead dispatcher for assigning processing. The look-ahead dispatcher monitors an input state at the entry point to determine whether the input state is a stable state. If the input state is stable, the look-ahead dispatcher calls an adaptive execution module at some frequency or otherwise calls an idle execution module. The adaptive execution module performs processing on multiple timestamps at once. When a discrete system receives an input event, the look-ahead dispatcher calls a recovery execution module. Based on the input event on that occasion, the timestamp, and a value stored in a state vector, the recovery execution module calculates a state for which recovery is performed. | 12-02-2010 |
| 20110015916 | SIMULATION METHOD, SYSTEM AND PROGRAM - A simulation system having multiple peripherals that communicate with each other. The system includes a weighted graph with weights set as communication times. The peripherals are represented as nodes and connection paths are represented as edges. Among the communication times in the loop, the minimum time is set as first synchronization timing. Timing with an acceptable delay added is set as second synchronization timing. Timing set by a user to be longer than the first and second timings is set as third synchronization timing. The third synchronization timing is used in a portion where the timing is usable, thus synchronizing the peripherals at the longest possible synchronization timing. | 01-20-2011 |
| 20110060852 | COMPUTER SYSTEM AND DATA TRANSFER METHOD THEREIN - A DMA transfer technique which can be adapted to “hardware in the loop simulation” (HILS) and which requires less overhead. In a computer system having a data transfer device, a continuous DMA mechanism successively and repeatedly outputs a data transfer request in response to an enable process. A simulation system for HILS places data as a result of the simulation in a predetermined area in a memory and transfers the data from the memory to the continuous DMA mechanism together with generation ID data. The continuous DMA mechanism stores the transferred generation ID as a received ID, and receives the transferred data in response to the event that the transferred generation ID differs from the received ID being stored. The continuous DMA mechanism successively repeats the data transfer request until it is disabled. | 03-10-2011 |
| 20110131554 | APPLICATION GENERATION SYSTEM, METHOD, AND PROGRAM PRODUCT - A method, system and computer program product for optimizing performance of an application running on a hybrid system. The method includes the steps of: selecting a first user defined operator from a library component within the application; determining at least one available hardware resource; generating at least one execution pattern for the first user defined operator based on the available hardware resource; compiling the execution pattern; measuring the execution speed of the execution pattern on the available hardware resource; and storing the execution speed and the execution pattern in an optimization table; where at least one of the steps is carried out using a computer device so that performance of said application is optimized on the hybrid system. | 06-02-2011 |
| 20110225225 | METHOD, PROGRAM, AND SYSTEM FOR SOLVING ORDINARY DIFFERENTIAL EQUATION - Each ordinary differential equation of simultaneous ordinary differential equations is solved with an embedded Runge-Kutta method. A difference Δ between an N-th order approximation and an (N+1)th order approximation is computed, and it is determined whether the difference is smaller than a predetermined threshold Δ | 09-15-2011 |
| 20120029893 | SIMULATION METHOD, SYSTEM AND ARTICLE OF MANUFACTURE - A simulation system, method, and article of manufacture. A simulation system has a discrete and a continuous portion. The discrete portion further has a peripheral emulator in communication with the continuous portion of the simulation system. A portion of a peripheral emulator is separated and is caused to operate in a thread of a continuous system. The continuous system and the peripheral are in loose synchronization and therefore sparsely communicate with each other. The configuration significantly reduces the frequency of inter-thread communications between the continuous system and the discrete system that are performed in response to a continuous clock in a simulation system including the continuous system and the discrete system, thereby reducing communication cost. Accordingly, the operation speed of the simulation system can be increased. | 02-02-2012 |
| 20120110294 | METHOD OF MEMORY MANAGEMENT FOR SERVER-SIDE SCRIPTING LANGUAGE RUNTIME SYSTEM - A method of memory management includes allocating a portion of a memory as a memory heap including a plurality of segments, each segment having a segment size; performing one or more memory allocations for objects in the memory heap; creating a free list array and class-size array in a metadata section of the memory heap, the class-size array being created such that each element of the size-class array is related a particular one of the plurality of segments and the free list array being created such that each element of the free list array is related to a different size class; and initializing the heap when it is determined that the heap may be destroyed, initializing including clearing the free list array. | 05-03-2012 |
| 20120204158 | CONVERTER, SERVER SYSTEM, CONVERSION METHOD AND PROGRAM - A converter for converting an application program that is executed for every job request into a batch processing program for collectively processing a plurality of job requests. The converter includes: a code identifier for identifying a portion of the application program that includes a service request to another server, and a portion that does not include a service request; an integration unit for converting the service request into a collective service request that collectively issues a plurality of service requests corresponding to the plurality of job requests; a multiplexing unit for converting the processing code in the application program into a multiplexed code for executing multiple processings corresponding to the plurality of job requests; and an output unit for outputting, as the batch processing program, the application program that the integration unit and the multiplexing unit have processed. | 08-09-2012 |
| 20120297398 | Reduced data transfer during processor context switching - Data transfer during processor context switching is reduced, particularly in relation to a time-sharing microtasking programming model. Prior to switching context of a processor having local memory from a first to a second process, a portion of the local memory that does not require transfer to system memory for proper saving of data associated with the first process is determined. The context of the processor is then switched from the first to the second process, including transferring all of the local memory as the data associated with the first process, to system memory—except for the portion of the local memory that has been determined as not requiring saving to the system memory for proper saving of the data associated with the first process. Therefore, switching the context from the first to the second process results in a reduction of data transferred from the local memory to the system memory. | 11-22-2012 |
| 20130139131 | SOURCE CODE PROCESSING METHOD, SYSTEM AND PROGRAM - A method, system, and computer readable article of manufacture to enable parallel execution of a divided source code in a multiprocessor system. The method includes the steps of: inputting an original source code by an input device into the computing apparatus; finding a critical path in the original source code by a critical path cut module; cutting the critical path in the original source code into a plurality of process block groups by the critical path cut module; and dividing the plurality of process block groups among a plurality of processors in the multiprocessor system by a CPU assignment code generation module to produce the divided source code. The system includes an input device; a critical path cut module; and a CPU assignment code generation unit to produce the divided source code. The computer readable article of manufacture includes instructions to implement the method. | 05-30-2013 |
