Patent application number | Description | Published |
20090001180 | THERMOSTAT WITH UTILITY MESSAGING - The present disclosure pertains generally to thermostats that are adapted to assist utilities in communicating with its customers. In particular, the present disclosure relates to a thermostat having a display, a controller and a receiver that is coupled to the controller. The receiver is adapted to receive messages from a utility, and the controller is adapted to display one or more related display messages on the display. | 01-01-2009 |
20090001181 | THERMOSTAT WITH USAGE HISTORY - The present disclosure pertains to thermostats that assist users in monitoring and/or controlling their utility consumption habits and patterns. In particular, the present disclosure relates to a thermostat that includes a housing and a controller located within the housing. The controller may be adapted to implement a control algorithm that permits the controller to operate one or more components of an HVAC system. The thermostat may include a display and a receiver that is configured to receive messages from a utility. In some cases, the controller may provide, on the display, an indication of a measure of utility usage during a first time period (e.g. during a current month) and an indication of a measure of utility usage during a second time period (e.g. during the same month one year ago) that may be after the first time period. | 01-01-2009 |
20090001182 | THERMOSTAT WITH FIXED SEGMENT DISPLAY HAVING BOTH FIXED SEGMENT ICONS AND A VARIABLE TEXT DISPLAY CAPACITY - The disclosure pertains to thermostats having an improved interface. In some cases, the present disclosure relates to thermostats that can display not only menu items, temperature set points and the like, but also has an ability to display variable textual information that is not predefined at the time of manufacture of the display. The thermostat may include an LCD display that is viewable from outside of the thermostat housing and that includes a first region and a second region. The first display region may include an array of fixed segment pixels that are arranged into a plurality of rows and a plurality of columns for displaying text in a dot matrix format. In some cases, the first region may be adapted to display messages, including scrolling messages. The second region may include a plurality of fixed segment graphical icons, which may be more precisely and more clearly displayed than if displayed using the array of fixed segment pixels of the first region. | 01-01-2009 |
20110199209 | THERMOSTAT WITH UTILITY MESSAGING - The present disclosure pertains generally to thermostats that are adapted to assist utilities in communicating with its customers. In particular, the present disclosure relates to a thermostat having a display, a controller and a receiver that is coupled to the controller. The receiver is adapted to receive messages from a utility, and the controller is adapted to display one or more related display messages on the display. | 08-18-2011 |
20130340993 | THERMOSTAT WITH UTILITY MESSAGING - The present disclosure pertains generally to thermostats that are adapted to assist utilities in communicating with its customers. In particular, the present disclosure relates to a thermostat having a display, a controller and a receiver that is coupled to the controller. The receiver is adapted to receive messages from a utility, and the controller is adapted to display one or more related display messages on the display. | 12-26-2013 |
Patent application number | Description | Published |
20130339244 | METHODS AND SYSTEMS FOR CHECK CASHING RISK ANALYSIS - Methods, systems, and computer-readable media are disclosed for generating a score for a check cashing transaction. A method includes receiving from a cashing station, having cashing station data, a transaction request including check data and identity data associated with a user, and determining whether the transaction request represents a first transaction request from the user at that cashing station. If so, an enrollment validation process and identification authentication process are performed; if not, a repeat validation process and check casher identification process are performed. The method includes determining whether there is a match between at least one of check data or identity data and data in a negative file or a knowledge file. The method includes calculating a score for the cashing transaction based at least in part on the check data, cashing station data, identity data, or checks of previously received transaction requests, determining whether the score is above a threshold, and approving the transaction based on the determination. | 12-19-2013 |
20140156568 | SELF LEARNING ADAPTIVE MODELING SYSTEM - Self-learning and adaptive modeling is employed with respect to predictive analytics. A hierarchical model structure can be employed comprising a set of predictive models automatically built from accumulated data and distributed across multiple levels. For a given input type, a set of candidate models can be identified across varying levels of granularity, and a best model selected based on a comparison of performance metrics of the models. The best model can then be activated for use in making predictions. Of course, the best model can change based on most recent training performance results, since as more data becomes available more specific models can be developed. | 06-05-2014 |
20150262184 | TWO STAGE RISK MODEL BUILDING AND EVALUATION - A two stage model in which the first stage of the model applies a different weighting schema to different types of transactions in a transaction-based system is described. The first stage of the model focuses on capturing currently known patterns that indicate bad transactions. The second stage of the model focuses on rejecting transactions that are approved by the current model, with the objective of maximizing a measurable goal. Business knowledge is used to lower the cost of finding the optimal solution of the model by estimating parameters provided to the first and second stages of the model. Evaluation of the model accounts for retry transactions and for churn. Parameters associated with the model that maximizes the goal can be selected for a future model. | 09-17-2015 |
Patent application number | Description | Published |
20140264777 | Nanocrystalline Diamond Three-Dimensional Films in Patterned Semiconductor Substrates - An array of through-silicon vias (TSVs) are formed in a silicone substrate. The vias can be tapered such that the diameter of the via at the surface of the substrate is larger than the diameter of the via at its bottom, with the diameter varying continuously along its depth. After the via is formed, it is seeded with a thin layer of nanocrystalline diamond (NCD) particles, and a NCD film is grown on the bottom and along the sidewalls of the via. The presence of the diamond-filled vias provides improved thermal management to semiconductor devices formed on the silicon substrate. | 09-18-2014 |
20140335666 | Growth of High-Performance III-Nitride Transistor Passivation Layer for GaN Electronics - Methods for forming a high-quality III-nitride passivation layer on an AlGaN/GaN HEMT. A III-nitride passivation layer is formed on the surface of an AlGaN/GaN HEMT by means of atomic layer epitaxy (ALE), either before or after deposition of a gate metal electrode on the AlGaN barrier layer. Depending on the gate metal and/or the passivation material used, the III-nitride passivation layer can be formed by ALE at temperatures between about 300° C. and about 850° C. In a specific embodiment, the III-nitride passivation layer can be an AlN layer formed by ALE at about 550° C. after deposition of a Schottky metal gate electrode. The III-nitride passivation layer can be grown so as to conformally cover the entire device, providing a hermetic seal that protects the against environmental conditions. | 11-13-2014 |
20140367824 | Graphene on Semiconductor Detector - Ultraviolet or Extreme Ultraviolet and/or visible detector apparatus and fabrication processes are presented, in which the detector includes a thin graphene electrode structure disposed over a semiconductor surface to provide establish a potential in the semiconductor material surface and to collect photogenerated carriers, with a first contact providing a top side or bottom side connection for the semiconductor structure and a second contact for connection to the graphene layer. | 12-18-2014 |
20150060947 | Transistor with Diamond Gate - A field effect transistor having a diamond gate electrode and a process for forming the same. In some embodiments, the device is an AlGaN/GaN high-electron-mobility transistor (HEMT). The diamond gate electrode is formed so that it directly contacts the barrier layer. In some embodiments, the diamond gate electrode is formed from boron-doped nanocrystalline diamond (NCD), while in other embodiments, the diamond gate electrode is formed from single crystal diamond. | 03-05-2015 |
20150221760 | Inverted III-Nitride P-Channel Field Effect Transistor with Hole Carriers in the Channel - An inverted P-channel III-nitride field effect transistor with hole carriers in the channel comprising a gallium-polar III-Nitride first material, a barrier material layer, a two-dimensional hole gas in the barrier layer, and wherein the gallium-polar material comprises one or more III-Nitride epitaxial material layers grown such that when GaN is epitaxially grown the top surface of the epitaxial layer is gallium-polar. A method of making an inverted P-channel III-nitride field effect transistor with hole carriers in the channel comprising selecting a face or offcut orientation of a substrate so that the gallium-polar (0001) face is the dominant face, growing a nucleation layer, growing a gallium-polar epitaxial layer, doping the epitaxial layer, growing a barrier layer, etching the GaN, forming contacts, performing device isolation, defining a gate opening, depositing and defining gate metal, making a contact window, depositing and defining a thick metal. | 08-06-2015 |
20150348866 | Nanocrystalline Diamond Three-Dimensional Films in Patterned Semiconductor Substrates - An array of through-silicon vias (TSVs) are formed in a silicone substrate. The vias can be tapered such that the diameter of the via at the surface of the substrate is larger than the diameter of the via at its bottom, with the diameter varying continuously along its depth. After the via is formed, it is seeded with a thin layer of nanocrystalline diamond (NCD) particles, and a NCD film is grown on the bottom and along the sidewalls of the via. The presence of the diamond-filled vias provides improved thermal management to semiconductor devices formed on the silicon substrate. | 12-03-2015 |
Patent application number | Description | Published |
20090090918 | TRANSPARENT NANOCRYSTALLINE DIAMOND CONTACTS TO WIDE BANDGAP SEMICONDUCTOR DEVICES - A heterojunction between thin films of NCD and 4H—SiC was developed. Undoped and B-doped NCDs were deposited on both n− and p− SiC epilayers. I-V measurements on p+ NCD/n− SiC indicated Schottky rectifying behavior with a turn-on voltage of around 0.2 V. The current increased over eight orders of magnitude with an ideality factor of 1.17 at 30° C. Ideal energy-band diagrams suggested a possible conduction mechanism for electron transport from the SiC conduction band to either the valence band or acceptor level of the NCD film. | 04-09-2009 |
20090273390 | METHOD OF MEDIATING FORWARD VOLTAGE DRIFT IN A SIC DEVICE - A method of reversing Shockley stacking fault expansion includes providing a bipolar or a unipolar SiC device exhibiting forward voltage drift caused by Shockley stacking fault nucleation and expansion. The SiC device is heated to a temperature above 150° C. A current is passed via forward bias operation through the SiC device sufficient to induce at least a partial recovery of the forward bias drift. | 11-05-2009 |
20100055882 | Junction Termination Extension with Controllable Doping Profile and Controllable Width for High-Voltage Electronic Devices - Methods for producing a junction termination extension surrounding the edge of a cathode or anode junction in a semiconductor substrate, where the junction termination extension has a controlled arbitrary lateral doping profile and a controlled arbitrary lateral width, are provided. A photosensitive material is illuminated through a photomask having a pattern of opaque and clear spaces therein, the photomask being separated from the photosensitive material so that the light diffuses before striking the photosensitive material. After processing, the photosensitive material so exposed produces a laterally tapered implant mask. Dopants are introduced into the semiconductor material and follow a shape of the laterally tapered implant mask to create a controlled arbitrary lateral doping profile and a controlled lateral width in the junction termination extension in the semiconductor. | 03-04-2010 |
20100213380 | Neutron Detector with Gamma Ray Isolation - A silicon-on-insulator (SOI) neutron detector comprising a silicon-on-insulator structure, wherein the silicon-on-insulator structure consists of an active semiconductor layer, a buried layer, and a handle substrate, a lateral carrier transport and collection detector structure within the active semiconductor layer of the silicon-on-insulator structure, and a neutron to high energy particle converter layer on the active semiconductor layer. | 08-26-2010 |
20100327322 | Transistor with Enhanced Channel Charge Inducing Material Layer and Threshold Voltage Control - High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region. | 12-30-2010 |
20110048625 | METHOD FOR THE REDUCTION OF GRAPHENE FILM THICKNESS AND THE REMOVAL AND TRANSFER OF EPITAXIAL GRAPHENE FILMS FROM SiC SUBSTRATES - A method for reducing graphene film thickness on a donor substrate and transferring graphene films from a donor substrate to a handle substrate includes applying a bonding material to the graphene on the donor substrate, releasing the bonding material from the donor substrate thereby leaving graphene on the bonding material, applying the bonding material with graphene onto the handle substrate, and releasing the bonding material from the handle substrate thereby leaving the graphene on the handle substrate. The donor substrate may comprise SiC, metal foil or other graphene growth substrate, and the handle substrate may comprise a semiconductor or insulator crystal, semiconductor device, epitaxial layer, flexible substrate, metal film, or organic device. | 03-03-2011 |
20110127527 | Neutron Detector with Gamma Ray Isolation - A silicon-on-insulator (SOI) neutron detector comprising a silicon-on-insulator structure, wherein the silicon-on-insulator structure consists of an active semiconductor layer, a buried layer, and a handle substrate, a lateral carrier transport and collection detector structure within the active semiconductor layer of the silicon-on-insulator structure, and a neutron to high energy particle converter layer on the active semiconductor layer. | 06-02-2011 |
20130082241 | Graphene on Semiconductor Detector - Ultraviolet or Extreme Ultraviolet and/or visible detector apparatus and fabrication processes are presented, in which the detector includes a thin graphene electrode structure disposed over a semiconductor surface to provide establish a potential in the semiconductor material surface and to collect photogenerated carriers, with a first contact providing a top side or bottom side connection for the semiconductor structure and a second contact for connection to the graphene layer. | 04-04-2013 |
20130161641 | TRANSISTOR WITH ENHANCED CHANNEL CHARGE INDUCING MATERIAL LAYER AND THRESHOLD VOLTAGE CONTROL - High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region. | 06-27-2013 |
20130240905 | Silicon Carbide Rectifier - Silicon carbide PiN diodes are presented with reduced temperature coefficient crossover points by limited p type contact area to limit hole injection in the n type drift layer in order to provide a lower current at which the diode shifts from negative temperature coefficient to a positive temperature coefficient of forward voltage for mitigating thermal runaway. | 09-19-2013 |
20140110722 | Semiconductor Structure or Device Integrated with Diamond - Semiconductor devices that include a semiconductor structure integrated with one or more diamond material layers. A first diamond material layer is formed on a bottom surface and optionally, the side surfaces of the semiconductor structure. In some embodiments, at least a portion of the semiconductor structure is embedded in the diamond. An electrical device can be formed on a top surface of the semiconductor structure. A second diamond material layer can be formed on the top surface of the semiconductor structure. The semiconductor structure can include a III-nitride material such as GaN, which can be embedded within a the first diamond material layer or encased by the first and/or second diamond material layer. | 04-24-2014 |
20140141580 | TRANSISTOR WITH ENHANCED CHANNEL CHARGE INDUCING MATERIAL LAYER AND THRESHOLD VOLTAGE CONTROL - High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region. | 05-22-2014 |
20140264379 | III-Nitride P-Channel Field Effect Transistor with Hole Carriers in the Channel - A non-inverted P-channel III-nitride field effect transistor with hole carriers in the channel comprising a nitrogen-polar III-Nitride first material, a barrier material layer, a two-dimensional hole gas in the barrier layer, and wherein the nitrogen-polar III-Nitride material comprises one or more III-Nitride epitaxial material layers grown in such a manner that when GaN is epitaxially grown the top surface of the epitaxial layer is nitrogen-polar. A method of making a P-channel III-nitride field effect transistor with hole carriers in the channel comprising selecting a face or offcut orientation of a substrate so that the nitrogen-polar (001) face is the dominant face, growing a nucleation layer, growing a GaN epitaxial layer, doping the epitaxial layer, growing a barrier layer, etching the GaN, forming contacts, performing device isolation, defining a gate opening, depositing and defining gate metal, making a contact window, depositing and defining a thick metal. | 09-18-2014 |
20150056763 | SELECTIVE DEPOSITION OF DIAMOND IN THERMAL VIAS - A method for fabricating a semiconductor device, such as a GaN high electron mobility transistor (HEMT) device, including etching a thermal via into a back-side of a semiconductor substrate and depositing a diamond nucleation seed layer across the back-side of the substrate. The method further includes coating the diamond nucleation with a mask layer and removing mask material outside of the thermal via on the planar portions of the back-side of the substrate. The method includes removing portions of the diamond nucleation layer on the planar portions and then removing the remaining portion of the mask material in the thermal via. The method then includes depositing a bulk diamond layer within the thermal via on the remaining portion of the diamond nucleation layer so that diamond only grows in the thermal via and not on the planar portions of the substrate. | 02-26-2015 |
20150221727 | Inverted P-Channel III-Nitride Field Effect Transistor with Hole Carriers in the Channel - An inverted P-channel III-nitride field effect transistor with hole carriers in the channel comprising a gallium-polar III-Nitride grown epitaxially on a substrate, a barrier, a two-dimensional hole gas in the barrier layer material at the heterointerface of the first material, and wherein the gallium-polar III-Nitride material comprises III-Nitride epitaxial material layers grown in such a manner that when GaN is epitaxially grown the top surface of the epitaxial layer is gallium-polar. A method of making a P-channel III-nitride field effect transistor with hole carriers in the channel comprising selecting a face of a substrate so that the gallium-polar (0001) face is the dominant face for growth of III-Nitride epitaxial layer growth material, growing a GaN epitaxial layer, doping, growing a barrier, etching, forming a contact, performing device isolation, defining a gate opening, defining gate metal, making a contact window, and depositing and defining a thick metal. | 08-06-2015 |
Patent application number | Description | Published |
20130159024 | Real-Time Insurance Estimate Based on Non-Personal Identifying Information - Methods and systems for providing estimated insurance quotes/premiums are described herein. After analyzing rate factors, a subset of rate factors are selected that yield a fairly accurate estimated insurance premium from a minimum amount of information easily obtainable from a user. The user inputs a value from a predetermined set of allowable inputs (value input filter). After receiving and analyzing the user inputs, the system generates one or more estimates and displays the one or more estimates to the user, e.g., via a web page. When multiple estimates are provided, the multiple estimates may differ based on the level of coverage, add-on features, or both. Readily known non-personal identifying information is preferably requested and used, thereby alleviating privacy concerns while still being able to provide an estimate to the user very quickly, e.g., under 30 seconds, once all the requested information is obtained. | 06-20-2013 |
20130246101 | Real-Time Insurance Estimate Based on Non-Personal Identifying Information - Methods and systems for providing estimated insurance quotes/premiums are described herein. After analyzing rate factors, a subset of rate factors are selected that yield a fairly accurate estimated insurance premium from a minimum amount of information easily obtainable from a user. The user inputs a value from a predetermined set of allowable inputs (value input filter). After receiving and analyzing the user inputs, the system generates one or more estimates and displays the one or more estimates to the user, e.g., via a web page. When multiple estimates are provided, the multiple estimates may differ based on the level of coverage, add-on features, or both. Readily known non-personal identifying information is preferably requested and used, thereby alleviating privacy concerns while still being able to provide an estimate to the user very quickly, e.g., under 30 seconds, once all the requested information is obtained. | 09-19-2013 |