Patent application number | Description | Published |
20140159893 | BRACELET TRACKING SYSTEM - The present invention is a bracelet tracking system that includes a caregiver monitoring bracelet worn by one or more caregivers, the caregiver monitoring bracelet includes a base caregiver bracelet, a digital display, an increasing display button, a decreasing display button, a first call alarm, an automatic reset button, one or more first indicator lights and a GPS receiver. The system also includes a caretaker tracking device worn by one or more caretakers, the caretaker device includes a base caretaker ring, a second call alarm, one or more second indicator lights and a GPS transmitter and a communications technology that puts the caregiver monitoring bracelet in communication with the one or more caregiver tracking devices. | 06-12-2014 |
20150035672 | PROXIMITY TRACKING SYSTEM - A proximity tracking system for selectively alerting a custodian when a child becomes located outside a predetermined proximity of the custodian comprises a battery powered custodian component, defined in one embodiment as a modified bracelet with a set of command features, for custodian to wear, as well as a corresponding battery powered child component that is attachable to the person or clothing of a child to be monitored. The custodian component and child component are configured to communicate wirelessly with one another to determine their relative proximity. The custodian component allows a user to select one of a pre-determined distance at which its alerting features are activated. Accordingly, in operation, when a child wearing the child component reaches the selected predetermined distance from the custodian component, the child component will begin to flash lights integrated therein and emit an audible alarm in order to alert the custodian. | 02-05-2015 |
Patent application number | Description | Published |
20100223085 | MODULARIZATION OF DATA CENTER FUNCTIONS - In one example, a data center may be built in modular components that may be pre-manufactured and separately deployable. Each modular component may provide functionality such as server capacity, cooling capacity, fire protection, resistance to electrical failure. Some components may be added to the data center by connecting them to the center's utility spine, and others may be added by connecting them to other components. The spine itself may be a modular component, so that spine capacity can be expanded or contracted by adding or removing spine modules. The various components may implement functions that are part of standards for various levels of reliability for data centers. Thus, the reliability level that a data center meets may be increased or decreased to fit the circumstances by adding or removing components. | 09-02-2010 |
20120055012 | MODULARIZATION OF DATA CENTER FUNCTIONS - In one example, a data center may be built in modular components that may be pre-manufactured and separately deployable. Each modular component may provide functionality such as server capacity, cooling capacity, fire protection, resistance to electrical failure. Some components may be added to the data center by connecting them to the center's utility spine, and others may be added by connecting them to other components. The spine itself may be a modular component, so that spine capacity can be expanded or contracted by adding or removing spine modules. The various components may implement functions that are part of standards for various levels of reliability for data centers. Thus, the reliability level that a data center meets may be increased or decreased to fit the circumstances by adding or removing components. | 03-08-2012 |
Patent application number | Description | Published |
20110223734 | METHODS OF FORMING AN ARRAY OF MEMORY CELLS, METHODS OF FORMING A PLURALITY OF FIELD EFFECT TRANSISTORS, METHODS OF FORMING SOURCE/DRAIN REGIONS AND ISOLATION TRENCHES, AND METHODS OF FORMING A SERIES OF SPACED TRENCHES INTO A SUBSTRATE - A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed. | 09-15-2011 |
20120021573 | Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate - A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed. | 01-26-2012 |
20130005115 | Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate - A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed. | 01-03-2013 |
20130210213 | METHOD FOR FORMING SELF-ALIGNED OVERLAY MARK - A method for forming a self-aligned overlay mark is disclosed. First, a first region, a second region and a main feature which is disposed between the first region and the second region all disposed on the substrate are provided. The first region defines a first edge and the second region defines a second edge. Second, a cut mask layer is formed to respectively cover the first region and the second region to expose the main feature. Next, the cut mask layer is determined if it is self-aligned with the second edge or the first edge, and creates a self-aligned overlay mark. Later, a main feature etching step is carried out to transfer the main feature into the substrate when the cut mask layer is determined to be self-aligned with the second edge or the first edge. | 08-15-2013 |
20140054756 | ANTI SPACER PROCESS AND SEMICONDUCTOR STRUCTURE GENERATED BY THE ANTI SPACER PROCESS - An anti spacer process, which comprises: (a) providing a resist layer including a non-uniform shape; (b) coating a target layer above the resist layer; (c) providing anti spacer trenches (spa) between the target layer and the resist layer; and (d) connecting at least part of the anti spacer trenches (spa) together to isolate a first part of the target layer and a second part of the target layer. | 02-27-2014 |
20140264893 | PITCH-HALVING INTEGRATED CIRCUIT PROCESS AND INTEGRATED CIRCUIT STRUCTURE MADE THEREBY - A pitch-halving IC process is described. Parallel base line patterns are formed over a substrate, each being connected with a hammerhead pattern at a first or second side of the base line patterns, wherein the hammerhead patterns are arranged at the first side and the second side alternately, and the hammerhead patterns at the first or second side are arranged in a staggered manner. The above patterns are trimmed. A spacer is formed on the sidewalls of each base line pattern and the corresponding hammerhead pattern, including a pair of derivative line patterns, a loop pattern around the hammerhead pattern, and a turning pattern at the other end of the base line pattern. The base line patterns and the hammerhead patterns are removed. A portion of each loop pattern and at least a portion of each turning pattern are removed to disconnect each pair of derivative line patterns. | 09-18-2014 |
Patent application number | Description | Published |
20120205736 | Memory Arrays and Methods of Forming Electrical Contacts - Some embodiments include methods of forming electrical contacts. A row of semiconductor material projections may be formed, with the semiconductor material projections containing repeating components of an array, and with a terminal semiconductor projection of the row comprising a contact location. An electrically conductive line may be along said row, with the line wrapping around an end of said terminal semiconductor projection and bifurcating into two branches that are along opposing sides of the semiconductor material projections. Some of the semiconductor material of the terminal semiconductor projection may be replaced with dielectric material, and then an opening may be extended into the dielectric material. An electrical contact may be formed within the opening and directly against at least one of the branches. Some embodiments include memory arrays. | 08-16-2012 |
20130228874 | Memory Arrays and Methods of Forming Electrical Contacts - Some embodiments include methods of forming electrical contacts. A row of semiconductor material projections may be formed, with the semiconductor material projections containing repeating components of an array, and with a terminal semiconductor projection of the row comprising a contact location. An electrically conductive line may be along said row, with the line wrapping around an end of said terminal semiconductor projection and bifurcating into two branches that are along opposing sides of the semiconductor material projections. Some of the semiconductor material of the terminal semiconductor projection may be replaced with dielectric material, and then an opening may be extended into the dielectric material. An electrical contact may be formed within the opening and directly against at least one of the branches. Some embodiments include memory arrays. | 09-05-2013 |
20140045317 | Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate - A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed. | 02-13-2014 |
20140301126 | Memory Arrays and Methods of Forming Electrical Contacts - Some embodiments include methods of forming electrical contacts. A row of semiconductor material projections may be formed, with the semiconductor material projections containing repeating components of an array, and with a terminal semiconductor projection of the row comprising a contact location. An electrically conductive line may be along said row, with the line wrapping around an end of said terminal semiconductor projection and bifurcating into two branches that are along opposing sides of the semiconductor material projections. Some of the semiconductor material of the terminal semiconductor projection may be replaced with dielectric material, and then an opening may be extended into the dielectric material. An electrical contact may be formed within the opening and directly against at least one of the branches. Some embodiments include memory arrays. | 10-09-2014 |
Patent application number | Description | Published |
20140159893 | BRACELET TRACKING SYSTEM - The present invention is a bracelet tracking system that includes a caregiver monitoring bracelet worn by one or more caregivers, the caregiver monitoring bracelet includes a base caregiver bracelet, a digital display, an increasing display button, a decreasing display button, a first call alarm, an automatic reset button, one or more first indicator lights and a GPS receiver. The system also includes a caretaker tracking device worn by one or more caretakers, the caretaker device includes a base caretaker ring, a second call alarm, one or more second indicator lights and a GPS transmitter and a communications technology that puts the caregiver monitoring bracelet in communication with the one or more caregiver tracking devices. | 06-12-2014 |
20150035672 | PROXIMITY TRACKING SYSTEM - A proximity tracking system for selectively alerting a custodian when a child becomes located outside a predetermined proximity of the custodian comprises a battery powered custodian component, defined in one embodiment as a modified bracelet with a set of command features, for custodian to wear, as well as a corresponding battery powered child component that is attachable to the person or clothing of a child to be monitored. The custodian component and child component are configured to communicate wirelessly with one another to determine their relative proximity. The custodian component allows a user to select one of a pre-determined distance at which its alerting features are activated. Accordingly, in operation, when a child wearing the child component reaches the selected predetermined distance from the custodian component, the child component will begin to flash lights integrated therein and emit an audible alarm in order to alert the custodian. | 02-05-2015 |