Hyunkook
Hyunkook Kim, Seoul KR
Patent application number | Description | Published |
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20150241729 | MOBILE TERMINAL - Provided is a mobile terminal including: an LCD module arranged under a window; an LCD circuit board arranged to one side of the LCD module to electrically control the LCD module; a printed circuit board formed apart from the LCD circuit board, positioned under the LCD module and the LCD circuit board, and electrically connected to the LCD circuit board; and a connector electrically connecting the LCD circuit board and the printed circuit board, in which multiple conductive pads arranged at a predetermined distance are formed on the LCD circuit board and the printed circuit board, respectively, conductive regions and non-conductive regions are formed on the connector alternately, and the conductive regions are connected to the conductive pads formed on the LCD circuit board and the printed circuit board, respectively. | 08-27-2015 |
Hyunkook Lee, Seoul KR
Patent application number | Description | Published |
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20120002024 | IMAGE DISPLAY APPARATUS AND METHOD FOR OPERATING THE SAME - An image display apparatus and a method for operating the same are disclosed. The method for operating an image display apparatus includes receiving a 3-dimensional (3D) image, detecting the depth of the 3D image, performing 3D processing on an audio signal received in synchronization with the 3D image in correspondence with the detected depth, and outputting the audio signal subjected to 3D processing. Thus, it is possible to output the audio signal in correspondence with the depth of the 3D image during 3D image display. | 01-05-2012 |
Hyunkook Park, Seoul KR
Patent application number | Description | Published |
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20100324850 | Static Noise Margin Estimation - In a particular embodiment, a method is disclosed that estimates a total static noise margin of a bit cell of a memory. The method includes determining a correlation coefficient of a left static noise margin of the bit cell as compared to a right static noise margin of the bit cell and estimating a total static noise margin of the bit cell by evaluating an analytical function based on the correlation coefficient. | 12-23-2010 |
20110235406 | Low-Power 5T SRAM with Improved Stability and Reduced Bitcell Size - A 5 Transistor Static Random Access Memory (5T SRAM) is designed for reduced cell size and immunity to process variation. The 5T SRAM includes a storage element for storing data, wherein the storage element is coupled to a first voltage and a ground voltage. The storage element can include symmetrically sized cross-coupled inverters. A single access transistor controls read and write operations on the storage element. Control logic is configured to generate a value of the first voltage a write operation that is different from the value of the first voltage for a read operation. | 09-29-2011 |
Hyunkook Park, Gyeonggi-Do KR
Patent application number | Description | Published |
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20120113708 | Stable SRAM Bitcell Design Utilizing Independent Gate Finfet - Stable SRAM cells utilizing Independent Gate FinFET architectures provide improvements over conventional SRAM cells in device parameters such as Read Static Noise Margin (RSNM) and Write Noise Margin (WNM). Exemplary SRAM cells comprise a pair of storage nodes, a pair of bit lines, a pair of pull-up devices, a pair of pull-down devices and a pair of pass-gate devices. A first control signal and a second control signal are configured to adjust drive strengths of the pass-gate devices, and a third control signal is configured to adjust drive strengths of the pull-up devices, wherein the first control signal is routed orthogonal to a bit line direction, and the second and third control signals are routed in a direction same as the bit line direction. RSNM and WNM are improved by adjusting drive strengths of the pull-up and pass-gate devices during read and write operations. | 05-10-2012 |