Patent application number | Description | Published |
20100026380 | Reference Generating Apparatus and Sampling Apparatus Thereof - A reference generating apparatus and a sampling apparatus thereof are provided. The coding module is configured to code and decode a first reference signal to retrieve a second reference signal with less power than generating the first reference signal. The second reference signal is identical to the first reference signal in amplitude. | 02-04-2010 |
20100320844 | POWER OFF DELAY CIRCUIT AND METHOD, AND AUDIO SYSTEM WITH POWER OFF DELAY - A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system. | 12-23-2010 |
20100321849 | OVERSTRESS PROTECTION APPARATUS AND METHOD - An overstress protection apparatus includes a switch detector. The switch is arranged in a grounding path of a load system. The detector detects the current, voltage or temperature of the load system to determine a signal for controlling the switch, to thereby protect the load system working in normal conditions. | 12-23-2010 |
20110101954 | REFERENCE SIGNAL GENERATOR AND METHOD FOR PROVIDING A REFERENCE SIGNAL WITH AN ADAPTIVE TEMPERATURE COEFFICIENT - A voltage source provides a first voltage which is independent of temperature variation and variable, and a voltage step-down circuit provides a second voltage to be subtracted from the first voltage to generate a reference signal. The second voltage has a first temperature coefficient, and the reference signal has a second temperature coefficient. By changing the first voltage, the second temperature coefficient changes accordingly. | 05-05-2011 |
20110109290 | FREQUENCY CONTROL CIRCUIT AND METHOD FOR A NON-CONSTANT FREQUENCY VOLTAGE REGULATOR - A non-constant frequency voltage regulator includes a constant-time trigger to generate a pulse width modulation signal, a current generator to provide a first current to set a constant on-time or a constant off-time for the pulse width modulation signal, and a frequency control circuit to detect the pulse width of a phase node voltage, compare the pulse width with the constant on-time or the constant off-time set by the first current to generate a second current, and add the second current to the first current to supply to the constant-time trigger to control the frequency of the pulse width modulation signal. | 05-12-2011 |
20110109291 | FREQUENCY CONTROL CIRCUIT AND METHOD FOR A NON-CONSTANT FREQUENCY VOLTAGE REGULATOR - A non-constant frequency voltage regulator includes a constant-time trigger to trigger a constant on-time or a constant off-time for a pulse width modulation signal, a current generator to provide a first current to determine the constant on-time or the constant off-time, a power output stage operated by the pulse width modulation signal to produce a load current, and a frequency control circuit for loading feed forward by a second current added to the first current to adjust the constant on-time or the constant off-time for frequency compensation to the pulse width modulation signal. | 05-12-2011 |
20110109398 | FIXED-FREQUENCY CONTROL CIRCUIT AND METHOD FOR PULSE WIDTH MODULATION - A fixed-frequency control circuit and method detect the difference between the frequency of a pulse width modulation signal and a target frequency to adjust a current used to determine the on-time or off-time of the pulse width modulation signal, such that the frequency of the pulse width modulation signal is stable at the target frequency. | 05-12-2011 |
20110163785 | SIMPLE INTERLEAVED PHASE SHIFT CLOCK SYNCHRONIZATION FOR MASTER/SLAVE SCHEME - An apparatus for interleaved phase shift clock synchronization includes a master clock generator and at least one slave clock generator. The master clock generator provides a ramp signal or reset signal for each slave clock generator to generate a clock synchronized with the clock of the master clock generator, and the master and slave clock generators have different reference voltages for generating clocks. Therefore, the clocks generated will be synchronized and interleaved phase with each other. | 07-07-2011 |
20110169463 | ADJUSTABLE DRIVER VOLTAGE SOURCE FOR A SWITCHING POWER SUPPLY AND METHOD FOR ADJUSTING DRIVER VOLTAGE IN A SWITCHING POWER SUPPLY - An adjustable driver voltage source for a switching power supply uses a linear regulator to provide a driver voltage, and a modulator to adjust the driver voltage according to the loading change of the switching power supply. The modulator may lower the driver voltage at light load to reduce the switching loss and thereby increase the power efficiency of the switching power supply. | 07-14-2011 |
20110169473 | MIX MODE WIDE RANGE DIVIDER AND METHOD THEREOF - A mix mode wide range divider is provided for dividing a first signal by a second signal to generate an output signal. A third signal is generated depending on the resistance of a first adjustable resistor, and a fourth signal is generated according to the third signal and a target value determined by the second signal, to adjust the resistance of the first adjustable resistor and the resistance of a second adjustable resistor. The resistance of the first adjustable resistor is so adjusted to make the third signal equal to the target value, and the resistance of the second adjustable resistor is so adjusted to maintain a ratio of the resistance of the second adjustable resistor to the resistance of the first adjustable resistor. The output signal is generated depending on the first signal and the resistance of the second adjustable resistor. | 07-14-2011 |
20110169546 | MIX MODE WIDE RANGE MULTIPLIER AND METHOD THEREOF - A mix mode wide range multiplier and method are provided for multiplying a first signal by a second signal to generate an output signal. A reference signal is generated according to a first gain and a reference value, the output signal is generated according to a second gain and the first signal, a target value is generated according to the second signal, the first gain is adjusted to make the reference signal equal to the target value, and the second gain is adjusted to maintain a ratio of the second gain to the first gain. | 07-14-2011 |
20110233716 | CIRCUIT STRUCTURE OF AN ULTRA HIGH VOLTAGE LEVEL SHIFTER - A circuit structure of an ultra high voltage level shifter includes a low voltage substrate having the electronic elements of the ultra high voltage level shifter thereon, an ultra high voltage redistribution layer, and a passivation layer between the substrate and the redistribution layer to prevent dielectric breakdown between the redistribution layer and the substrate. | 09-29-2011 |
20110260765 | PHASE INTERLEAVING CONTROL METHOD FOR A MULTI-CHANNEL REGULATOR SYSTEM - A multi-channel regulator system includes serially connected PWM integrated circuits, each of which determines a PWM signal for a respective channel to operate therewith, and individually controls its operation mode according to whether or not an external clock is detected. Therefore, each channel will not be limited to operate under a constant mode and could become a master channel or a slave channel. Additionally, each of the PWM integrated circuits generates a phase shifted synchronous clock for its next channel during it is enabled, and thus all the channels operate in a synchronous but phase interleaving manner. | 10-27-2011 |
20110260799 | FREQUENCY SETTING CIRCUIT AND METHOD FOR AN INTEGRATED CIRCUIT - A frequency setting circuit and method for an integrated circuit detect the voltage at a pin of the integrated circuit during a frequency setting period, and determine a frequency setting signal according to the detected voltage to set the frequency of a clock provided by an oscillator in the integrated circuit. After setting the frequency, the frequency setting circuit and method store the frequency setting signal and stop detecting the voltage at the pin. Thus the pin can be used for other functions. | 10-27-2011 |
20110261492 | PROTECTION TO AVOID ABNORMAL OPERATION CAUSED BY A SHORTED PARAMETER SETTING PIN OF AN INTEGRATED CIRCUIT - For a system to avoid abnormal operation caused by a shorted parameter setting pin of an integrated circuit, a protection apparatus and method apply a buffered reference voltage to the parameter setting pin to define an internal parameter of the integrated circuit by the buffered reference voltage and an external element connected to the parameter setting pin, and detect the rapid variation of the internal parameter to trigger a shutdown signal or slow down the speed of the variation of the internal parameter reflected to an adjustable signal of the integrated circuit. | 10-27-2011 |
20110267015 | REAL TIME ADJUSTABLE ZERO CURRENT DETECTION FOR A SWITCHING REGULATOR - A feedback loop is used to optimize a zero current threshold for a switching regulator. After the low side power switch of the switching regulator turns off, the switching node state is monitored to adjust the zero current threshold in a real time and thus the low-side power switch is prevented from turning off too early or too late. Thereby the efficiency in green mode is optimized. | 11-03-2011 |
20120008345 | APPARATUS AND METHOD FOR OUTPUT VOLTAGE CALIBRATION OF A PRIMARY FEEDBACK FLYBACK POWER MODULE - An apparatus and method for output voltage calibration of a primary feedback flyback power module extract the difference between the output voltage of the power module and a target value, and according thereto, calibrate a reference voltage which is used in regulation of the output voltage, to thereby calibrate the output voltage to be the target value. | 01-12-2012 |
20120112816 | CIRCUIT AND METHOD FOR IMPLEMENTING POWER GOOD AND CHIP ENABLE CONTROL BY A MULTI-FUNCTIONAL PIN OF AN INTEGRATED CIRCUIT - A first switch is switched to short a multi-functional pin of an integrated circuit to a ground terminal or let a current supplied to the multi-functional pin to flow to a second switch connected to the multi-functional pin. Before the integrated circuit is ready, the second switch is closed circuit and is detected its current to determine a first signal to enable or disable the integrated circuit. After the integrated circuit is ready, the second switch is open circuit, the voltage at the multi-functional pin is detected to determine a second signal to enable or disable the integrated circuit, and when the voltage at the multi-functional pin is higher than a threshold, a power good signal is triggered. | 05-10-2012 |
20120229165 | CONFIGURATION AND METHOD FOR IMPROVING NOISE IMMUNITY OF A FLOATING GATE DRIVER CIRCUIT - A floating gate driver circuit includes a level shifter, a pass element, a bistable circuit and a control logic circuit, to shift the voltage level of a control signal from a lower one to a higher one. The level shifter or the pass element has loads dynamically controlled by the control logic circuit to filter malfunction caused by dv/dt noise induced by a floating node. | 09-13-2012 |
20130063216 | POWER OFF DELAY CIRCUIT AND METHOD, AND AUDIO SYSTEM WITH POWER OFF DELAY - A power off delay circuit includes a switch connected between an external power input terminal and an internal power supply terminal, a capacitor connected to the internal power supply terminal, and a hysteresis comparator to switch the switch according to the voltages of the external power input terminal and the internal power supply terminal. During on-time of the switch, the external power input terminal is connected to the internal power supply terminal and the capacitor can be charged by the external power source. When the switch is off, the capacitor provides electric power for an internal circuit. Application of the power off delay circuit to an audio system may eliminate the turn-off pops of the audio system. | 03-14-2013 |
20130113450 | MIXED MODE COMPENSATION CIRCUIT AND METHOD FOR A POWER CONVERTER - A mixed mode compensation circuit and method for a power converter generate a digital signal according to a reference value and a feedback signal which is related to the output voltage of the power converter, convert the digital signal into a first analog signal, offset the first analog signal with a variable offset value to generate a second analog signal, and filter out high-frequency components of the second analog signal to generate a third analog signal for stable output voltage of the power converter. The mixed mode compensation does not require large capacitors, and thus the circuit can be integrated into an integrated circuit. | 05-09-2013 |
20130162359 | FREQUENCY JITTER CIRCUIT AND METHOD - An oscillator generates a clock signal according to a voltage, a current and a capacitance, and a frequency jitter circuit and method use a random number to modulate the voltage, the current or the capacitance, or a count value to modulate the capacitance, to jitter the frequency of the clock signal. | 06-27-2013 |
20130169370 | FREQUENCY JITTER CIRCUIT AND METHOD - An oscillator generates a clock signal according to a voltage, a current and a capacitance, and a frequency jitter circuit and method use a random number to modulate the voltage, the current or the capacitance, or a count value to modulate the capacitance, to jitter the frequency of the clock signal. | 07-04-2013 |
20130235633 | CONTROL CIRCUIT FOR POWER CONVERTER AND METHOD THEREOF - A control circuit for a power converter has a current source, a sampling circuit, a signal processing circuit, a driving circuit, and a shared pin. The shared pin is used for coupling with a resistor and a switch. The current source, coupled with the shared pin, provides a current through the shared pin to the resistor in a first period. The sampling circuit, coupled with the shared pin, samples signals on the shared pin for generating a first sampling value and a second sampling value. The signal processing circuit, coupled with the sampling circuit, compares the first sampling value and the second sampling value. The driving circuit generates driving signals for conducting the switch. When the difference of the first sampling value and the second sampling value is less than a predetermined value, the signal processing circuit configures the driving circuit to intermittently conduct the switch in a second period. | 09-12-2013 |
20140268924 | CONTROL CIRCUIT FOR FLYBACK POWER CONVERTER AND CALIBRATION METHOD THEREOF - A control circuit of a flyback power converter includes a first reference signal generating circuit for generating a first reference signal; a reference signal adjusting circuit for generating an adjustment signal according to the first reference signal and a test signal corresponding to an output voltage signal of the flyback power converter, and to generate a second reference signal according to the adjustment signal and the first reference signal; an error detection circuit for generating an error signal according to the second reference signal and a feedback signal; and a control signal generating circuit for generating a control signal according to the error signal to control operations of a power switch to thereby adjust the test signal. The feedback signal corresponds to a current flowing through a primary side coil of the power converter or a sensing voltage of an inductive coil of the power converter. | 09-18-2014 |
20140340949 | POWER CONVERTER AND POWER FACTOR CORRECTOR THEREOF - A power converter includes a rectifier and a power factor corrector. The rectifier is to be coupled to an alternating current power source and is configured to output a rectified signal. The power factor corrector includes a correcting circuit and a control circuit. The correcting circuit receives the rectified signal and is configured to generate an output voltage based on the rectified signal and a driving signal. The control circuit is configured to generate a first to-be-compared signal based on the rectified signal, to generate a second to-be-compared signal based on the output voltage, to compare the first and second to-be-compared signals, and to generate the driving signal based on a result of comparison performed thereby. | 11-20-2014 |
20150070951 | MULTIPLIER-DIVIDER CIRCUIT AND AC-TO-DC POWER CONVERTING APPARATUS INCORPORATING THE SAME - An AC-to-DC power converting apparatus includes a power factor correction circuit generating a DC output voltage based on a rectified voltage obtained through rectifying an AC input voltage and on a PWM signal generated based on an adjustment current and a predetermined ramp signal. A multiplier-divider circuit includes: a ramp generating unit generating a ramp signal based on a clock signal and on a first detection voltage associated with the rectified voltage; a control unit generating a control signal based on the clock signal, the ramp signal, and a detection voltage generated based on the DC output voltage; and an output unit generating an adjustment signal based on an input signal associated with the rectified voltage and the control signal. | 03-12-2015 |