Patent application number | Description | Published |
20110272010 | HIGH WORK FUNCTION METAL INTERFACIAL FILMS FOR IMPROVING FILL FACTOR IN SOLAR CELLS - A photovoltaic device and method include a doped transparent electrode, and a light-absorbing semiconductor structure including a first semiconductor layer. An ultra-thin layer of a non-transparent metal is formed between the transparent electrode and the first semiconductor layer to form a reduced barrier contact wherein the ultra-thin layer is light transmissive. When the ultrathin metal forms discrete individual dots, it permits a plasmonic light trapping effect to increase the current at solar cells. | 11-10-2011 |
20120031454 | EFFICIENT NANOSCALE SOLAR CELL AND FABRICATION METHOD - A photovoltaic device and method include a substrate layer having a plurality of structures including peaks and troughs formed therein. A continuous photovoltaic stack is conformally formed over the substrate layer and extends over the peaks and troughs. The photovoltaic stack has a thickness of less than one micron and is configured to transduce incident radiation into current flow. | 02-09-2012 |
20120060905 | NANOWIRES FORMED BY EMPLOYING SOLDER NANODOTS - A photovoltaic device and method include depositing a metal film on a substrate layer. The metal film is annealed to form islands of the metal film on the substrate layer. The substrate layer is etched using the islands as an etch mask to form pillars in the substrate layer. | 03-15-2012 |
20120104390 | Germanium-Containing Release Layer For Transfer of a Silicon Layer to a Substrate - A germanium-containing layer is deposited on a single crystalline bulk silicon substrate in an ambient including a level of oxygen partial pressure sufficient to incorporate 1%-50% of oxygen in atomic concentration. The thickness of the germanium-containing layer is preferably limited to maintain some degree of epitaxial alignment with the underlying silicon substrate. Optionally, a graded germanium-containing layer can be grown on, or replace, the germanium-containing layer. An at least partially crystalline silicon layer is subsequently deposited on the germanium-containing layer. A handle substrate is bonded to the at least partially crystalline silicon layer. The assembly of the bulk silicon substrate, the germanium-containing layer, the at least partially crystalline silicon layer, and the handle substrate is cleaved within the germanium-containing layer to provide a composite substrate including the handle substrate and the at least partially crystalline silicon layer. Any remaining germanium-containing layer on the composite substrate is removed. | 05-03-2012 |
20120156393 | Deposition of Hydrogenated Thin Film - A hydrogenated thin film is formed in a controlled vacuum on a substrate by evaporating one or more solid materials and passing the resulting vapor and a hydrogen-containing gas into a space between two electrodes. One of the electrodes includes openings for allowing the vapor to enter the space. Plasma is generated within the space to cause dissociation of the hydrogen-containing gas and promote a reaction between the material(s) and hydrogen-containing gas. | 06-21-2012 |
20120187505 | Self-aligned III-V MOSFET fabrication with in-situ III-V epitaxy and in-situ metal epitaxy and contact formation - A method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate including source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions. The method includes growing raised source/drain regions on the source/drain regions, the grown raised source/drain regions including III-V semiconductor material, and growing metal contacts on the grown raised source/drain regions. Another method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate including source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions. The method includes growing metal contacts on the source/drain regions. Transistors and computer program products are also disclosed. | 07-26-2012 |
20120187539 | DEVICE AND METHOD FOR BORON DIFFUSION IN SEMICONDUCTORS - A device and method for semiconductor fabrication includes forming a buffer layer on a semiconductor substrate and depositing an amorphous elemental layer on the buffer layer. Elements of the elemental layer are diffused through the buffer layer and into the semiconductor layer. | 07-26-2012 |
20120192913 | MIXED TEMPERATURE DEPOSITION OF THIN FILM SILICON TANDEM CELLS - Fabrication of a tandem photovoltaic device includes forming a bottom cell having an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. A top cell is formed relative to the bottom cell. The top cell has an N-type layer, a P-type layer and a top intrinsic layer therebetween. The top intrinsic layer is formed of an undoped material deposited at a temperature that is different from the bottom intrinsic layer such that band gap energies for the top intrinsic layer and the bottom intrinsic layer are progressively lower for each cell. | 08-02-2012 |
20120193687 | REDUCED S/D CONTACT RESISTANCE OF III-V MOSFET USING LOW TEMPERATURE METAL-INDUCED CRYSTALLIZATION OF n+ Ge - Embodiments of this invention provide a method to fabricate an electrical contact. The method includes providing a substrate of a compound Group III-V semiconductor material having at least one electrically conducting doped region adjacent to a surface of the substrate. The method further includes fabricating the electrical contact to the at least one electrically conducting doped region by depositing a single crystal layer of germanium over the surface of the substrate so as to at least partially overlie the at least one electrically conducting doped region, converting the single crystal layer of germanium into a layer of amorphous germanium by implanting a dopant, forming a metal layer over exposed surfaces of the amorphous germanium layer, and performing a metal-induced crystallization (MIC) process on the amorphous germanium layer having the overlying metal layer to convert the amorphous germanium layer to a crystalline germanium layer and to activate the implanted dopant. The electrical contact can be a source or a drain contact of a transistor. | 08-02-2012 |
20120216862 | Silicon: Hydrogen Photovoltaic Devices, Such As Solar Cells, Having Reduced Light Induced Degradation And Method Of Making Such Devices - A method of producing a photovoltaic device includes providing a stretchable substrate for the photovoltaic device; and stretching the substrate to produce a stretched substrate. The method further includes depositing a structure comprising hydrogenated amorphous silicon onto the stretched substrate; and subjecting the deposited hydrogenated amorphous silicon structure and the stretched substrate to a compressive force to form a compressively strained photovoltaic device. | 08-30-2012 |
20120222730 | TANDEM SOLAR CELL WITH IMPROVED ABSORPTION MATERIAL - A photosensitive device and method includes a top cell having an N-type layer, a P-type layer and a top intrinsic layer therebetween. A bottom cell includes an N-type layer, a P-type layer and a bottom intrinsic layer therebetween. The bottom intrinsic layer includes a Cu—Zn—Sn containing chalcogenide. | 09-06-2012 |
20120285517 | SCHOTTKY BARRIER SOLAR CELLS WITH HIGH AND LOW WORK FUNCTION METAL CONTACTS - A Schottky Barrier solar cell having at least one of a low work function region and a high work function region provided on the front or back surface of a lightly-doped absorber material, which may be produced in a variety of different geometries. The method of producing the Schottky Barrier solar cells allows for short processing times and the use of low temperatures. | 11-15-2012 |
20120285518 | Solar cell with interdigitated back contacts formed from high and low work-function-tuned silicides of the same metal - A solar cell having n-type and p-type interdigitated back contacts (IBCs), which cover the entire back surface of the absorber layer. The spatial separation of the IBCs is in a direction perpendicular to the back surface, thus providing borderless contacts having a zero-footprint separation. As the contacts are on the back, photons incident on the cell's front surface can be absorbed without any shadowing. | 11-15-2012 |
20120285520 | WAFER BONDED SOLAR CELLS AND FABRICATION METHODS - A photovoltaic device and method for fabrication include multijunction cells, each cell having a material grown independently from the other and including different band gap energies. An interface is disposed between the cells and configured to wafer bond the cells wherein the cells are configured to be adjacent without regard to lattice mismatch. | 11-15-2012 |
20120318335 | TANDEM SOLAR CELL WITH IMPROVED TUNNEL JUNCTION - A photovoltaic device and method for fabricating a photovoltaic device include forming a light-absorbing semiconductor structure on a transmissive substrate including a first doped layer and forming an intrinsic layer on the first doped layer, wherein the intrinsic layer includes an amorphous material. The intrinsic layer is treated with a plasma to form seed sites. A first tunnel junction layer is formed on the intrinsic layer by growing microcrystals from the seed sites. | 12-20-2012 |
20120318338 | NANOWIRES FORMED BY EMPLOYING SOLDER NANODOTS - A photovoltaic device and method include depositing a metal film on a substrate layer. The metal film is annealed to form islands of the metal film on the substrate layer. The substrate layer is etched using the islands as an etch mask to form pillars in the substrate layer. | 12-20-2012 |
20120318342 | UNIFORMLY DISTRIBUTED SELF-ASSEMBLED CONE-SHAPED PILLARS FOR HIGH EFFICIENCY SOLAR CELLS - A method for fabricating a photovoltaic device includes applying a diblock copolymer layer on a substrate and removing a first polymer material from the diblock copolymer layer to form a plurality of distributed pores. A pattern forming layer is deposited on a remaining surface of the diblock copolymer layer and in the pores in contact with the substrate. The diblock copolymer layer is lifted off and portions of the pattern forming layer are left in contact with the substrate. The substrate is etched using the pattern forming layer to protect portions of the substrate to form pillars in the substrate such that the pillars provide a radiation absorbing structure in the photovoltaic device. | 12-20-2012 |
20120325305 | OHMIC CONTACT BETWEEN THIN FILM SOLAR CELL AND CARBON-BASED TRANSPARENT ELECTRODE - A photovoltaic device and method include a photovoltaic stack having an N-doped layer, a P-doped layer and an intrinsic layer. A transparent electrode is formed on the photovoltaic stack and includes a carbon based layer and a high work function metal layer. The high work function metal layer is disposed at an interface between the carbon based layer and the P-doped layer such that the high work function metal layer forms a reduced barrier contact and is light transmissive. | 12-27-2012 |
20130000704 | THREE-DIMENSIONAL CONDUCTIVE ELECTRODE FOR SOLAR CELL - A photovoltaic device and method include forming a plurality of pillar structures in a substrate, forming a first electrode layer on the pillar structures and forming a continuous photovoltaic stack including an N-type layer, a P-type layer and an intrinsic layer on the first electrode. A second electrode layer is deposited over the photovoltaic stack such that gaps or fissures occur in the second electrode layer between the pillar structures. The second electrode layer is wet etched to open up the gaps or fissures and reduce the second electrode layer to form a three-dimensional electrode of substantially uniform thickness over the photovoltaic stack. | 01-03-2013 |
20130000706 | TANDEM SOLAR CELL WITH IMPROVED TUNNEL JUNCTION - A photovoltaic device and method for fabricating a photovoltaic device include forming a light-absorbing semiconductor structure on a transmissive substrate including a first doped layer and forming an intrinsic layer on the first doped layer, wherein the intrinsic layer includes an amorphous material. The intrinsic layer is treated with a plasma to form seed sites. A first tunnel junction layer is formed on the intrinsic layer by growing microcrystals from the seed sites. | 01-03-2013 |
20130001657 | SELF-ALIGNED III-V MOSFET DIFFUSION REGIONS AND SILICIDE-LIKE ALLOY CONTACT - A metal oxide semiconductor field effect transistor and method for forming the same include exposing portions on a substrate adjacent to a gate stack, forming a dopant layer over the gate stack and in contact with the substrate in the portions exposed and annealing the dopant layer to drive dopants into the substrate to form self-aligned dopant regions in the substrate. The dopant layer is removed. A metal containing layer is deposited over the gate stack and in contact with the substrate in the exposed portions. The metal containing layer is annealed to drive metal into the substrate to form self-aligned contact regions in a metal alloy formed in the substrate within the dopant regions. The metal layer is then removed. | 01-03-2013 |
20130001659 | SELF-ALIGNED III-V MOSFET DIFFUSION REGIONS AND SILICIDE-LIKE ALLOY CONTACT - A metal oxide semiconductor field effect transistor and method for forming the same include exposing portions on a substrate adjacent to a gate stack, forming a dopant layer over the gate stack and in contact with the substrate in the portions exposed and annealing the dopant layer to drive dopants into the substrate to form self-aligned dopant regions in the substrate. The dopant layer is removed. A metal containing layer is deposited over the gate stack and in contact with the substrate in the exposed portions. The metal containing layer is annealed to drive metal into the substrate to form self-aligned contact regions in a metal alloy formed in the substrate within the dopant regions. The metal layer is then removed. | 01-03-2013 |
20130015455 | GERMANIUM-CONTAINING RELEASE LAYER FOR TRANSFER OF A SILICON LAYER TO A SUBSTRATE - A germanium-containing layer is deposited on a single crystalline bulk silicon substrate in an ambient including a level of oxygen partial pressure sufficient to incorporate 1%-50% of oxygen in atomic concentration. The thickness of the germanium-containing layer is preferably limited to maintain some degree of epitaxial alignment with the underlying silicon substrate. Optionally, a graded germanium-containing layer can be grown on, or replace, the germanium-containing layer. An at least partially crystalline silicon layer is subsequently deposited on the germanium-containing layer. A handle substrate is bonded to the at least partially crystalline silicon layer. The assembly of the bulk silicon substrate, the germanium-containing layer, the at least partially crystalline silicon layer, and the handle substrate is cleaved within the germanium-containing layer to provide a composite substrate including the handle substrate and the at least partially crystalline silicon layer. Any remaining germanium-containing layer on the composite substrate is removed. | 01-17-2013 |
20130019929 | REDUCTION OF LIGHT INDUCED DEGRADATION BY MINIMIZING BAND OFFSET - A device and method for reducing degradation in a photovoltaic device includes adjusting a band offset of the device during one or more of forming an electrode, forming a first doped layer or forming an intrinsic layer. The adjusting reduces a band offset between one or more of the electrode, the first doped layer and the intrinsic layer to reduce light-induced degradation of the device. A second doped layer is formed on the intrinsic layer. | 01-24-2013 |
20130048061 | MONOLITHIC MULTI-JUNCTION PHOTOVOLTAIC CELL AND METHOD - A device and method for fabrication of a multi-junction photovoltaic device includes providing a parent substrate including a single crystal III-V material. The parent substrate forms a III-V cell of the multi-junction photovoltaic device. A lattice-matched Germanium layer is epitaxially grown on the III-V material to form a final cell of the multi-junction photovoltaic device. The Germanium layer is bonded to a foreign substrate. | 02-28-2013 |
20130049150 | FORMATION OF METAL NANOSPHERES AND MICROSPHERES - Hemispheres and spheres are formed and employed for a plurality of applications. Hemispheres are employed to form a substrate having an upper surface and a lower surface. The upper surface includes peaks of pillars which have a base attached to the lower surface. The peaks have a density defined at the upper surface by an array of hemispherical metal structures that act as a mask during an etch to remove substrate material down to the lower surface during formation of the pillars. The pillars are dense and uniform and include a microscale average diameter. The spheres are formed as independent metal spheres or nanoparticles for other applications. | 02-28-2013 |
20130092213 | EFFICIENCY RESTORATION IN A PHOTOVOLTAIC CELL - The electrical output efficiency of a photovoltaic thermal system can be restored from degradation due to light exposure by annealing a photovoltaic thermal cell at an elevated temperature. The elevated temperature at the photovoltaic thermal cell can be provided by redirecting the flow of a heat exchange fluid to bypass a heat exchanger unit. A boiler unit may be employed to provide additional heating of the heat exchange fluid during the anneal. Further, a variable configuration lid can be provided over a front surface of the photovoltaic thermal cell to control ventilation over the front surface. During the anneal, the position of the variable configuration lid can be set so as to trap heat above the front surface and to elevate the anneal temperature further. | 04-18-2013 |
20130092214 | EFFICIENCY RESTORATION IN A PHOTOVOLTAIC CELL - The electrical output efficiency of a photovoltaic thermal system can be restored from degradation due to light exposure by annealing a photovoltaic thermal cell at an elevated temperature. The elevated temperature at the photovoltaic thermal cell can be provided by redirecting the flow of a heat exchange fluid to bypass a heat exchanger unit. A boiler unit may be employed to provide additional heating of the heat exchange fluid during the anneal. Further, a variable configuration lid can be provided over a front surface of the photovoltaic thermal cell to control ventilation over the front surface. During the anneal, the position of the variable configuration lid can be set so as to trap heat above the front surface and to elevate the anneal temperature further. | 04-18-2013 |
20130095599 | PHOTOVOLTAIC DEVICE USING NANO-SPHERES FOR TEXTURED ELECTRODES - An electronic device includes a substrate and a plurality of particles anchored to the substrate. An electrode material is formed over the particles and configured to form peaks over the particles. One or more operational layers are fog led over the electrode material for performing a device function. | 04-18-2013 |
20130118565 | TEMPERATURE GRADING FOR BAND GAP ENGINEERING OF PHOTOVOLTAIC DEVICES - A method for fabricating a photovoltaic device includes depositing a p-type layer at a first temperature and depositing an intrinsic layer while gradually increasing a deposition temperature to a final temperature. The intrinsic layer deposition is completed at the final temperature. An n-type layer is formed on the intrinsic layer. | 05-16-2013 |
20130221373 | SOLAR CELL MADE USING A BARRIER LAYER BETWEEN P-TYPE AND INTRINSIC LAYERS - A method for forming a photovoltaic device includes depositing a p-type layer on a substrate. A barrier layer is formed on the p-type layer by exposing the p-type layer to an oxidizing agent. An intrinsic layer is formed on the barrier layer, and an n-type layer is formed on the intrinsic layer. | 08-29-2013 |
20130221464 | REDUCED LIGHT DEGRADATION DUE TO LOW POWER DEPOSITION OF BUFFER LAYER - Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer. | 08-29-2013 |
20130224899 | ENHANCING EFFICIENCY IN SOLAR CELLS BY ADJUSTING DEPOSITION POWER - Methods for forming a photovoltaic device include adjusting a deposition power for depositing a buffer layer including germanium on a transparent electrode. The deposition power is configured to improve device efficiency. A p-type layer is formed on the buffer layer. An intrinsic layer and an n-type layer are formed over the p-type layer. | 08-29-2013 |
20130224900 | SOLAR CELL MADE IN A SINGLE PROCESSING CHAMBER - Methods for forming a photovoltaic device include depositing a p-type layer on a substrate and cleaning the p-type layer by exposing a surface of the p-type layer to a plasma treatment to react with contaminants. An intrinsic layer is formed on the p-type layer, and an n-type layer is formed on the intrinsic layer. | 08-29-2013 |
20130264658 | Reduced S/D Contact Resistance of III-V Mosfet Using Low Temperature Metal-Induced Crystallilzation of n+ Ge - Embodiments of this invention provide a method to fabricate an electrical contact. The method includes providing a substrate of a compound Group III-V semiconductor material having at least one electrically conducting doped region adjacent to a surface of the substrate. The method further includes fabricating the electrical contact to the at least one electrically conducting doped region by depositing a single crystal layer of germanium over the surface of the substrate so as to at least partially overlie the at least one electrically conducting doped region, converting the single crystal layer of germanium into a layer of amorphous germanium by implanting a dopant, forming a metal layer over exposed surfaces of the amorphous germanium layer, and performing a metal-induced crystallization (MIC) process on the amorphous germanium layer having the overlying metal layer to convert the amorphous germanium layer to a crystalline germanium layer and to activate the implanted dopant. The electrical contact can be a source or a drain contact of a transistor. | 10-10-2013 |
20130298971 | COST-EFFICENT HIGH POWER PECVD DEPOSITION FOR SOLAR CELLS - A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer. | 11-14-2013 |
20130298980 | CONE-SHAPED HOLES FOR HIGH EFFICIENCY THIN FILM SOLAR CELLS - A photovoltaic device includes a substrate having a plurality of hole shapes formed therein. The plurality of hole shapes each have a hole opening extending from a first surface and narrowing with depth into the substrate. The plurality of hole shapes form a hole pattern on the first surface, and the hole pattern includes flat areas separating the hole shapes on the first surface. A photovoltaic device stack is formed on the first surface and extends into the hole shapes. Methods are also provided. | 11-14-2013 |
20130307089 | Self-Aligned III-V MOSFET Fabrication With In-Situ III-V Epitaxy And In-Situ Metal Epitaxy And Contact Formation - A method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate including source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions. The method includes growing raised source/drain regions on the source/drain regions, the grown raised source/drain regions including III-V semiconductor material, and growing metal contacts on the grown raised source/drain regions. Another method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate including source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions. The method includes growing metal contacts on the source/drain regions. Transistors and computer program products are also disclosed. | 11-21-2013 |
20130309830 | Self-Aligned III-V MOSFET Fabrication with In-Situ III-V Epitaxy And In-Situ Metal Epitaxy And Contact Formation - A method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate including source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions. The method includes growing raised source/drain regions on the source/drain regions, the grown raised source/drain regions including III-V semiconductor material, and growing metal contacts on the grown raised source/drain regions. Another method for forming a transistor includes providing a patterned gate stack disposed on a III-V substrate and having sidewall spacers formed on sides of the patterned gate stack, the III-V substrate including source/drain regions adjacent to the sidewall spacers and field oxide regions formed adjacent to the source/drain regions. The method includes growing metal contacts on the source/drain regions. Transistors and computer program products are also disclosed. | 11-21-2013 |
20130312828 | PHOTOVOLTAIC DEVICE WITH BAND-STOP FILTER - Photovoltaic device with band-stop filter. The photovoltaic device includes an amorphous photovoltaic material and a band-stop filter structure having a stopband extending from a lower limiting angular frequency ω | 11-28-2013 |
20130341623 | PHOTORECEPTOR WITH IMPROVED BLOCKING LAYER - A photoreceptor includes a multilayer blocking structure to reduce dark discharge of the surface voltage of the photoreceptor resulting from electron injection from an electrically conductive substrate. The multilayer blocking structure includes wide band gap semiconductor layers in alternating sequence with one or more narrow band gap blocking layers. A fabrication method of the photoreceptor includes transfer-doping of the narrow band gap blocking layers, which are deposited in alternating sequence with wide band gap semiconductor layers to form a blocking structure. Suppression of hole or electron injection can be obtained using the method. | 12-26-2013 |
20130344644 | PHOTORECEPTOR WITH IMPROVED BLOCKING LAYER - A photoreceptor includes a multilayer blocking structure to reduce dark discharge of the surface voltage of the photoreceptor resulting from electron injection from an electrically conductive substrate. The multilayer blocking structure includes wide band gap semiconductor layers in alternating sequence with one or more narrow band gap blocking layers. A fabrication method of the photoreceptor includes transfer-doping of the narrow band gap blocking layers, which are deposited in alternating sequence with wide band gap semiconductor layers to form a blocking structure. Suppression of hole or electron injection can be obtained using the method. | 12-26-2013 |
20140000685 | HIGH EFFICIENCY SOLAR CELLS FABRICATED BY INEXPENSIVE PECVD | 01-02-2014 |
20140000692 | TRANSPARENT CONDUCTIVE ELECTRODE FOR THREE DIMENSIONAL PHOTOVOLTAIC DEVICE | 01-02-2014 |
20140004648 | TRANSPARENT CONDUCTIVE ELECTRODE FOR THREE DIMENSIONAL PHOTOVOLTAIC DEVICE | 01-02-2014 |
20140004651 | HIGH EFFICIENCY SOLAR CELLS FABRICATED BY INEXPENSIVE PECVD | 01-02-2014 |
20140014162 | EFFICIENCY RESTORATION IN A PHOTOVOLTAIC CELL - The electrical output efficiency of a photovoltaic thermal system can be restored from degradation due to light exposure by annealing a photovoltaic thermal cell at an elevated temperature. The elevated temperature at the photovoltaic thermal cell can be provided by redirecting the flow of a heat exchange fluid to bypass a heat exchanger unit. A boiler unit may be employed to provide additional heating of the heat exchange fluid during the anneal. Further, a variable configuration lid can be provided over a front surface of the photovoltaic thermal cell to control ventilation over the front surface. During the anneal, the position of the variable configuration lid can be set so as to trap heat above the front surface and to elevate the anneal temperature further. | 01-16-2014 |
20140060628 | UNIFORMLY DISTRIBUTED SELF-ASSEMBLED SOLDER DOT FORMATION FOR HIGH EFFICIENCY SOLAR CELLS - A substrate for photovoltaic device includes a textured surface formed from silicon-based material. The textured surface includes a plurality of cones uniformly distributed across the textured surface. The uniformly distributed cones are configured by etching from a top surface of the substrate using a self-assembled solder dot mask evaporated on the substrate prior to etching. The cones are uniformly distributed as a result of gettering a process chamber prior to forming the solder dot mask. The cones have a height/width ratio between about 1 to about 4, and the cones have a density between 10 | 03-06-2014 |
20140065752 | UNIFORMLY DISTRIBUTED SELF-ASSEMBLED SOLDER DOT FORMATION FOR HIGH EFFICIENCY SOLAR CELLS - A method for fabricating a photovoltaic device includes performing a gettering process in a processing chamber which restricts formation of a layer of gettering materials on a substrate and forming a solder layer on the substrate. The solder layer is annealed to form uniformly distributed solder dots which grow on the substrate. The substrate is etched using the solder dots to protect portions of the substrate and form cones in the substrate such that the cones provide a three-dimensional radiation absorbing structure for the photovoltaic device. | 03-06-2014 |
20140196780 | PHOTOVOLTAIC DEVICES WITH AN INTERFACIAL BAND-GAP MODIFYING STRUCTURE AND METHODS FOR FORMING THE SAME - A Schottky-barrier-reducing layer is provided between a p-doped semiconductor layer and a transparent conductive material layer of a photovoltaic device. The Schottky-barrier-reducing layer can be a conductive material layer having a work function that is greater than the work function of the transparent conductive material layer. The conductive material layer can be a carbon-material layer such as a carbon nanotube layer or a graphene layer. Alternately, the conductive material layer can be another transparent conductive material layer having a greater work function than the transparent conductive material layer. The reduction of the Schottky barrier reduces the contact resistance across the transparent material layer and the p-doped semiconductor layer, thereby reducing the series resistance and increasing the efficiency of the photovoltaic device. | 07-17-2014 |
20150075608 | PHOTOVOLTAIC DEVICE USING NANO-SPHERES FOR TEXTURED ELECTRODES - An electronic device includes a substrate and a plurality of particles anchored to the substrate. An electrode material is formed over the particles and configured to form peaks over the particles. One or more operational layers are formed over the electrode material for performing a device function. | 03-19-2015 |