Patent application number | Description | Published |
20140269804 | Package Structure and Methods of Forming Same - A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer. | 09-18-2014 |
20140269805 | Light Coupling Device and Methods of Forming Same - An embodiment is a semiconductor device comprising an optical device over a first substrate, a vertical waveguide on a top surface of the optical device, the vertical waveguide having a first refractive index, and a capping layer over the vertical waveguide, the capping layer configured to be a lens for the vertical waveguide and the capping layer having a second refractive index. | 09-18-2014 |
20140363121 | Integrated Metal Grating - An integrated circuit includes a substrate, a metal grating disposed over the substrate, and a waveguide layer disposed over or under the metal grating. The metal grating is arranged to change a propagation direction of an optical signal and the waveguide layer is arranged to guide the optical signal to a desired direction. | 12-11-2014 |
20150036970 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING - A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer. | 02-05-2015 |
20150036991 | METHOD OF MAKING A METAL GRATING IN A WAVEGUIDE AND DEVICE FORMED - A method of making a grating in a waveguide includes forming a waveguide material over a substrate, the waveguide material having a thickness less than or equal to about 100 nanometers (nm). The method further includes forming a photoresist over the waveguide material and patterning the photoresist. The method further includes forming a first set of openings in the waveguide material through the patterned substrate and filling the first set of openings with a metal material. | 02-05-2015 |
20150061126 | MANUFACTURE INCLUDING SUBSTRATE AND PACKAGE STRUCTURE OF OPTICAL CHIP - A manufacture includes a package structure, a first substrate, and a conductive member of a same material. The package structure includes a chip comprising a conductive pad, a conductive structure over the chip, and a passivation layer over the conductive structure. The passivation layer has an opening defined therein, and the opening exposes a portion of a planar portion of the conductive structure. The first substrate includes a first surface defining a first reference plane and a second surface defining a second reference plane. The conductive member extends across the first reference plane and the second reference plane and into the opening. The conductive member is electrically coupled to the exposed portion of the planar portion. | 03-05-2015 |
20150061137 | PACKAGE AND METHOD FOR INTEGRATION OF HETEROGENEOUS INTEGRATED CIRCUITS - A package for holding a plurality of heterogeneous integrated circuits includes a first chip having a first conductive pad and a first substrate including a first semiconductor, and a second chip having a second conductive pad and a second substrate including a second semiconductor. The second semiconductor is different from the first semiconductor. The package also includes a molding structure in which the first chip and the second chip are embedded, a conductive structure over the first chip and conductively coupled to the first conductive pad and over the second chip and conductively coupled to the second conductive pad, and a passivation layer over the conductive structure. The passivation layer comprises an opening defined therein which exposes a portion of the second chip. | 03-05-2015 |
20150104909 | APPARATUS AND METHOD FOR SELF-ALIGNING CHIP PLACEMENT AND LEVELING - An approach is provided for aligning and leveling a chip package portion. The approach involves filling, at least partially, a reservoir formed between a first sidewall portion having a first slanted surface and a second sidewall portion having a second slanted surface with a fluid. The approach also involves placing a chip package portion into the reservoir. The approach further involves draining the fluid from the reservoir to cause the chip package portion to align with respect to a center of the reservoir. The chip package portion aligns with respect to the center of the reservoir and levels based on a relationship between the chip package portion, an angle of the first slanted surface, an angle of the second slanted surface, and the fluid. The chip package portion is secured in the aligned and leveled state by a molding compound. | 04-16-2015 |