Ki Soub
Ki Soub Yang, Gumi-Si KR
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20090146679 | Method for testing liquid crystal display - An LCD test method and apparatus for reducing the number of channels of a probe unit is provided. An apparatus for testing a liquid crystal display including: a stage on which a liquid crystal panel is placed; a plurality of vertically divided blocks, wherein each of the vertically divided blocks include a plurality of adjacent data lines; a data probe unit that provides test pattern signals respectively to groups of at least two of the plurality of vertically divided blocks of the liquid crystal panel; a plurality of horizontally divided blocks, wherein each of the horizontally divided blocks include a plurality of adjacent gate lines; a gate probe unit that provides scanning signals respectively to the plurality of horizontally divided blocks of the liquid crystal panel; and a controller that provides test pattern signals to the data probe unit and provides scanning signals to the gate probe unit. | 06-11-2009 |
20090290785 | APPARATUS AND METHOD FOR INSPECTING LIQUID CRYSTAL DISPLAY - A liquid crystal display (LCD) inspection apparatus and method are provided. The inspection apparatus and method are capable of automatically and accurately detecting defects of an LCD panel, and providing information of the automatically-detected defects of the LCD panel to the operator, thereby enabling the operator to easily recognize the defects. | 11-26-2009 |
Ki Soub Yang, Gyeongsangbak-Do KR
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20110181819 | LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME - A liquid crystal display comprises a matrix pattern formed in a double layer comprising a lower pattern having a hydrophilic property on a substrate, and a black matrix having a hydrophobic property on the lower pattern; and color filters formed in the pixel area. | 07-28-2011 |
Ki Soub Yang US
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20110287561 | THIN FILM TRANSISTOR ARRAY SUBSTRATE WITH IMPROVED TEST TERMINALS - A thin film transistor array substrate comprises thin film transistors and pixel electrodes formed at respective pixels that are defined by gate lines and data lines that orthogonally intersect each other. The thin film transistor array substrate further comprises a plurality of gate pad units that group a plurality of gate pads extended from the gate lines, and a plurality of data pad units that groups a plurality of data pads extended from the data lines. The thin film transistor array substrate further includes a plurality of gate test terminals connected to the gate pad units and beside at least one side of the respective gate pad units, and a plurality of data test terminals connected to the data pad units and located beside at least one side of the respective data pad units. | 11-24-2011 |