Patent application number | Description | Published |
20090257293 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a selector line selection circuit for selecting, in a read operation, a selector line for connecting a first main bit line connected to the sense amplifier with a sub-bit line to which the memory cell being read is connected, a selector line for connecting the first main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs, a selector line for connecting a second main bit line connected to the sense amplifier with a sub-bit line to which the reference cell is connected, and a selector line for connecting the second main bit line with a sub-bit line of at least one sector different from the sector to which the memory cell being read belongs. | 10-15-2009 |
20100027344 | SEMICONDUCTOR MEMORY DEVICE - A drain voltage generator circuit includes a first switching element coupled between a first power supply voltage and an output end of the drain voltage generator circuit, a second switching element coupled in parallel to the first switching element and having a smaller current capability than that of the first switching element, and a control circuit for turning ON the second switching element and then the first switching element, and generates a voltage to supply to a drain of a memory cell. A source of the memory cell is set to be floated or grounded by a transistor. | 02-04-2010 |
20100027352 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - In a non-volatile semiconductor memory device, variations in voltage applied to a bit line when an erase voltage applying step is repeatedly executed are suppressed, thereby reducing variations in Vt after erasure. A memory array includes memory cells arranged in an array, a plurality of word lines, and a plurality of bit lines and main bit lines. The memory array also includes a usable region which can store data and an isolation region which cannot store data. Each bit line provided in the usable region is connected via a select transistor to the corresponding main bit line. At least one main bit line is connected not only to a bit line of the usable region, but also to a bit line of the isolation region via a select transistor. | 02-04-2010 |
20100027366 | SEMICONDUCTOR MEMORY DEVICE - In a semiconductor memory device, a voltage rise due to IR-DROP is suppressed which occurs when a ground voltage is applied to a memory cell during a program operation. Discharge transistors are provided between the ground and bit lines connected to the source and drain of the memory cell. The discharge transistors receive mutually independent discharge control signals which are generated and outputted from a DS decoder driver at the respective gates thereof. To the bit line which applies the ground voltage to the memory cell, the ground voltage can be set using the discharge transistor. | 02-04-2010 |
20120268995 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC APPARATUS - A memory cell array including non-volatile memory cells is divided into a first block including a non-volatile memory cell for accumulating a degradation over time and a second block including a non-volatile memory cell for storing data. A word line select circuit and a bit line select circuit select a first word line and a first bit line connected to the second block to access the non-volatile memory cell for storing data of the second block, and selects a second word line or a second bit line connected to the first block to apply a stress voltage to the non-volatile memory cell for accumulating the degradation over time of the first block, thereby automatically detecting ambient temperature and storing accumulated stress. | 10-25-2012 |
20130148423 | SEMICONDUCTOR MEMORY DEVICE - A main bit line is disposed between a reference main bit line and core main bit lines. A selection transistor disposed between a sub bit line connected to a cell and the main bit line can switch between a conductive state and a non-conductive state independently of other selection transistors. A dummy main bit line can be set to ground potential by a shield grounding section, and can be used as a shield line of the reference main bit line. | 06-13-2013 |
20130314969 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - Each of m word lines is connected to n memory cells in a corresponding one of rows of m×n memory cells. Each of n bit lines is connected to m memory cells in a corresponding one of columns of m×n memory cells, and each of n source lines is connected to m memory cells in a corresponding one of columns of m×n memory cells. N first switching elements switch connection states between a reference node and the n bit lines, and n second switching elements switch connection states between the reference node and the n source lines. N third switching elements switch connection states between the write driver and the n bit lines, and n fourth switching elements switch connection states between the write driver and the n source lines. | 11-28-2013 |
20140092665 | SEMICONDUCTOR MEMORY DEVICE - A memory cell array includes a plurality of word lines each connected to gates of cell transistors in corresponding ones of a plurality of memory cells, a plurality of first control lines, a plurality of second control lines, a first ground circuit configured to ground the first control lines together in accordance with a first signal, and the first ground circuit includes a plurality of first transistors provided in a one-to-one correspondence with the first control lines, and each including a drain connected to a corresponding one of the first control lines, a first ground line configured to ground sources of the first transistors together, and a first signal line connected to gates of the first transistors to feed the first signal to the gates. | 04-03-2014 |
20140332752 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - A non-volatile semiconductor memory device includes a plurality of series-coupled fixed resistance elements, a plurality of reference cell transistors, and reference word lines coupled to gates of the reference cell transistors, a first reference data line coupled to one end of a resistance path in which a plurality of fixed resistance elements are arranged, and a second reference data line coupled in common to one ends of the reference cell transistors. The other end of each of the reference cell transistors is coupled to one of coupling points of the fixed resistance elements or the other end of the resistance path. | 11-13-2014 |
20140334217 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device includes: a memory cell array having a plurality of memory cells arranged in a matrix; a reference bit line; a reference source line; at least one reference cell including first and second transistors serially connected between these lines; a reference word line connected to the gate of the first transistor; and a reference driver circuit configured to control the gate voltage of the second transistor. | 11-13-2014 |
Patent application number | Description | Published |
20110079546 | MEMBRANE FILTERING DEVICE MANAGING SYSTEM AND MEMBRANE FILTERING DEVICE FOR USE THEREIN, AND MEMBRANE FILTERING DEVICE MANAGING METHOD - Provided are a membrane filtering device managing system by which the membrane filtering device can be managed with a better precision and membrane filtering device for use therein, as well as to a membrane filtering device managing method. At least two sensors of an electric conductivity sensor | 04-07-2011 |
20110114560 | SPIRAL TYPE MEMBRANE ELEMENT AND SPIRAL TYPE MEMBRANE FILTERING DEVICE HAVING THE MEMBRANE ELEMENT, AND MEMBRANE FILTERING DEVICE MANAGING SYSTEM AND MEMBRANE FILTERING DEVICE MANAGING METHOD USING THE DEVICE - Provided are a spiral type membrane element that can ensure a larger amount of electric power without performing a cumbersome work and a spiral type membrane filtering device having the element, as well as a membrane filtering device managing system and a membrane filtering device managing method using the device. The spiral type membrane element comprises a sensor for detecting a property of liquid, a power generating section that generates electric power by using said liquid, and a wireless transmitting section that receives the electric power supplied from said power generating section and wirelessly transmits a detection signal from said sensor. By generating electric power in the power generating section with use of the liquid detected by the sensor, a larger amount of electric power can be ensured without performing a cumbersome work. | 05-19-2011 |
20110114561 | SPIRAL TYPE MEMBRANE FILTERING DEVICE AND MOUNTING MEMBER, AND MEMBRANE FILTERING DEVICE MANAGING SYSTEM AND MEMBRANE FILTERING DEVICE MANAGING METHOD USING THE SAME - Provided are a spiral type membrane filtering device by which an electric component can be re-used and a mounting member, as well as a membrane filtering device managing system and a membrane filtering device managing method using the same. An interconnector ( | 05-19-2011 |
20110121574 | SPIRAL TYPE MEMBRANE ELEMENT, AND SPIRAL TYPE MEMBRANE FILTERING DEVICE HAVING THE SAME - Provided are a spiral type membrane element that can re-collect the electric power that is used in a good manner, and a spiral type membrane filtering device having the same. The spiral type membrane element comprises a power generating section that generates electric power by using a liquid, and an electric power outputting section that outputs, either in a wired manner or in a wireless manner, the electric power supplied from said power generating section. The electric power that is generated in the power generating section using the liquid (raw water, permeated water, or concentrated water) can be output from the electric power outputting section in a wired manner or in a wireless manner. Therefore, the electric power that is output from the aforesaid electric power outputting section can be used in an electric component disposed outside or can be stored into a capacitor section disposed outside. | 05-26-2011 |