Patent application number | Description | Published |
20130069812 | Time-Interleaved Analog-to-Digital Converter for Signals in any Nyquist Zone - Processing a signal by receiving an analog input signal located outside of a first Nyquist zone that is between 0 and fs/2; passing the analog input signal through an M-channel time-interleaved analog-to-digital converter (TI-ADC) to generate a TI-ADC output signal; and estimating and correcting a timing skew error in the TI-ADC output signal. Alternatively, an electronic circuit that includes an input for an analog input signal, an M-channel time-interleaved analog-to-digital converter (TI-ADC) and a timing skew error estimating and correcting circuitry. The analog input signal is located outside of a first Nyquist zone that is between 0 and fs/2. The TI-ADC receives the analog input signal and generates a TI-ADC output signal. The timing skew error estimating and correcting circuitry estimates and corrects a timing skew error in the TI-ADC output signal. | 03-21-2013 |
20140070859 | System and Method for Frequency Multiplier Jitter Correction - A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal, derives a system clock signal having a second frequency, greater than the first frequency. A PLL using a voltage controlled oscillator (VCO) is one example of a frequency multiplier. The method samples the amplitude of the analog reference signal using the system clock signal and converts the sampled analog reference signal into a digitized reference signal. In response to comparing the digitized reference signal to an ideal digitized reference signal, the phase error correction for the system clock signal is derived. The phase error correction at a first instance of time can be applied to the digitized data signal, previously converted from an analog data signal sampled at a first instance of time with the system clock signal. | 03-13-2014 |
20150015313 | FREQUENCY MULTIPLIER JITTER CORRECTION - A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal, derives a system clock signal having a second frequency, greater than the first frequency. A PLL using a voltage controlled oscillator (VCO) is one example of a frequency multiplier. The method samples the amplitude of the analog reference signal using the system clock signal and converts the sampled analog reference signal into a digitized reference signal. In response to comparing the digitized reference signal to an ideal digitized reference signal, the phase error correction for the system clock signal is derived. The phase error correction at a first instance of time can be applied to the digitized data signal, previously converted from an analog data signal sampled at a first instance of time with the system clock signal. | 01-15-2015 |
20150022384 | System Clock Jitter Correction - A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal, derives a system clock signal having a second frequency, greater than the first frequency. A PLL using a voltage controlled oscillator (VCO) is one example of a frequency multiplier. The method samples the amplitude of the analog reference signal using the system clock signal and converts the sampled analog reference signal into a digitized reference signal. In response to comparing the digitized reference signal to an ideal digitized reference signal, the phase error correction for the system clock signal is derived. The phase error correction at a first instance of time can be applied to the digitized data signal, previously converted from an analog data signal sampled at a first instance of time with the system clock signal. | 01-22-2015 |
20150109038 | System Clock Jitter Correction - A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal, derives a system clock signal having a second frequency, greater than the first frequency. A PLL using a voltage controlled oscillator (VCO) is one example of a frequency multiplier. The method samples the amplitude of the analog reference signal using the system clock signal and converts the sampled analog reference signal into a digitized reference signal. In response to comparing the digitized reference signal to an ideal digitized reference signal, the phase error correction for the system clock signal is derived. The phase error correction at a first instance of time can be applied to the digitized data signal, previously converted from an analog data signal sampled at a first instance of time with the system clock signal. | 04-23-2015 |
20150145709 | N-Path Interleaving Analog-to-Digital Converter (ADC) with Background Calibration - A system and method are provided of performing background corrections for an interleaving analog-to-digital converter (ADC). An analog input signal s | 05-28-2015 |
20150212494 | Traveling Pulse Wave Quantizer - A Traveling Pulse Wave Quantization method is provided for converting a time sensitive signal to a digital value. A first stop signal is delayed by a first time delay, a first plurality of times, to create a delayed first stop signal. A clock signal is delayed by a second time delay, a first plurality of times, to create a delayed clock signal first period. Each second time delay is associated with a corresponding first time delay, and the second time delay is greater than the first time delay. When the delayed first stop signal occurs before the delayed clock signal first period, a count of the delays is stopped and converted into a digital or thermometer value. An accurate resampled value is provided regardless of the duration in delay between the first stop signal and a second stop signal that is accepted after the first stop signal. | 07-30-2015 |
20150318864 | CURRENT IMPULSE (CI) DIGITAL-TO-ANALOG CONVERTER (DAC) - A current impulse (CI) method is provided for converting digital data signals to analog values. First, digital data hits are converted into current impulses. Then, the current impulses are converted into analog currents representing the digital data hits. More typically, the method accepts a k-bit digital word, and converts the k-bit digital word into (k) corresponding current impulses. In one aspect, the method accepts (n) consecutive k-bit digital words. Then, for each bit position in the k-bit digital word, (n) consecutive bits are sampled using (n) consecutive phases of an n-phase clock, creating (n) interleaved current impulses. The (n) interleaved current impulses are converted into an analog current representing the (n) consecutive k-bit digital words. Alternatively, (n) consecutive hits are sampled using (n) consecutive phases of an n-phase clock for each bit position in the k-bit digital word, creating (n) summed current impulses. A CI digital-to-analog converter is also provided. | 11-05-2015 |