Patent application number | Description | Published |
20110249491 | METHOD AND APPARATUS FOR PROGRAMMING A MAGNETIC TUNNEL JUNCTION (MTJ) - A method of writing to magnetic tunnel junctions (MTJs) of a magnetic memory array includes storing in-coming data in a cache register, reading the present logic state of a first one of a set of at least two MTJs, the set of at least two MTJs including the first MTJ and a second MTJ. The in-coming data is to be written into the second MTJ. Further steps are storing the read logic state into a data register, swapping the contents of the data register and the cache register so that the cache register stores the read logic state and the data register stores the in-coming data, applying a first predetermined voltage level to the set of MTJs thereby causing the first MTJ to be over-written, applying a second predetermined voltage level to the set of MTJs, and storing the in-coming data into the second MTJ. | 10-13-2011 |
20120068236 | NON-UNIFORM SWITCHING BASED NON-VOLATILE MAGNETIC BASED MEMORY - A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current. | 03-22-2012 |
20120069643 | NON-UNIFORM SWITCHING BASED NON-VOLATILE MAGNETIC BASED MEMORY - A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current. | 03-22-2012 |
20120069649 | NON-UNIFORM SWITCHING BASED NON-VOLATILE MAGNETIC BASED MEMORY - A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current. | 03-22-2012 |
20120182795 | EMULATION OF STATIC RANDOM ACCESS MEMORY (SRAM) BY MAGNETIC RANDOM ACCESS MEMORY (MRAM) - A magnetic memory system includes a magnetic random access memory (MRAM) including a plurality of magnetic memory banks and operative to store data during a write operation initiated by a write command. The magnetic memory system further includes a first-in-first-out (FIFO) interface device coupled to the MRAM and including a plurality of FIFOs Each of the magnetic memory banks is coupled to a respective one of the plurality of FIFOs, the FIFO being operative to queue write commands on a per magnetic memory bank basis and further operative to issue the queued write commands at a time when the MRAM is not in use, wherein concurrent write operations are performed to at least two of the plurality of magnetic memory banks. | 07-19-2012 |
20120230101 | METHOD AND APPARATUS FOR WRITING TO A MAGNETIC TUNNEL JUNCTION (MTJ) BY APPLYING INCREMENTALLY INCREASING VOLTAGE LEVEL - A method of writing to magnetic tunnel junctions (MTJs) of a magnetic memory array includes storing in-coming data in a cache register, reading the present logic state of a first one of a set of at least two MTJs, the set of at least two MTJs including the first MTJ and a second MTJ. The in-coming data is to be written into the second MTJ. Further steps are storing the read logic state into a data register, swapping the contents of the data register and the cache register so that the cache register stores the read logic state and the data register stores the in-coming data, applying a first predetermined voltage level to the set of MTJs thereby causing the first MTJ to be over-written, applying a second predetermined voltage level to the set of MTJs, and storing the in-coming data into the second MTJ. | 09-13-2012 |
20140032823 | MEMORY BLOCK IDENTIFIED BY GROUP OF LOGICAL BLOCK ADDRESSES, STORAGE DEVICE WITH MOVABLE SECTORS, AND METHODS - In an embodiment, only one sector of a plurality of sectors in a physical block of a plurality of physical blocks has a sector status location configured to store information that indicates a move status of an other sector of the plurality sectors of the physical block of the plurality of physical blocks, where the only one sector of the plurality of sectors in the physical block of the plurality of physical blocks is configured to store a sector of data in addition to the information that indicates the move status. | 01-30-2014 |
20140033328 | SECURE COMPACT FLASH - Methods and apparatus are provided, such as a memory card with a processor and nonvolatile memory coupled thereto. The nonvolatile memory has a secure area configured to store a user password and a serial number in encrypted form. The card is configured to grant access to the secure area when the card receives a password that matches the stored user password and the card is coupled to a system having the serial number. | 01-30-2014 |
20140082271 | FLASH MEMORY ARCHITECTURE WITH SEPARATE STORAGE OF OVERHEAD AND USER DATA - A memory device has a plurality of dedicated data blocks for storing user data and a plurality of dedicated overhead blocks for storing overhead data. A dedicated overhead block of the plurality of dedicated overhead blocks has a plurality of overhead segments. The overhead segments have physical block address registers configured to store physical block addresses defining respective dedicated data blocks. | 03-20-2014 |
20140269041 | EMULATION OF STATIC RANDOM ACCESS MEMORY (SRAM) BY MAGNETIC RANDOM ACCESS MEMORY (MRAM) - A magnetic memory system includes a magnetic random access memory (MRAM) including a plurality of magnetic memory banks and operative to store data during a write operation initiated by a write command. The magnetic memory system further includes a first-in-first-out (FIFO) interface device coupled to the MRAM and including a plurality of FIFOs Each of the magnetic memory banks is coupled to a respective one of the plurality of FIFOs, the FIFO being operative to queue write commands on a per magnetic memory bank basis and further operative to issue the queued write commands at a time when the MRAM is not in use, wherein concurrent write operations are performed to at least two of the plurality of magnetic memory banks. | 09-18-2014 |