Patent application number | Description | Published |
20090161287 | ELECTRONIC DEVICE OPERABLE TO PROTECT A POWER TRANSISTOR WHEN USED IN CONJUNCTION WITH A TRANSFORMER - An electronic device can be used with a system, such as an ignition system, that operates a relatively high voltage. The device can include a signal clamping control module that can include a signal reference module and a feedback control module. The signal reference module is operable to provide a reference signal to the feedback control module. The feedback control can be configured to receive a scaled signal from a signal scaling module, wherein the scaled signal is representative of a signal at a current carrying electrode of a power transistor. Based on the comparison of the reference signal to the scaled signal, the measurement module provides one or more signals to a control signal drive module. The feedback control module provides a control electrode signal to a control electrode of the power transistor. | 06-25-2009 |
20110115527 | METHOD AND DETECTOR FOR DETERMINING A STATE OF A SWITCH - In an integrated circuit, a state of a switch coupled to the integrated circuit is determined by comparing a switch voltage at a first terminal of the switch to a reference voltage at a first time. If the switch voltage is higher than the reference voltage, the switch is determined to be in a first state. If the switch voltage is lower than the reference voltage, the switch voltage is stored in a storage element to produce a stored voltage. The stored voltage is compared to the switch voltage at a second time after the first time. A determination is made that the switch is in the first state if the switch voltage is higher than the stored voltage at the second time. A determination is made that the switch is in a second state if the switch voltage is not higher than the stored voltage at the second time. | 05-19-2011 |
20130328554 | VRS INTERFACE WITH 1/T ARMING FUNCTION - A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal. | 12-12-2013 |
20140035561 | VARIABLE RELUCTANCE SENSOR INTERFACE WITH INTEGRATION BASED ARMING THRESHOLD - An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described. | 02-06-2014 |
20150067429 | WAFER-LEVEL GATE STRESS TESTING - A method of testing a semiconductor device includes forming a test circuit over a semiconductor substrate. The test circuit includes a plurality of interconnects electrically connected to a set of device structures supported by the semiconductor substrate. A test, such as a gate stress or leakage current test, of each device structure is conducted with the test circuit. The plurality of interconnects are removed after conducting the test. | 03-05-2015 |
20150075401 | SQUIB DRIVER DIAGNOSTIC CIRCUIT AND METHOD - A diagnostic circuit is provided that includes a FET having a source connected to a first node, a drain, and a gate; a first switch connecting a current-supply node to one of the gate and a second node; a second switch connecting the first node and the second node; a variable current source providing one of a drive current and a test current to the current-supply node; a fire current source configured to provide a fire current to the drain; an error-detecting circuit connected to the second node, a reference terminal, and an error node, the error-detecting circuit generating an error signal to the error node indicating whether an error-detecting parameter at the second node exceeds a reference parameter at the reference terminal; and a control circuit generating control signals to control the variable current source, and the first and second switches. | 03-19-2015 |
20150198666 | SWITCH DETECTION DEVICE AND METHOD OF USE - A method of switch detection is disclosed that comprises, enabling a low power mode on a switch detection device, activating a first detection circuit for detecting, at a first expiration of a first polling time interval, a first switch state of a first switch having a first priority level, the first switch state including one of a first open state and a first closed state, comparing the detected first switch state with a prior first switch state, and activating a second detection circuit for detecting, at a second expiration of a second polling time interval, a second switch state of a second switch having a second priority level, the second switch including one of a second open state and a second closed state, and the second polling time interval being greater than the first polling time interval, and the second priority level being different from the first priority level. | 07-16-2015 |
20150243365 | ANTIFUSE WITH BYPASS DIODE AND METHOD THEREOF - The embodiments described herein provide antifuse devices and methods that can be utilized in a wide variety of semiconductor devices. In one embodiment a semiconductor device is provided that includes an antifuse, a first diode coupled with the antifuse in a parallel combination, and a second diode coupled in series with the parallel combination. In such an embodiment the first diode effectively provides a bypass current path that can reduce the voltage across the antifuse when other antifuses are being programmed. As such, these embodiments can provide improved ability to tolerate programming voltages without damage or impairment of reliability. | 08-27-2015 |