Patent application number | Description | Published |
20080197513 | BEOL INTERCONNECT STRUCTURES WITH IMPROVED RESISTANCE TO STRESS - A chip is provided which includes a back-end-of-line (“BEOL”) interconnect structure. The BEOL interconnect structure includes a plurality of interlevel dielectric (“ILD”) layers which include a dielectric material curable by ultraviolet (“UV”) radiation. A plurality of metal interconnect wiring layers are embedded in the plurality of ILD layers. Dielectric barrier layers cover the plurality of metal interconnect wiring layers, the dielectric barrier layers being adapted to reduce diffusion of materials between the metal interconnect wiring layers and the ILD layers. One of more of the dielectric barrier layers is adapted to retain compressive stress while withstanding UV radiation sufficient to cure the dielectric material of the ILD layers, making the BEOL structure better capable of avoiding deformation due to thermal and/or mechanical stress. | 08-21-2008 |
20080233366 | STRUCTURE AND METHOD FOR SiCOH INTERFACES WITH INCREASED MECHANICAL STRENGTH - Disclosed is a structure and method for forming a structure including a SiCOH layer having increased mechanical strength. The structure includes a substrate having a layer of dielectric or conductive material, a layer of oxide on the layer of dielectric or conductive material, the oxide layer having essentially no carbon, a graded transition layer on the oxide layer, the graded transition layer having essentially no carbon at the interface with the oxide layer and gradually increasing carbon towards a porous SiCOH layer, and a porous SiCOH (pSiCOH) layer on the graded transition layer, the porous pSiCOH layer having an homogeneous composition throughout the layer. The method includes a process wherein in the graded transition layer, there are no peaks in the carbon concentration and no dips in the oxygen concentration. | 09-25-2008 |
20080254643 | STRUCTURE TO IMPROVE ADHESION BETWEEN TOP CVD LOW-K DIELECTRIC AND DIELECTRIC CAPPING LAYER - An interconnect structure in which the adhesion between an upper level low-k dielectric material, such as a material comprising elements of Si, C, O, and H, and an underlying diffusion capping dielectric, such as a material comprising elements of C, Si, N and H, is improved by incorporating an adhesion transition layer between the two dielectric layers. The presence of the adhesion transition layer between the upper level low-k dielectric and the diffusion barrier capping dielectric can reduce the chance of delamination of the interconnect structure during the packaging process. The adhesion transition layer provided herein includes a lower SiO | 10-16-2008 |
20090181544 | METHOD FOR PREVENTING BACKSIDE DEFECTS IN DIELECTRIC LAYERS FORMED ON SEMICONDUCTOR SUBSTRATES - A method of forming a TEOS oxide layer over an nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer formed on a substrate. The method includes forming the nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide layer on a top surface and a top side beveled edge proximate to the top surface of a substrate; removing or preventing formation of a carbon-rich layer on a bottom side bevel edge region proximate to a bottom surface of the substrate or converting the carbon-rich layer to nitrogen doped silicon carbide or nitrogen doped hydrogenated silicon carbide; and forming the TEOS oxide layer on the top surface, the top side beveled edge and the bottom side bevel edge region of the substrate. | 07-16-2009 |
20090239374 | Methods of Forming Metal Interconnect Structures on Semiconductor Substrates Using Oxygen-Removing Plasmas and Interconnect Structures Formed Thereby - Methods of forming devices include forming a first electrically insulating layer having a metal interconnection therein, on a substrate and then forming a first electrically insulating barrier layer on an upper surface of the metal interconnection and on the first electrically insulating layer. The first electrically insulating barrier layer is exposed to a plasma that penetrates the first electrically insulating barrier and removes oxygen from an upper surface of the metal interconnection. The barrier layer may have a thickness in a range from about 5 Å to about 50 Å and the plasma may be a hydrogen-containing plasma that converts oxygen on the upper surface of the metal interconnection to water. | 09-24-2009 |
20100028695 | LOW k DIELECTRIC CVD FILM FORMATION PROCESS WITH IN-SITU IMBEDDED NANOLAYERS TO IMPROVE MECHANICAL PROPERTIES - A low k dielectric stack having an effective dielectric constant k, of about 3.0 or less, in which the mechanical properties of the stack are improved by introducing at least one nanolayer into the dielectric stack. The improvement in mechanical properties is achieved without significantly increasing the dielectric constant of the films within the stack and without the need of subjecting the inventive dielectric stack to any post treatment steps. Specifically, the present invention provides a low k dielectric stack that comprises at least one low k dielectric material and at least one nanolayer present within the at least one low k dielectric material. | 02-04-2010 |
20130110448 | Metrology Management | 05-02-2013 |
Patent application number | Description | Published |
20120325840 | Invertible Dispenser for Pizza Boxes of Multiple Sizes - A stacker, dispenser, and carrier for pizza boxes has a rectangular parallelepiped formed with a front opening for withdrawing boxes and a rear opening for temporarily sliding the lowermost box off stops on which the stack is mounted. The lowermost box can be pushed rearward through the opening, have its front lowered, and than be withdrawn through the frontal opening of the box. A resilient band across the rear opening allows passage of the lowermost box therethrough only in response to pressure exerted during removal of the lowermost box from the stack. | 12-27-2012 |
20120325841 | Pizza Box Stacker, Carrier and Dispenser - A stacker, dispenser, and carrier for pizza boxes has a rectangular parallelepiped formed with a front opening for withdrawing boxes and a rear opening for temporarily sliding the lowermost box off stops on which the stack is mounted. The lowermost box can be pushed rearward through the opening, have its front lowered, and than be withdrawn through the frontal opening of the box. A vertical window shows the height of the stack so that there is no room to add more boxes. | 12-27-2012 |
20120325842 | Pizza Box Stacker, Carrier and Dispenser - A stacker, dispenser, and carrier in the form of a container for pizza boxes has a rectangular parallelepiped formed with a front opening for withdrawing boxes, a front support and a rear support on which the boxes are rested and a fulcrum for tilting the lowermost box to separate it from the box immediately above for reducing friction as the lowermost box is withdrawn. In one embodiment, the container has a rear opening for sliding the lowermost box off the front support as it is pushed rearward through the opening, the rear support serving as a fulcrum for lowering the front of the box which can then be withdrawn through the front opening of the container. In another embodiment, the container has a ramp in the rear for urging the lowermost box onto the rear support and partially extended through the opening in the container. Here the front support serves as a fulcrum for lowering the front of the box which can then be withdrawn through the front opening of the container. | 12-27-2012 |
Patent application number | Description | Published |
20100192709 | System and Method of Generating Atmospheric Turbulence for Testing Adaptive Optical Systems - A system and method for simulating atmospheric turbulence for testing optical components. A time varying phase screen representing atmospheric turbulence is generated using Karhunen-Loeve polynomials and a splining technique for generating temporal functions of the noise factor for each Zernike mode. The phase screen is input to a liquid crystal spatial light modulator. A computer display allows the user to set geometric characteristics, and select between methods for generating atmospheric turbulence including Karhunen-Loeve polynomials, Zernike polynomials, and Frozen Seeing. | 08-05-2010 |
20120242831 | Extended Source Wavefront Sensor through Optical Correlation - An atmospheric aberration sensor that uses two optically correlated images of a scene and the Fourier transform capabilities of a lens or other focusing element. The sensor receives light via an f-number matching element from a scene or from an external optical system and transmits it through a focusing optical element to an updateable display element such as a spatial light modulator or micro mirror array, which modulates the real time image from the focusing element with previous template image of the same extended scene. The modulated image is focused onto an autocorrelation detection sensor, which detects a change in centroid position corresponding to a change of the tip/tilt in the optical path. This peak shift is detected by centroid detection and corresponds to the magnitude of global wavefront tip/tilt. With a lenslet array and detector array, the system can also measure local tip/tilt and higher order aberrations. | 09-27-2012 |
20130201542 | Adaptive Optical System Testbed with Karhunen-Loeve Polynomial Based Method for Simulating Atmospheric Turbulence - A system and method for simulating atmospheric turbulence for testing optical components. A time varying phase screen representing atmospheric turbulence is generated using Karhunen-Loeve polynomials and a splining technique for generating temporal functions of the noise factor for each Zernike mode. The phase screen is input to a liquid crystal spatial light modulator. A computer display allows the user to set geometric characteristics, the severity of the turbulence to be simulated, and to select between methods for generating atmospheric turbulence including Karhunen-Loeve polynomials, Zernike polynomials, and Frozen Seeing. | 08-08-2013 |