Patent application number | Description | Published |
20120097975 | Nitride-Based Semiconductor Substrates Having Hollow Member Pattern And Methods Of Fabricating The Same - A nitride-based semiconductor substrate may includes a plurality of hollow member patterns arranged on a substrate, a nitride-based seed layer formed on the substrate between the plurality of hollow member patterns, and a nitride-based buffer layer on the nitride-based seed layer so as to cover the plurality of hollow member patterns, wherein the plurality of hollow member patterns contact the substrate in a first direction and both ends of each of the plurality of hollow member patterns are open in the first direction. | 04-26-2012 |
20130105869 | METHOD OF FORMING GROUP III-V MATERIAL LAYER, SEMICONDUCTOR DEVICE INCLUDING THE GROUP III-V MATERIAL LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR LAYER | 05-02-2013 |
20130105946 | SEMICONDUCTOR DEVICE INCLUDING GROUP III-V COMPOUND SEMICONDUCTOR LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE | 05-02-2013 |
20130119347 | SEMICONDUCTOR DEVICE INCLUDING GROUP III-V BARRIER AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE - A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well. | 05-16-2013 |
20130119507 | SEMICONDUCTOR DEVICE USING GROUP III-V MATERIAL AND METHOD OF MANUFACTURING THE SAME - Semiconductor devices using a group III-V material, and methods of manufacturing the same, include a substrate having a groove, a group III-V material layer filling in the groove and having a height the same as a height of the substrate, a first semiconductor device on the group III-V material layer, and a second semiconductor device on the substrate near the groove. The group III-V material layer is spaced apart from inner side surfaces of the groove. | 05-16-2013 |
20130341595 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening. | 12-26-2013 |
20140191252 | COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE, OPTICAL APPARATUS INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - A complementary metal oxide semiconductor (CMOS) device includes an n-type first transistor on a silicon substrate, the n-type first transistor including a Group III-V compound semiconductor substrate, and a p-type second transistor on the silicon substrate, the p-type second transistor including a germanium based substrate. | 07-10-2014 |
20140299885 | SUBSTRATE STRUCTURES AND SEMICONDUCTOR DEVICES EMPLOYING THE SAME - A substrate structure includes a substrate, a nucleation layer on the substrate and including a group III-V compound semiconductor material having a lattice constant that is different from that of the substrate by less than 1%, and a buffer layer on the nucleation layer and including first and second layers, wherein the first and second layers include group III-V compound semiconductor materials having lattice constants that are greater than that of the nucleation layer by 4% or more. | 10-09-2014 |
20150028458 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device is provided that includes a diffusion barrier layer between a compound semiconductor layer and a dielectric layer, as well as a method of fabricating the semiconductor device, such that the semiconductor device includes a compound semiconductor layer; a dielectric layer; and a diffusion barrier layer including an oxynitride formed between the compound semiconductor layer and the dielectric layer. | 01-29-2015 |
20150041764 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening. | 02-12-2015 |
20150061088 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer. | 03-05-2015 |
20150069517 | COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. In the CMOS device, a buffer layer is disposed on a silicon substrate, and a first layer including a group III-V material is disposed on the buffer layer. A second layer including a group IV material is disposed on the buffer layer or the silicon substrate while being spaced apart from the first layer. | 03-12-2015 |
20150200285 | SEMICONDUCTOR DEVICE INCLUDING A GATE ELECTRODE ON A PROTRUDING GROUP III-V MATERIAL LAYER AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE - A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well. | 07-16-2015 |
20150255592 | SEMICONDUCTOR DEVICE INCLUDING A GATE ELECTRODE ON A PROTRUDING GROUP III-V MATERIAL LAYER AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE - A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well. | 09-10-2015 |
20150303114 | COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE, OPTICAL APPARATUS INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME - A complementary metal oxide semiconductor (CMOS) device includes an n-type first transistor on a silicon substrate, the n-type first transistor including a Group III-V compound semiconductor substrate, and a p-type second transistor on the silicon substrate, the p-type second transistor including a germanium based substrate. | 10-22-2015 |
Patent application number | Description | Published |
20090095981 | Complementary metal oxide semiconductor device and method of manufacturing the same - Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. The CMOS device comprises an epi-layer that may be formed on a substrate; a first semiconductor layer and a second semiconductor layer that may be formed on different regions of the epi-layer, respectively; and a PMOS transistor and a NMOS transistor that may be formed on the first and second semiconductor layers, respectively. | 04-16-2009 |
20110114915 | Light emitting device and method of fabricating the same - A light emitting device may include a plurality of nano-structures having a strip shape, each including a first nano-structure and a second nano-structure, the first nano-structures being the same height on the buffer layer. | 05-19-2011 |
20130333202 | Method for Manufacturing High Frequency Inductor - Disclosed herein is a method for manufacturing a high frequency inductor, the method including; forming a primary coil for manufacturing the high frequency inductor on a wafer; coating a primary PSV on the wafer on which the primary coil is formed; forming a secondary coil for manufacturing the high frequency inductor, after the coating of the primary PSV; coating a secondary PSV, after the forming of the secondary coil; forming a barrier layer on an electrode portion to be exposed of the high frequency inductor, after the coating of the secondary PSV; filling and curing an insulating resin on the wafer, after the forming of the barrier layer; and polishing the cured resin up to the barrier layer to expose the electrode. | 12-19-2013 |
20140002231 | COMMON MODE NOISE FILTER | 01-02-2014 |
20140028430 | MULTILAYER INDUCTOR AND PROTECTING LAYER COMPOSITION FOR MULTILAYER INDUCTOR - Disclosed herein are a multilayer inductor including a protecting layer including an inorganic filler having different stretching ratios in traverse and mechanical directions or an inorganic filler coated with a color former, and a protecting layer composition of a multilayer inductor, including 10 to 30 parts by weight of an inorganic filler having different stretching ratios in traverse and mechanical directions, and 10 to 30 parts by weight of a dispersant, based on 100 parts by weight of an epoxy resin, so that thermal deformation of an inductor chip can be reduced by including the inorganic filler having different stretching ratios in traverse and machine directions in the outermost insulating layer of the multilayer inductor, thereby reducing change in external appearance due to heat, thereby providing a multilayer inductor securing reliability. | 01-30-2014 |
20140035714 | FERRITE POWDER, METHOD FOR PREPARING THE SAME, AND COMMON MODE NOISE FILTER INCLUDING THE SAME AS MATERIAL FOR MAGNETIC LAYER - Disclosed herein are a ferrite powder not including pores in a surface thereof, a method for preparing the same, and a common mode noise filter including the same as a material for a magnetic layer. The spherical ferrite powder in which the pores in the surface thereof are removed as a magnetic layer of the common mode noise filter has high density, such that dispersibility is improved, thereby making it possible to improve adhesive strength with a polymer binder to be mixed. In addition, the adhesive strength between the polymer binder and the ferrite powder is improved, such that at the time of manufacturing or mounting of a chip, a defect such as a crack generated by a thermal impact due to a lack of adhesive strength between the ferrite powder and the polymer binder may be suppressed, thereby securing the reliability with respect to the thermal impact. | 02-06-2014 |
20140062637 | Common Mode Filter With ESD Protection Pattern Built Therein - Disclosed herein is a common mode filter with an ESD protection pattern built therein. The common mode filter includes a base substrate that is made of an insulating material, a first insulating layer that is formed on the base substrate, a coil-shaped internal electrode that is formed on the first insulating layer, a second insulating layer that is formed on the internal electrode, a first external electrode terminal that is formed on the second insulating layer, a first ferrite resin layer that is formed on the second insulating layer and receives the first external electrode terminal, an ESD protection pattern that is formed on the first external electrode terminal, a second external electrode terminal that is formed on the ESD protection pattern, and a second ferrite resin layer that is formed on the first ferrite resin layer and receives the second external electrode terminal. | 03-06-2014 |
20140105803 | METHOD FOR PREPARING CATALYST FOR REMOVING NITROGEN OXIDES USING DRY BALL MILLING - Disclosed is a method for preparing a deNOx catalyst for removing nitrogen oxides (NOx) included in exhaust gas and the like. One embodiment of the present invention discloses a V | 04-17-2014 |
20140132366 | FILTER CHIP ELEMENT AND METHOD OF PREPARING THE SAME - Disclosed herein is a filter chip element including a ferrite substrate, internal coil patterns formed on the ferrite substrate; and a ferrite composite layer filled between the internal coil patterns formed on the ferrite substrate, wherein the ferrite composite layer includes foaming resin, thereby increasing magnetic permeability and a Q value which are important characteristics of a filter chip element for noise prevention among electromagnetic shielding components. | 05-15-2014 |
20140145797 | COMMON MODE NOISE CHIP FILTER AND METHOD FOR MANUFACTURING THE SAME - Disclosed herein are a common mode noise chip filter and a method for manufacturing the same, the common mode noise chip filter including: a ferrite substrate; coil patterns formed on the ferrite substrate; and a ferrite-polymer complex layer formed on the result substrate having the coil patterns formed therein, wherein the ferrite-polymer complex layer has a multilayer structure, so that the ferrite-polymer complex layer filling an inner space of the substrate having inner coil patterns is formed to have the multilayer structure but not a single-layer structure, thereby lowering internal stress, and thus improving reliability of the common mode noise chip filter as a product. | 05-29-2014 |
20140145814 | THIN FILM TYPE CHIP DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a thin film type chip device including a coil pattern formed on the substrate; a cavity defining pattern defining a cavity through which a part of the coil pattern is exposed; a filling layer filled in the cavity; and a magnetic layer including a surface layer covering a surface of the filling layer. | 05-29-2014 |
20140159565 | ELECTROSTATIC DISCHARGING STRUCTURE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are an electrostatic discharging structure including single-wall carbon nano tubes disposed between electrodes at a predetermined interval to precisely control discharge starting voltage generating a discharge phenomenon between electrodes, and a method of manufacturing an electrostatic discharging structure. | 06-12-2014 |
20140159849 | ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME - Disclosed herein are an electronic component and a method of manufacturing the same. In the electronic component having a hexahedral shape and including an insulating portion formed on an upper part of a base substrate, a coil pattern portion formed in the insulating portion and wound with a conductive wire, and a plurality of external electrodes separated from each other and electrically connected with the coil pattern portion, each external electrode covers a part of an upper surface of the insulating portion and extending to an upper surface of the electronic component and a region between the external electrodes is provided with a ferrite block covering an exposed surface of the insulating portion, thereby improving magnetic permeability as compared with the electronic component of the related art. | 06-12-2014 |
20140203900 | COMMON MODE FILTER AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a common mode filter including: a magnetic substrate; an electrode layer disposed on one surface of the magnetic substrate and formed of a coil electrode and an insulating resin enclosing the coil electrode; and an uneven layer disposed between the magnetic substrate and the electrode and formed of a groove and a projection, wherein a part of the insulating resin is depressed between the groove of the uneven layer, whereby an adhesion between the magnetic substrate and the insulating resin is increased. | 07-24-2014 |
20140301002 | ESD PROTECTION MATERIAL AND ESD PROTECTION DEVICE USING THE SAME - Disclosed herein are an electrostatic discharge protection material for improving connectivity between conductive particles dispersed in a resin matrix and evenly distributing the conductive particles in the resin material, and an electrostatic discharge protection device using the same. The electrostatic discharge protection material includes a resin matrix; needle-shaped conductive particles dispersed in the resin matrix; and dispersion particles dispersed in the resin matrix, wherein the dispersion particles are located between the needle-shaped conductive particles. | 10-09-2014 |
20140321009 | ESD PROTECTION MATERIAL AND ESD PROTECTION DEVICE USING THE SAME - Disclosed herein is an electrostatic discharge protection material having more stable operation characteristic by mixing and dispersing inorganic particles and metal particles in a resin matrix and an electrostatic discharge protection device using the same. | 10-30-2014 |
20140333404 | COIL COMPONENT - Disclosed herein is a coil component including: an insulating layer containing a ferrite powder and a coil electrode embedded in the insulating layer, in which a particle diameter of the ferrite powder is smaller than a wavelength of light which is used during an exposure process, thereby increasing permeability and improving an impedance characteristic. | 11-13-2014 |
20150115321 | SUBSTRATE STRUCTURE, COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE - A substrate structure, a complementary metal oxide semiconductor (CMOS) device including the substrate structure, and a method of manufacturing the CMOS device are disclosed, where the substrate structure includes: a substrate, at least one seed layer on the substrate formed of a material including boron (B) and/or phosphorus (P), and a buffer layer on the seed layer. This substrate structure makes it possible to reduce the thickness of the buffer layer and also improve the performance characteristics of a semiconductor device formed with the substrate structure. | 04-30-2015 |
20150294785 | COMMON MODE FILTER AND METHOD OF MANUFACTURING THE SAME - The present invention relates to a common mode filter and a method of manufacturing the same. In order to implement a common mode filter with low shrinkage, high substrate sintered density, and high strength, the present invention provides a common mode filter including: a lower substrate; an insulating layer having a conductor pattern inside and provided on the lower substrate; an upper substrate provided on the insulating layer; and a ferrite core made of ferrite and provided in the center of the insulating layer, the lower substrate, and the upper substrate by penetrating the insulating layer, the lower substrate, and the upper substrate, and a method of manufacturing the same. | 10-15-2015 |