Patent application number | Description | Published |
20080204432 | PORTABLE COMPUTER - Disclosed is a portable computer with improved transception sensitivity to radio wave data. The portable computer includes an antenna for transceiving radio wave data. The antenna is disposed opposite to a display panel driver, a display region of the portable computer interposed therebetween. | 08-28-2008 |
20100125829 | COMPONENT-BASED WEB APPLICATION DEVELOPMENT FRAMEWORK USED FOR CREATING WEB PAGE - The present invention relates to a user interface server framework and a method of using the framework, which supports a user interface developer to develop a final user interface based on components. The component-based web application development framework used for creating a web page comprises a runtime engine for executing a method of a business object and returning a result of executing the method in response to a user's request; a script component for performing a preprocessing on a user input value before executing the method of the business object, performing a post-processing on the result of executing the method after executing the method of the business object, and dynamically arranging a user interface object; and a core component for initializing the framework and confirming whether the user's request can be processed in the framework. | 05-20-2010 |
20130193984 | TEST APPARATUSES FOR MEASURING ELECTROMAGNETIC INTERFERENCE OF IMAGE SENSOR INTEGRATED CIRCUIT DEVICES - A test apparatus for measuring electromagnetic interference (EMI) of an image sensor integrated circuit (IC) device may include an EMI test jig configured to drive a mounted image sensor IC device on one or more test conditions; an electromagnetic (EM) shielding box configured to shield external EM waves from other directions except an upper direction, the EM shielding box accepting the EMI test jig; an EM emission sensing probe configured to sense EM emissions from the image sensor IC device, the EM emission sensing probe being separated from and adjacent to the image sensor IC device in the upper direction when sensing EM emissions; and a spectrum analyzer configured to connect to the EM emission sensing probe, the spectrum analyzer configured to evaluate the EM emissions from the image sensor IC device. | 08-01-2013 |
20140160696 | DISPLAY MODULE WITH DUAL POWER LINES - A display module includes a display panel, a driver integrated circuit, a flexible printed circuit (FPC), a drive signal wiring and a power wiring. The driver integrated circuit applies power and a drive signal to the display panel. The FPC is electrically connected between the driver integrated circuit and a PCB. The drive signal wiring is extended from the FPC to the display panel through the driver integrated circuit and may transmit the drive signal to the display panel. The power wiring transmits the power to the display panel. The power wiring includes a first power line extended from the FPC to the driver integrated circuit, and a second power line extended from the first power line to the display panel. The second power line does not intersect the drive signal wiring, and a ground slit is not generated. | 06-12-2014 |
Patent application number | Description | Published |
20080274679 | SHEET METAL FINISHED BY CONTINUOUS HAIR-LINE ON ITS PLANE AND CURVED SURFACE AND APPARATUS AND METHOD FOR FINISHING BY CONTINUOUS HAIR-LINE ON THE SAME - A hair-line processing, and more particularly a sheet metal finished by continuous hair-line on its plane and curved surface, and apparatus and method for finishing by continuous hair-line on the same are disclosed, wherein the sandpaper curvaceously advances to form hairlines relative to curved surface of the sheet metal, and operation of a pressure unit can vary the curvaceous degree of the sandpaper to form a continuous hairline relative a sheet metal including curved surfaces each having a different curvature. | 11-06-2008 |
20090001724 | METHOD AND APPARATUS FOR CONTROLLING VERTICAL AXIS WIND POWER GENERATION SYSTEM - Provided are an apparatus and method for controlling a vertical axis wind power generation system that controls the rotation of guide vanes according to wind direction and speed, appropriately controls a direction of wind passing over an impeller, thereby maintaining a rotational speed generating the maximum power, maintains output power of a generator as rated power according to wind direction and speed, and stops the generator when a low or high wind speed outside a setting value range, an error in a structure, a fault in a braking unit, and/or a fault in guide vanes is detected. | 01-01-2009 |
20100296913 | WIND POWER GENERATING SYSTEM WITH VERTICAL AXIS JET WHEEL TURBINE - A wind power generating system that is a technology for converting wind energy to electrical energy is provided. The system blocks flow of air inside the impeller, so that a high speed jet pressure on an I.G.V. (inlet guide vane) is converted to a constant pressure between the blades disposed downstream of the flow which has passed through the inlet guide vane, thus generating a large amount of torque. | 11-25-2010 |
20150116841 | ELECTRONIC DEVICE - An exemplary embodiment of the present inventive concept discloses an electronic device, including a display, a body to which the display is attached, wherein the body is coated with a meta-material, the meta-material configured to divert an electromagnetic wave based on refraction characteristics, and a display-cover that blocks the display from outside when the display is turned off, wherein the display-cover is coated with the meta-material. | 04-30-2015 |
20150129851 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - An organic light emitting display device includes a first substrate, a thin film transistor disposed on the first substrate, a first electrode electrically coupled to the thin film transistor, a pixel defining layer disposed on the first substrate and the first electrode to define unit pixels, a plurality of organic light emitting structure disposed on the first electrode, where in the organic light emitting structure includes a first organic light emitting structure, a second organic light emitting structure and a third light emitting structure, a second electrode which covers the first through third organic light emitting structures and the pixel defining layer; a metamaterial layer disposed on the second electrode corresponding to the organic light emitting structures, an encapsulation member which covers the second electrode and the metamaterial layer, and a second substrate disposed on the encapsulation member opposite to the first substrate. | 05-14-2015 |
20150192951 | DISPLAY DEVICE - A display device is disclosed. In one aspect, the display device comprises a display panel, a window, a plurality of partitions, and an adhesive. The display panel is configured to display an image. The window is placed over the display panel. The plurality of partitions interposed between the display panel and the window. The adhesive is formed between adjacent partitions. | 07-09-2015 |
Patent application number | Description | Published |
20130321364 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND DRIVING METHOD THEREOF - An organic light emitting display device includes pixels at intersection regions of scan and data lines, a scan driver configured to supply a scan signal to the scan lines, a data driver configured to supply a data signal to the data lines, and a timing controller configured to receive from outside frame data including left and right image data, and to insert first blank periods into initial and latter periods of a same frame, the left and right image data being between the initial and latter periods of the same frame. | 12-05-2013 |
20140139557 | DISPLAY APPARATUS AND CONTROL METHOD FOR SAVING POWER THEREOF - In a method and a device for controlling luminance of a display unit to save power of a display device including the display unit for displaying on a screen, the method includes: calculating a second luminance to which the luminance of the display unit is to be changed considering a first luminance that is a current luminance of the display unit and a constant K determined according to Weber's law; and changing the luminance of the display unit to the second luminance. | 05-22-2014 |
20140292672 | POWER-SAVING DISPLAY DEVICE - A display device includes a display panel including a plurality of first sensing lines that extend in a first direction, and a plurality of second sensing lines that extend in a second direction, a first position selector and a second position selector at an edge of the display panel, and spaced apart from each other in the first direction, and a third position selector and a fourth position selector at or above the display panel, and spaced apart from each other in the second direction, wherein an activated region of the display panel corresponds to respective positions of the first position selector, the second position selector, the third position selector, and the fourth position selector | 10-02-2014 |
20140293024 | FOLDABLE DISPLAY AND METHOD AND APPARATUS FOR CONTROLLING THE SAME - A foldable display and a method and apparatus for controlling the foldable display are disclosed. In one aspect, the apparatus includes a display device including a first display panel and a second display panel disposed on the first display panel, wherein the first and second display panels are folded along a first axis. The apparatus also includes a recognizer for recognizing folding of at least one of the first and second display panels and a display controller for controlling a display operation of the display device according to the recognized folding. | 10-02-2014 |
20150085384 | DISPLAY APPARATUS - A display apparatus including a display unit including at least one pixel area and a non-pixel area, the non-pixel area dividing the at least one pixel area; and a metamaterial structure that controls a path of light emitted from the at least one pixel area. | 03-26-2015 |
20150091413 | FLEXIBLE DISPLAY DEVICE - A flexible display device includes a display panel having pliability and a dielectric elastomer unit on the display panel. The dielectric elastomer unit is reversibly deformable by an applied voltage to provide stiffness to the display panel. | 04-02-2015 |
Patent application number | Description | Published |
20090073736 | SEMICONDUCTOR DEVICE HAVING STORAGE NODES ON ACTIVE REGIONS AND METHOD OF FABRICATING THE SAME - A semiconductor device includes an active region in a semiconductor substrate, having first, second and third regions sequentially arranged in the active region. An inactive region in the semiconductor substrate defines the active region. Gate patterns, partially buried in the active and inactive regions, are positioned between the first and second regions or between the second and third regions, intersecting the active region at right angles. A bit line pattern intersects the gate patterns at right angles and overlaps the inactive region, the bit line pattern including a region electrically connected to the second region of the active region. An interlayer insulating layer covers the gate patterns. Storage nodes on the interlayer insulating layer are electrically connected to the active region. A first storage node overlaps the first region and the inactive region and a second storage node overlaps the third region, the inactive region and the bit line pattern. | 03-19-2009 |
20090261422 | CELL STRUCTURE OF SEMICONDUCTOR DEVICE - A cell structure of a semiconductor device includes an active region, having a concave portion, and an inactive region that defines the active region. A gate pattern in the active region is arranged perpendicular to the active region. A landing pad on the active region and the inactive region contacts the active region. A bit line pattern on the inactive region intersects the gate pattern perpendicularly, the bit line pattern being electrically connected to the landing pad and having a first protrusion corresponding to the concave portion of the active region. | 10-22-2009 |
20110186923 | SEMICONDUCTOR MEMORY DEVICE HAVING VERTICAL CHANNEL TRANSISTOR AND METHOD FOR FABRICATING THE SAME - Channels of two transistors are vertically formed on portions of two opposite side surfaces of one active region, and gate electrodes are vertically formed on a device isolation layer contacting the channels of the active region. A common bit line contact plug is formed in the central portions of the active region, two storage node contact plugs are formed on both sides of the bit line contact plug, and an insulating spacer is formed on a side surface of the bit line contact plug. A word line, a bit line, and a capacitor are sequentially stacked on the semiconductor substrate, like a conventional semiconductor memory device. Thus, effective space arrangement of a memory cell is possible such that a 4F | 08-04-2011 |
20120273898 | SEMICONDUCTOR MEMORY DEVICE HAVING VERTICAL CHANNEL TRANSISTOR AND METHOD FOR FABRICATING THE SAME - Channels of two transistors are vertically formed on portions of two opposite side surfaces of one active region, and gate electrodes are vertically formed on a device isolation layer contacting the channels of the active region. A common bit line contact plug is formed in the central portions of the active region, two storage node contact plugs are formed on both sides of the bit line contact plug, and an insulating spacer is formed on a side surface of the bit line contact plug. A word line, a bit line, and a capacitor are sequentially stacked on the semiconductor substrate, like a conventional semiconductor memory device. Thus, effective space arrangement of a memory cell is possible such that a 4F | 11-01-2012 |
Patent application number | Description | Published |
20110117721 | METHOD OF FORMING ISOLATION LAYER STRUCTURE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING THE SAME - An isolation layer structure includes first to fourth oxide layer patterns. The first and third oxide layer patterns are sequentially formed in a first trench defined by a first recessed top surface of a substrate and sidewalls of gate structures on the substrate in a first region. The first trench has a first width, and the first and third oxide layer patterns have no void therein. The second and fourth oxide layer patterns are sequentially formed in a second trench defined by a second recessed top surface of the substrate and sidewalls of gate structures on the substrate in a second region. The second trench has a second width larger than the first width, and the fourth oxide layer pattern has a void therein. | 05-19-2011 |
20110298036 | ISOLATION LAYER STRUCTURE, METHOD OF FORMING THE SAME AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING THE SAME - An isolation layer structure includes first to fourth oxide layer patterns. The first and third oxide layer patterns are sequentially formed in a first trench defined by a first recessed top surface of a substrate and sidewalls of gate structures on the substrate in a first region. The first trench has a first width, and the first and third oxide layer patterns have no void therein. The second and fourth oxide layer patterns are sequentially formed in a second trench defined by a second recessed top surface of the substrate and sidewalls of gate structures on the substrate in a second region. The second trench has a second width larger than the first width, and the fourth oxide layer pattern has a void therein. | 12-08-2011 |
20120007165 | SEMICONDUCTOR DEVICES - A semiconductor device includes a substrate, a plurality of gate structures, a first insulating interlayer pattern, and a second insulation layer pattern. The substrate has an active region and a field region, each of the active region and the field region extends in a first direction, and the active region and the field region are alternately and repeatedly arranged in a second direction substantially perpendicular to the first direction. The gate structures are spaced apart from each other in the first direction, each of the gate structures extends in the second direction. The first insulation layer pattern is formed on a portion of a sidewall of each gate structure. The second insulation layer pattern covers the gate structures and the first insulation layer pattern, and has an air tunnel between the gate structures, the air tunnel extending in the second direction. | 01-12-2012 |
20120156848 | METHOD OF MANUFACTURING NON-VOLATILE MEMORY DEVICE AND CONTACT PLUGS OF SEMICONDUCTOR DEVICE - A method of manufacturing a non-volatile memory device includes alternately stacking interlayer sacrificial layers and interlayer insulating layers on a substrate, forming first openings exposing the substrate, forming sidewall insulating layers on sidewalls of the first openings, and forming channel regions on the sidewall insulating layers. The first openings penetrate the interlayer sacrificial layers and the interlayer insulating layers. The sidewall insulating layers have different thicknesses according to distances from the substrate. | 06-21-2012 |