Patent application number | Description | Published |
20090116510 | HIGH FREQUENCY COMMUNICATION DEVICE WITH MINIMAL OFF CHIP COMPONENTS - A high frequency (HF) communication device includes an antenna structure, an integrated circuit (IC), and an off-chip duplexer. The IC includes a receiver section and a transmitter section. The receiver section is operable in a receive portion of a first frequency band to support multiple communication protocols and converts a filtered inbound HF signal into a down converted inbound signal in accordance with the multiple communication protocols. The transmitter section is operable in a transmit portion of the first frequency band to support the multiple communication protocols, converts an outbound signal into a first up converted signal when a first one of the multiple communication protocols is active, and converts the outbound signal into a second up converted signal when a second one of the multiple communication protocols is active. The off-chip multiple protocol duplexer is coupled to filter the inbound HF signal to produce the filtered inbound HF signal and to filter the second up converted signal to produce the outbound HF signal when the second one of the multiple communication protocols is active. | 05-07-2009 |
20090117938 | IC FOR A HIGH FREQUENCY COMMUNICATION DEVICE WITH MINIMAL OFF CHIP COMPONENTS - An integrated circuit (IC) includes a receiver module, a transmitter module, an inbound digital module, and a local oscillation generation module. The receiver module is operable to convert an inbound high frequency signal into a down converted inbound signal based on a receive local oscillation independently of a protocol of the inbound high frequency signal. The inbound digital module is coupled to compensate the down converted inbound signal in accordance with a selected one of the first plurality of wireless communication protocols. The transmitter module is operable to convert a first outbound signal into a first up converted signal based on a transmit local oscillation when a first one of the first plurality of wireless communication protocols is active and to convert a second outbound signal into a second up converted signal based on the transmit local oscillation when a second one of the first plurality of wireless communication protocols is active. | 05-07-2009 |
20090191825 | CONFIGURABLE RF TRANSMITTER - An RF transmitter includes a Cartesian to polar conversion section, a PLL, a DAC module, a mixing module, and a PA module. The Cartesian to polar conversion section converts a Cartesian based symbol stream into a polar based symbol stream. The PLL generates an oscillation when the RF transmitter is in a Cartesian mode or a phase modulated oscillation based on phase modulation information of the polar based symbol stream when the RF transmitter is in a polar mode. The mixing module mixes an analog Cartesian based signal with a local oscillation to produce a Cartesian based up converted signal when the RF transmitter is in the Cartesian mode and mixes an analog amplitude signal with a phase modulated local oscillation to produce a polar based up converted signal when the RF transmitter is in the polar mode. The PA module amplifies the Cartesian based up converted signal to produce an outbound RF signal when the RF transmitter is in the Cartesian mode and amplifies the polar based up converted signal to produce the outbound RF signal when the RF transmitter is in the polar mode. | 07-30-2009 |
20090251207 | ENHANCED POLAR MODULATOR FOR TRANSMITTER - Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two pint modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±π/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +π (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics. | 10-08-2009 |
20090251231 | POLAR FEEDBACK ARCHITECTURE - Polar feedback architecture. A polar modulator, as may be implemented within a transmitter module, of a communication device includes feedback. This feedback involves monitoring of phase information and magnitude/amplitude information of an output signal generated by the polar modulator. The output signal can be a radio frequency (RF) signal such as may be transmitted via a communication channel within a communication system. A baseband processing module processes the monitored phase information and magnitude/amplitude information to perform adjustment of a phase modulator and/or other components within the polar modulator. | 10-08-2009 |
20090253390 | WCDMA TRANSMIT ARCHITECTURE - Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain. | 10-08-2009 |
20090280756 | RF INTEGRATED CIRCUIT WITH TRANSMITTER AND MULTIPURPOSE OUTPUT PORTS AND METHODS FOR USE THEREWITH - An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a code divisional multiple access format and at least one non-code division multiple access format. | 11-12-2009 |
20100136935 | METHOD AND SYSTEM FOR WCDMA POWER AMPLIFIER CLOSED LOOP POWER CONTROL - Methods and systems for WCDMA power amplifier closed loop power control are disclosed and may include determining a magnitude of an output RF signal generated by a power amplifier (PA), and configuring a gain of a PGA coupled to an input of the PA via closed-loop feedback to maintain a desired magnitude of the output RF signal. The closed-loop feedback architecture may include a slot-based and/or a real time-based control. A signal proportional to the output signal may be generated by an envelope detector. The signal generated by the envelope detector may be utilized to generate a root-mean-squared (RMS) value. The gain of the PGA may be configured by comparing the RMS value to a desired magnitude of the output signal over a time slot and/or utilizing a real time error signal generated by subtracting the signal proportional to the magnitude of the output signal from a desired magnitude. | 06-03-2010 |
20100271089 | Enhanced polar modulator for transmitter - Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±π/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +π (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics. | 10-28-2010 |
20100291886 | Polar feedback architecture - Polar feedback architecture. A polar modulator, as may be implemented within a transmitter module, of a communication device includes feedback. This feedback involves monitoring of phase information and magnitude/amplitude information of an output signal generated by the polar modulator. The output signal can be a radio frequency (RF) signal such as may be transmitted via a communication channel within a communication system. A baseband processing module processes the monitored phase information and magnitude/amplitude information to perform adjustment of a phase modulator and/or other components within the polar modulator. | 11-18-2010 |
20100322345 | METHOD AND SYSTEM FOR BANDWIDTH CALIBRATION FOR A PHASE LOCKED LOOP (PLL) - Aspects of a method and system for bandwidth calibration for a phase locked loop are presented. Aspects of the method may include generating one or more carrier signals based on one or more corresponding calibration signals. A pre-distortion function may be computed based on the generated one or more carrier signals for the phase locked loop circuit. An output radio frequency (RF) synthesized signal generated by the phase locked loop circuit may be modified based on the computed pre-distortion function and a subsequent output RF synthesized signal generated based on the modified output RF synthesized signal. | 12-23-2010 |
20110183708 | RF INTEGRATED CIRCUIT WITH TRANSMITTER AND MULTIPURPOSE OUTPUT PORTS AND METHODS FOR USE THEREWITH - An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a GSM format and at least one non-GSM format. | 07-28-2011 |
20110201286 | WCDMA transmit architecture - A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain. | 08-18-2011 |
20120034950 | RF INTEGRATED CIRCUIT WITH TRANSMITTER AND MULTIPURPOSE OUTPUT PORTS AND METHODS FOR USE THEREWITH - An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a UMTS format and at least one non-UMTS format. | 02-09-2012 |
20120161892 | Enhanced polar modulator for transmitter - Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±π/2), the phase information dynamic range is divided by a factor (e.g., by 2), and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator performs gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +π (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics. | 06-28-2012 |
20120220244 | WCDMA transmit architecture - Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain. | 08-30-2012 |
20130260816 | CONTROL OF A TRANSMITTER OUTPUT POWER - Disclosed are various embodiments for controlling an output power of a transmitter. Adjustment amounts for a transmitter to transmit at a desired power level are determined. For a predetermined time period, an actual power level of the transmitter is adjusted at a first adjustment rate. Upon an expiration of the predetermined time period, the actual power level is adjusted at a second adjustment rate, wherein the second adjustment rate is slower than the first adjustment rate. | 10-03-2013 |