Patent application number | Description | Published |
20090276639 | DYNAMIC FREQUENCY SCALING OF A SWITCHED MODE POWER SUPPLY - System(s) and method(s) are provided for dynamically scaling switching frequencies and clock sources of switched mode power supplies (SMPSs) in a mobile station. Switching frequency is scaled to an optimal value in response to at least one of (i) a change in mode of operation for wireless communication employed by the mobile station, an additional mode of operation is triggered, (ii) a change in operation conditions of a set of loads associated with functionality of the mobile is determined, or (iii) an LO spur set-off by a SMPS in the presence of an interference signal with a frequency splitting from an operational band that matches the SMPS frequency or at least one of its harmonics. Switching frequencies can be selected from a lookup table, or through an analysis of switching frequencies available to the mobile and operational criteria. A set of clock sources can provide an ensemble of switching frequencies. | 11-05-2009 |
20100316098 | APPARATUS AND METHOD FOR DYNAMIC SCALING OF ADC SAMPLING RATE TO AVOID RECEIVER INTERFERENCE - A method and apparatus for avoiding receiver interference is described herein. One or more potential interferers are determined and the frequency associated with the interferers is also determined A desired sampling frequency for the receiver is calculated to avoid the potential interferers. | 12-16-2010 |
20110044380 | DYNAMICALLY CHANGING A TRANSMITTER SAMPLING FREQUENCY FOR A DIGITAL-TO-ANALOG CONVERTER (DAC) TO REDUCE INTERFERENCE FROM DAC IMAGES - A method for interference reduction is described. The method is implemented in a wireless device. It is determined that a page is going to be received via a secondary receiver. It is also determined that a digital-to-analog converter (DAC) image from a transmitter will cause interference with the secondary receiver when the page is received. A sampling frequency of the DAC for the transmitter is changed so that there are not any DAC images from the transmitter that will cause interference with the secondary receiver. | 02-24-2011 |
20110292855 | DYNAMIC CLOCK BUFFER POWER OPTIMIZATION BASED ON MODES OF OPERATION - Circuitry configured for dynamically adjusting clock signal quality based on an operating mode for power savings is described. The circuitry includes clock generation circuitry. The circuitry also includes mode control circuitry. The mode control circuitry provides a drive signal based on an operating mode. The circuitry also includes clock buffer circuitry coupled to the clock generation circuitry and to the mode control circuitry. The clock buffer circuitry adjusts a clock signal quality based on the drive signal. | 12-01-2011 |
20110299434 | REDUCING POWER CONSUMPTION BY TAKING ADVANTAGE OF SUPERIOR IN-CIRCUIT DUPLEXER PERFORMANCE - Although the duplexer in a full-duplex transceiver circuit may only be guaranteed by the duplexer manufacturer to have a transmit band rejection from its TX port to its RX port of a certain amount, and may only be guaranteed to have a receive band rejection of another amount, the actual transmit band rejection and the actual receive band rejection of a particular instance of the duplexer may be better than specified. Rather than consuming excess power in the receiver and/or transmitter in order to meet performance requirements assuming the duplexer only performs as well as specified, the duplexer's in-circuit performance is measured as part of a transmitter-to-receiver isolation determination. Transmitter and/or receiver power settings are reduced where possible to take advantage of the measured better-than-specified in-circuit duplexer performance, while still meeting transceiver performance requirements. Power settings are not changed during normal transmit and receive mode operation. | 12-08-2011 |
20110300914 | REDUCING POWER CONSUMPTION BY IN-CIRCUIT MEASUREMENT OF RECEIVE BAND ATTENUATION AND/OR NOISE - Although the duplexer in a full-duplex transceiver circuit may only be guaranteed by the duplexer manufacturer to have a transmit band rejection from its TX port to its RX port of a certain amount, and may only be guaranteed to have a receive band rejection of another amount, the actual transmit band rejection and the actual receive band rejection of a particular instance of the duplexer may be better than specified. Rather than consuming excess power in the receiver and/or transmitter in order to meet performance requirements assuming the duplexer only performs as well as specified, the duplexer's in-circuit performance is measured as part of a transmitter-to-receiver isolation determination. Transmitter and/or receiver power settings are reduced where possible to take advantage of the measured better-than-specified in-circuit duplexer performance, while still meeting transceiver performance requirements. Power settings are not changed during normal transmit and receive mode operation. | 12-08-2011 |
20130229954 | FREQUENCY SYNTHESIZER ARCHITECTURE IN A TIME-DIVISION DUPLEX MODE FOR A WIRELESS DEVICE - A dual frequency synthesizer architecture for a wireless device operating in a time division duplex (TDD) mode is disclosed. In an exemplary design, the wireless device includes first and second frequency synthesizers. The first frequency synthesizer generates a first oscillator signal used to generate a first/receive local oscillator (LO) signal at an LO frequency for the receiver. The second frequency synthesizer generates a second oscillator signal used to generate a second/transmit LO signal at the same LO frequency for the transmitter. The two frequency synthesizers generate their oscillator signals to obtain receive and transmit LO signals at the same LO frequency when the wireless device operates in the TDD mode. | 09-05-2013 |
20140270032 | Phase Detection and Correction for Non-Continuous Local Oscillator Generator - Techniques for detecting and correcting phase discontinuity of a local oscillator (LO) signal are disclosed. In one design, a wireless device includes an LO generator and a phase detector. The LO generator generates an LO signal used for frequency conversion and is periodically powered on and off. The phase detector detects the phase of the LO signal when the LO generator is powered on. The detected phase of the LO signal is used to identify phase discontinuity of the LO signal. The wireless device may further include (i) a single-tone generator that generates a single-tone signal used to detect the phase of the LO signal, (ii) a downconverter that downconverts the single-tone signal with the LO signal and provides a downconverted signal used by the phase detector to detect the phase of LO signal, and (iii) phase corrector that corrects phase discontinuity of the LO signal in the analog domain or digital domain. | 09-18-2014 |