Patent application number | Description | Published |
20090148145 | SHAKE DETECTOR - A shake detector includes: a shake detection unit that detects an amount of shake, and outputs a shake detection signal and a reference signal; a signal processing unit that amplifies and smoothes the shake detection signal and the reference signal, and outputs the shake detection signal as a signal used in subsequent processing; an adjustment unit that outputs an adjustment signal for adjusting an output signal from the signal processing unit; and a control operation unit that, in a first period for which there is no shake in the imaging apparatus, stores a control value for controlling the adjustment unit on the basis of the reference signal, and that, in a second period different from the first period, generates a control signal for controlling the adjustment unit on the basis of the reference signal and the stored control value and outputs the control signal. | 06-11-2009 |
20100290670 | IMAGE PROCESSING APPARATUS, DISPLAY DEVICE, AND IMAGE PROCESSING METHOD - According to one embodiment, an image processing apparatus includes an extracted coordinates setting module, an image generator, and an output module. The extracted coordinates setting module sets extracted coordinates in a captured image along a direction in which a viewpoint moves with respect to an object in the captured image. The image generator sequentially extracts partial areas from the captured image in which perspective deformation of the object has been corrected based on the extracted coordinates, and generates a plurality of partial area images from the partial areas. The partial areas are in a size corresponding to the viewing angle of the human eye calculated according to an angle of view of the captured image. The output module outputs a moving image including the partial area images as frames. | 11-18-2010 |
20120176518 | SOLID-STATE IMAGE PICKUP DEVICE - A solid state image pickup device may include a pixel unit that includes a plurality of pixels; a pulse delay unit that includes a plurality of delay elements, each of the plurality of delay elements including a power supply terminal; a stop control unit; a stop signal delay unit; a lower bit latch unit; a counter unit; a first upper bit latch unit; a second upper bit latch unit; and a correcting unit that compares an output signal of the first upper bit latch unit with an output signal of the second upper bit latch unit, and corrects a count value, which is a count result of the counter unit, based on a comparison result and an output signal of the lower bit latch unit. | 07-12-2012 |
20120318958 | CLOCK GENERATION CIRCUIT AND IMAGING DEVICE - A clock generation circuit includes first and second logic circuits and a switch circuit. The first logic circuit has a first circuit threshold value lower than a circuit threshold value of a front-stage circuit, receives an input clock output from the front-stage circuit, and outputs a first output signal in accordance with a logic state of the input clock and the first circuit threshold value. The second logic circuit has a second circuit threshold value higher than the circuit threshold value of the front-stage circuit, receives the input clock output from the front-stage circuit, and outputs a second output signal in accordance with the logic state of the input clock and the second circuit threshold value. The switch circuit receives the first and second output signals and outputs, as an output clock, one of first and second voltages corresponding to different logic states. | 12-20-2012 |
20130105665 | SOLID-STATE IMAGING DEVICE | 05-02-2013 |
20130140434 | SOLID-STATE IMAGING DEVICE - A solid-state imaging device is capable of suppressing as much as possible an increase in power consumption of a low-frequency noise removing process. A pixel unit includes pixels outputting pixel signals corresponding to an amount of incident light and correction pixels outputting correction pixel signals corresponding to a correction reference voltage. An AD conversion circuit includes a delay circuit, to which a plurality of delay elements are connected, and outputs a digital signal corresponding to the number of delay elements through which a pulse signal passes when the pulse signal passes through the number of delay elements corresponding to a level of the pixel signal or the correction pixel signal. | 06-06-2013 |
20130144120 | SOLID-STATE IMAGING DEVICE AND ENDOSCOPE DEVICE - A solid-state imaging device and an endoscope device can correct characteristics of a digital signal output from an AD conversion unit with respect to a pixel signal input to an AD conversion unit with higher precision even when a dynamic range of a pixel signal is changed. A correction unit corrects the digital signal output from the AD conversion unit based on a correction function using the digital signal output from the AD conversion as a variable so as to correct the characteristics of the digital signal output from the AD conversion unit with respect to the pixel signal input to the AD conversion unit. A correction method changing unit changes an order of a variable between first and other orders in the correction function according to a change in a dynamic range of the pixel signal. | 06-06-2013 |
20140061437 | AD CONVERSION CIRCUIT AND SOLID-STATE IMAGE PICKUP DEVICE - An AD conversion circuit includes: a comparison unit that receives an analog signal and a reference signal, compares voltages of the signals, and outputs a first comparison signal; a signal generation unit that outputs a second comparison signal for switching a logic state, and outputs a third comparison signal that is a result of a logic operation on the first comparison signal and the second comparison signal; a control unit that outputs an enable signal; a clock generation unit that outputs first to n | 03-06-2014 |
20140183335 | A/D CONVERSION CIRCUIT AND SOLID-STATE IMAGING DEVICE - In an A/D conversion circuit and a solid-state imaging device, a latch circuit is in a disable state until a first timing at which an output signal of a comparison unit has been inverted, and is in an enable state until a second timing at which a delay time of the inversion delay circuit has passed from the first timing. The latch circuit is in the enable state until the second timing according to comparison start in the comparison unit. The latch circuit latches an output signal of a delay unit at the second timing. A determination unit determines whether the latch circuit accurately latches the output signal of the delay unit, and outputs a signal indicating a determination result to a delay controller. The delay controller controls the delay time of the inversion delay circuit based on the determination result. | 07-03-2014 |
20140191112 | SOLID-STATE IMAGING APPARATUS - A solid-state imaging apparatus includes a pixel unit which has a plurality of pixels disposed in a two-dimensional matrix shape, wherein each of the pixels that a photoelectrical conversion element which generates a photoelectrical conversion signal corresponding to an amount of incident light disposed on a first substrate, and which outputs a photoelectrical conversion signal generated by each of the pixels to each row as a pixel signal, and an analog-to-digital converter which is disposed on every one or more columns of the pixel unit and generates a digital signal by digitizing a phase state of a multi-phase clock including clock signals of a plurality of phases different from each other at predetermined fixed intervals according to the pixel signal. Each of first and second circuit configuration units whose circuit scales are determined according to the multi-phase clock is disposed on a different substrate of a first or second substrate. | 07-10-2014 |