Patent application number | Description | Published |
20110169988 | SOLID-STATE IMAGING DEVICE - In a solid-state imaging device, each of a plurality of switches is connected between a pulse output terminal of each delay unit and a pulse input terminal of the next-stage delay unit. Each of a plurality of switches is connected between the pulse output terminal and the pulse input terminal of each delay unit. A plurality of switches is turned on and a plurality of switches is turned off in conjunction with an oscillation operation, and a plurality of switches is turned off and a plurality of switches is turned on in conjunction with a holding operation. | 07-14-2011 |
20120242877 | SOLID-STATE IMAGING APPARATUS - A solid-state imaging apparatus includes a low-order latch circuit, a state variation detection circuit, and an encode signal latch circuit. The state variation detection circuit sequentially compares pulse signals output from two delay elements of a plurality of delay elements among pulse signals latched by the low-order latch circuit and outputs a state variation detection signal when states of the two pulse signals are different. The encode signal latch circuit latches an encode signal when the encode signal having a state corresponding to a delay element outputting a pulse signal input to the state variation detection circuit is input and the state variation detection signal is input. | 09-27-2012 |
20130105665 | SOLID-STATE IMAGING DEVICE | 05-02-2013 |
20130208160 | A/D CONVERSION CIRCUIT AND SOLID-STATE IMAGE PICKUP DEVICE - An A/D conversion circuit may include: a delay circuit that includes a plurality of delay units having a first pulse input terminal, a pulse output terminal, and an analog signal input terminal, wherein each first pulse input terminal of the plurality of delay units is connected to one of the pulse output terminals corresponding to the plurality of delay units, and a pulse output signal input to the first pulse input terminal is delayed in accordance with an analog signal input to the analog signal input terminal and output from the pulse output terminal, and one of the plurality of delay units has a second pulse input terminal to which a pulse signal is input from outside; a state variation detection circuit; and an encoding signal latch circuit. | 08-15-2013 |
20130299676 | A/D CONVERSION CIRCUIT AND SOLID-STATE IMAGING DEVICE - An A/D conversion circuit and a solid-state imaging device are able to reduce current consumption, and two input terminals of a NAND element included in a latch circuit receive a corresponding one of a plurality of clock signals and an enable signal. The enable signal is not input to the NAND element before an end timing of A/D conversion, and is input to the NAND element at the end timing of the A/D conversion and at a timing at which latching is performed. The latch circuit latches no clock signal when the enable signal is not input. | 11-14-2013 |
20140295136 | SINGLE-CRYSTAL 4H-SiC SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a single-crystal 4H-SiC substrate includes: preparing a flat 4H-SiC bulk single-crystal substrate; and epitaxially growing a first single-crystal 4H-SiC layer having recesses on the 4H-SiC bulk single-crystal substrate, wherein the first single-crystal 4H-SiC layer has a thickness of X (μm), the recesses have a diameter Y (μm) no smaller than 0.2*X (μm) and no larger than 2*X (μm), and a depth of Z (nm) no smaller than (0.95*X (μm) +0.5 (nm)) and no larger than 10*X (μm). | 10-02-2014 |
20150189213 | SOLID-STATE IMAGING DEVICE - A solid-state imaging device includes: a first substrate; a second substrate; a pixel unit in which pixels are disposed in a matrix; and an A/D conversion unit that is disposed for every columns of the pixels and counts a count clock for only a period according to a magnitude of the pixel signal. The A/D conversion unit includes: counter units that is provided in one of the first substrate and the second substrate and generates n-bit count signals; memory units that is provided in the other of the first substrate and the second substrate and holds the count signals and outputs the held count signals to horizontal signal transfer lines; and a connection unit that connects each counter unit to a corresponding one of the memory units and simultaneously transfer the count signals from at least two counter units to at least two memory units. | 07-02-2015 |
20150326241 | ANALOG-TO-DIGITAL CONVERTER AND SOLID-STATE IMAGING APPARATUS - An analog-to-digital (AD) converter has a latch section having latch units, a capacitor, and a latch control signal line connected to the latch units. A third voltage less than a first voltage and greater than a second voltage is applied as a power supply voltage to the latch units. When the capacitor is electrically connected to the latch control signal line, a potential of the latch control signal line becomes greater than or equal to the third voltage. Only when the electrical connection between the capacitor and the latch control signal line is disconnected, the first voltage is applied to the capacitor and the second voltage is applied to the latch control signal line. When the potential of the latch control signal line becomes greater than or equal to the third voltage, the latch units latch clock signals. | 11-12-2015 |