Patent application number | Description | Published |
20120268164 | PROGRAMMABLE LSI - A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off. | 10-25-2012 |
20120274355 | PROGRAMMABLE LOGIC DEVICE - An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal. | 11-01-2012 |
20120293202 | PROGRAMMABLE LOGIC DEVICE - An object is to provide a programmable logic device which can hold configuration data even when a power supply potential is not supplied, has short start-up time of a logic block after the power is supplied, and can operate with low power. A transistor in a memory portion of a programmable switch includes a material which allows a sufficient reduction in off-state current of the transistor, such as an oxide semiconductor material which is a wide bandgap semiconductor. When the semiconductor material which allows a sufficient reduction in off-state current of the transistor is used, configuration data can be held even when a power supply potential is not supplied. | 11-22-2012 |
20120293204 | SEMICONDUCTOR DEVICE - A semiconductor device in which a transistor using an oxide semiconductor containing In, Zn, or the like for a channel region can be driven like a p-channel transistor is provided. The semiconductor device includes a transistor and an inverter, wherein an output of the inverter is input to a gate of the transistor, a channel region of the transistor includes an oxide semiconductor film containing In, Zn, or Sn, and each channel region of transistors in the inverter contains silicon. When a high voltage is input to the inverter, a low voltage is output from the inverter and is input to the gate of the transistor, so that the transistor is turned off. When a low is input to the inverter, a high voltage is output from the inverter and is input to the gate of the transistor, so that the transistor is turned on. | 11-22-2012 |
20120293206 | PROGRAMMABLE LOGIC DEVICE - An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device. | 11-22-2012 |
20120293231 | Semiconductor Device - An object of one embodiment of the present invention to provide a latch circuit includes a level shifter and a buffer in which transistors each including a channel region formed in an oxide semiconductor film are connected in series. Thus, data can be held in the latch circuit even when power is not supplied. | 11-22-2012 |
20120294067 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME - In a semiconductor device performing pipeline processing with the use of a reading portion reading an instruction and an arithmetic portion performing an operation in accordance with the instruction, the instruction held in the reading portion is transmitted from the flip-flop to the memory when branch prediction turns out to be wrong. Note that the arithmetic portion controls transmission and reception of the instruction between the flip-flop and the memory which are included in the reading portion. This enables elimination of redundant operations in the reading portion in the case where an instruction read by the reading portion after the branch prediction turns out to be wrong is a subroutine, or the like. That is, the instruction held in the memory is transmitted back to the flip-flop without rereading of the same instruction by the reading portion, whereby the instruction can be output to the arithmetic portion. | 11-22-2012 |
20120311365 | PROGRAMMABLE LOGIC DEVICE - An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits. | 12-06-2012 |
20130009146 | SEMICONDUCTOR DEVICE - A semiconductor device which is downsized while a short-channel effect is suppressed and whose power consumption is reduced is provided. A downsized SRAM circuit is formed, which includes a first inverter including a first transistor and a second transistor overlapping with each other; a second inverter including a third transistor and a fourth transistor overlapping with each other; a first selection transistor; and a second selection transistor. An output terminal of the first inverter, an input terminal of the second inverter, and one of a source and a drain of the first selection transistor are connected to one another, and an output terminal of the second inverter, an input terminal of the first inverter, and one of a source and a drain of the second selection transistor are connected to one another. | 01-10-2013 |
20130134416 | SEMICONDUCTOR DISPLAY DEVICE - In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped. | 05-30-2013 |
20130229218 | LATCH CIRCUIT AND SEMICONDUCTOR DEVICE - A nonvolatile latch circuit is provided. In the latch circuit, a transistor in which a channel region is formed with an oxide semiconductor, which is a wide band gap semiconductor, is included, and data is stored in a node formed by one terminal of a capacitor and one of a source and a drain of the transistor, and is brought into a floating state when the transistor is turned off. After that, even when charge stored in the node is insufficient at time of restoring the data, charge is supplied by feedback; therefore, time necessary for restoring the data can be shortened and even when the power supply is restarted in the state of storing data, the data can be restored at high speed. | 09-05-2013 |
20130232365 | SEMICONDUCTOR DEVICE - The semiconductor device includes a CPU core having functions of a control unit, an arithmetic unit, and a register; a first memory device including a plurality of blocks each including one or a plurality of rows of memory cells; a second memory device copying data that is to be treated in the CPU core from a first block selected by the CPU core from the plurality of blocks included in the first memory device, and storing the data; a plurality of switches controlling supply of power supply voltage to the respective blocks; a memory management unit recognizing an address of the first block; and a power controller turning off one of the plurality of switches using the address to stop supply of the power supply voltage to a second block of the plurality of blocks which is different from the first block. | 09-05-2013 |
20130232366 | MICROPROCESSOR AND METHOD FOR DRIVING MICROPROCESSOR - A microprocessor with low power consumption and a method for driving the microprocessor are provided. The microprocessor includes a processor core, a cache memory, an interrupt controller, and a power supply controller. As at least one of a plurality of memory cell arrays included in the cache memory, a memory cell array composed of a plurality of memory cells is used. At the time of switching to a low power consumption mode, data used by the processor core after supply of power is resumed is prefetched to the memory cell array; then supply of power to the cache memory is stopped. Then, the processor core fetches needed data from the memory cell array after supply of power to the cache memory is resumed. | 09-05-2013 |
20130256762 | PROGRAMMABLE LOGIC DEVICE - An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal. | 10-03-2013 |
20130308392 | MEMORY DEVICE AND METHOD FOR DRIVING MEMORY DEVICE - A memory device in which one memory cell can operate in both a single-level cell mode and a multi-level cell mode includes a signal transmission path for a multi-level cell mode in which a multi-bit digital signal representing any of three or more states input to the memory circuit is converted by a D/A converter and stored in the memory cell and the stored data is read by converting a signal output from the memory cell into a multi-bit digital signal with an A/D converter and the multi-bit digital signal is output from the memory circuit, and a signal transmission path for a single-level cell mode in which a single-bit digital signal representing any of two states input to the memory circuit is directly stored in the memory cell and the signal stored in the memory cell is directly output from the memory cell. | 11-21-2013 |
20140015566 | PROGRAMMABLE LOGIC DEVICE - An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device. | 01-16-2014 |
20140068300 | MICROCONTROLLER - To provide a microcontroller that can operate in a low power consumption mode. The microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register of the peripheral circuit is formed at an interface with a bus line. A power gate is provided for control of power supply, and the microcontroller can operate in the low power consumption mode where some circuits alone are active, in addition to in a normal operation mode where all circuits are active. A register with no power supply in the low power consumption mode, such as a register of the CPU, includes a volatile memory and a nonvolatile memory. | 03-06-2014 |
20140108836 | MICROCONTROLLER AND METHOD FOR MANUFACTURING THE SAME - A microcontroller which operates in a low power consumption mode is provided. A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling supply control is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped. In the case where the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory. | 04-17-2014 |
20140121787 | CENTRAL CONTROL SYSTEM - Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon. | 05-01-2014 |
20140197873 | Semiconductor Device - An object of one embodiment of the present invention to provide a latch circuit includes a level shifter and a buffer in which transistors each including a channel region formed in an oxide semiconductor film are connected in series. Thus, data can be held in the latch circuit even when power is not supplied. | 07-17-2014 |
20140217403 | SEMICONDUCTOR DEVICE - A semiconductor device in which a transistor using an oxide semiconductor containing In, Zn, or the like for a channel region can be driven like a p-channel transistor is provided. The semiconductor device includes a transistor and an inverter, wherein an output of the inverter is input to a gate of the transistor, a channel region of the transistor includes an oxide semiconductor film containing In, Zn, or Sn, and each channel region of transistors in the inverter contains silicon. When a high voltage is input to the inverter, a low voltage is output from the inverter and is input to the gate of the transistor, so that the transistor is turned off. When a low is input to the inverter, a high voltage is output from the inverter and is input to the gate of the transistor, so that the transistor is turned on. | 08-07-2014 |