Tsai, Zhubei City
Chang-Lan Tsai, Zhubei City TW
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20110161771 | METHOD AND APPARATUS FOR PROVIDING RESOURCE UNIT BASED DATA BLOCK PARTITION - A method of providing resource unit based data block partitioning may include determining, for a bit stream to be encoded in a coding scheme including an upper layer coding and a physical layer coding, whether upper layer coding is enabled. The method may further include, in response to the upper layer coding being enabled, partitioning the bit stream into one or more blocks for forward error correction coding. The one or more blocks may have a block size determined based on a size of a resource unit. The resource unit size may correspond to one or more units predefined in the physical layer for the resource allocation. A corresponding apparatus is also provided. | 06-30-2011 |
20110195733 | Apparatus and Method for Resource Allocation in Wireless Communications - A method for a base station to allocate resources to a mobile station, the resources being included in one or more subbands each including a plurality of resource units, the method including: allocating a part of a first one of the subbands to the mobile station, the part including one or more resource units in the first one of the subbands; and indicating to the mobile station the allocated part of the first one of the subbands by indicating a resource allocation pattern corresponding to the allocated part of the first one of the subbands. | 08-11-2011 |
Cheng-Hong Tsai, Zhubei City TW
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20120102447 | System and Method for Optimizing Logic Timing - In an embodiment, a system for optimizing a logic circuit is disclosed. The system is configured to identify an input of a logic circuit cell that violates a timing condition. The input of the logic circuit is coupled to a plurality of logic paths having at least one level of logic. The system is also configured to identify a last node along one of the plurality logic path that violates the timing condition, and insert a buffer at least one node before the last node along the one of the plurality of logic paths that violates the timing condition. The buffer also has a delay optimized to fix the timing condition. | 04-26-2012 |
Chia-Ming Tsai, Zhubei City TW
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20130064973 | Chamber Conditioning Method - A system and method for conditioning a chamber is disclosed. An embodiment comprises utilizing the deposition chamber to deposit a first layer and conditioning the deposition chamber. The conditioning the deposition chamber can be performed by depositing a heterogeneous material over the first layer. The heterogeneous material can cover and encapsulate the first layer, thereby preventing particles of the first layer from breaking off and potentially landing on a substrate during a subsequent processing run. | 03-14-2013 |
20130089934 | Material Delivery System and Method - A system and method for controlling saturated vapor pressure of a precursor material is provided. An embodiment comprises generating a calibration curve and utilizing the calibration curve to control a temperature of the precursor material in order to control its saturated vapor pressure. Alternatively, the calibration curve may be substituted for a real time sensor which can take readings in real time and adjust the temperature and saturated vapor pressure based upon the real time readings. | 04-11-2013 |
20140061822 | SUBSTRATE BACKSIDE PEELING CONTROL - Structures and methods for reducing backside polysilicon peeling are disclosed. A structure includes a substrate having a first side and a second opposite side, a first dielectric layer on the second side of the substrate extending in a direction from an edge of the substrate towards a center of the substrate, a high-k layer on the first dielectric layer, and a polysilicon layer on the high-k layer. The first dielectric layer has a first innermost sidewall relative to the center of the substrate, and the high-k layer has a second innermost sidewall relative to the center of the substrate. The second innermost sidewall is within 2 millimeters from the first innermost sidewall in a direction parallel to the second side. The polysilicon layer extends towards the center of the substrate further than the first innermost sidewall. | 03-06-2014 |
20140162425 | METHOD OF FORMING DIELECTRIC FILMS USING A PLURALITY OF OXIDATION GASES - A method for forming a dielectric film is disclosed. The method includes (a) exposing a substrate to a first gas pulse having a first oxygen-containing gas in a chamber; (b) exposing the substrate to multiple consecutive second gas pulses having a second oxygen-containing gas in the chamber, wherein the first oxygen-containing gas is different from the second oxygen-containing gas; and (c) sequentially after (a) and (b), exposing the substrate to a third gas pulse having a metal-containing gas in the chamber. Steps (a), (b), and (c) may be repeated any number of times to form the dielectric film with a predetermined thickness. | 06-12-2014 |
20140231931 | IN-SITU NITRIDATION OF GATE DIELECTRIC FOR SEMICONDUCTOR DEVICES - A semiconductor substructure with improved performance and a method of forming the same is described. The semiconductor substructure includes a dielectric film over a substrate, the dielectric film including at least one metal dielectric layer, at least one oxygen-donor layer, and at least one nitride-incorporation layer. | 08-21-2014 |
20150102431 | MECHANISMS FOR FORMING GATE DIELECTRIC LAYER - Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a nitride buffer layer over the semiconductor substrate, and the nitride buffer layer is in an amorphous state. The semiconductor device also includes a crystalline gate dielectric layer over the nitride buffer layer and a gate electrode over the crystalline gate dielectric layer. | 04-16-2015 |
20150214321 | SEMICONDUCTOR DEVICE AND FORMATION THEREOF - A semiconductor device and methods of formation are provided. A semiconductor device includes a dielectric film over a dielectric layer. The dielectric film includes a crystalline structure having a substantially uniform composition of zirconium, nitrogen and oxygen. The dielectric film is formed through in situ nitrogen plasma doping of a zirconium layer. The dielectric film functions as a gate dielectric. The dielectric film has a high dielectric constant between about 28-29 and has a low leakage current density of about 4.79×10 | 07-30-2015 |
20160043186 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a gate stack positioned over the semiconductor substrate. The gate stack includes a gate dielectric layer and a gate electrode over the gate dielectric layer. The semiconductor device structure includes spacers positioned over first sidewalls of the gate stack. The spacers and the gate stack surround a recess. The semiconductor device structure includes an insulating layer formed over the semiconductor substrate and surrounding the gate stack. The semiconductor device structure includes a cap layer covering the insulating layer, the spacers, and inner walls of the recess. | 02-11-2016 |
Chien-Wen Tsai, Zhubei City TW
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20140170869 | SCREEN CONTROL MODULE OF A MOBILE ELECTRONIC DEVICE AND CONTROLLER THEREOF - A screen control module of a mobile electronic device has at least one controller formed on a circuit board. The circuit board has multiple solder pads formed on the circuit board and respectively aligning along a first direction and a second direction. A count of the solder pads along the first direction is greater than that along the second direction. The controller is formed by an integrated circuit with a package, and the aspect ratio of the package is not less than 2. The package has multiple electrical contacts respectively aligning along a length direction and a width direction. Each electrical contact aligns with and is electrically connected to a corresponding solder pad. Accordingly, the screen control module mounted within a side frame of a display of the mobile electronic device can increase the aspect ratio to meet the demand for narrowing the side frame of the display. | 06-19-2014 |
20150279775 | SCREEN CONTROL MODULE OF A MOBILE ELECTRONIC DEVICE AND CONTROLLER THEREOF - A screen control module of a mobile electronic device has at least one controller formed on a circuit board. The circuit board has multiple solder pads formed on the circuit board and respectively aligning along a first direction and a second direction. A count of the solder pads along the first direction is greater than that along the second direction. The controller is formed by an integrated circuit with a package, and the aspect ratio of the package is not less than 2. The package has multiple electrical contacts respectively aligning along a length direction and a width direction. Each electrical contact aligns with and is electrically connected to a corresponding solder pad. Accordingly, the screen control module mounted within a side frame of a display of the mobile electronic device can increase the aspect ratio to meet the demand for narrowing the side frame of the display. | 10-01-2015 |
20160050758 | SCREEN CONTROL MODULE OF A MOBILE ELECTRONIC DEVICE AND CONTROLLER THEREOF - A screen control module of a mobile electronic device has at least one controller formed on a circuit board. The circuit board has multiple solder pads formed on the circuit board and respectively aligning along a first direction and a second direction. An amount of the solder pads along the first direction is greater than that along the second direction. The controller is formed by an integrated circuit with a package, and the aspect ratio of the package is not less than 2. The package has multiple electrical contacts respectively aligning along a length direction and a width direction. Each electrical contact aligns with and is electrically connected to a corresponding solder pad. Accordingly, the screen control module mounted within a side frame of a display of the mobile electronic device can increase the aspect ratio to meet the demand for narrowing the side frame of the display. | 02-18-2016 |
Ching-Che Tsai, Zhubei City TW
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20130126977 | N/P BOUNDARY EFFECT REDUCTION FOR METAL GATE TRANSISTORS - The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a plurality of dummy gates over a substrate. The dummy gates extend along a first axis. The method includes forming a masking layer over the dummy gates. The masking layer defines an elongate opening extending along a second axis different from the first axis. The opening exposes first portions of the dummy gates and protects second portions of the dummy gates. A tip portion of the opening has a width greater than a width of a non-tip portion of the opening. The masking layer is formed using an optical proximity correction (OPC) process. The method includes replacing the first portions of the dummy gates with a plurality of first metal gates. The method includes replacing the second portions of the dummy gates with a plurality of second metal gates different from the first metal gates. | 05-23-2013 |
20130205265 | OPTICAL PROXIMITY CORRECTION CONVERGENCE CONTROL - A method of optical proximity correction (OPC) convergence control that includes providing a lithography system having a photomask and an illuminator. The method further includes performing an exposure by the illuminator on the photomask. Also, the method includes optimizing an optical illuminator setting for the lithography system with a defined gate pitch in a first direction in a first template. Additionally, the method includes determining OPC correctors to converge the OPC results with a target edge placement error (EPE) to produce a first OPC setting for the first template. The first OPC setting targets a relatively small EPE and mask error enhancement factor (MEEF)of the defined gate pitch in the first template. In addition, the method includes checking the first OPC setting for a relatively small EPE, MEEF and DOM consistency with the first template of the defined gate pitch in a second, adjacent template. | 08-08-2013 |
20140203374 | N/P Boundary Effect Reduction for Metal Gate Transistors - The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a plurality of dummy gates over a substrate. The dummy gates extend along a first axis. The method includes forming a masking layer over the dummy gates. The masking layer defines an elongate opening extending along a second axis different from the first axis. The opening exposes first portions of the dummy gates and protects second portions of the dummy gates. A tip portion of the opening has a width greater than a width of a non-tip portion of the opening. The masking layer is formed using an optical proximity correction (OPC) process. The method includes replacing the first portions of the dummy gates with a plurality of first metal gates. The method includes replacing the second portions of the dummy gates with a plurality of second metal gates different from the first metal gates. | 07-24-2014 |
20140256144 | SEMICONDUCTOR FIN FORMATION METHOD AND MASK SET - A mask set and method for forming FinFET semiconductor devices provides a complementary set of fin-cut masks that are used in DPT (double patterning technology) to remove fins from non-active areas of a semiconductor device, after the fins are formed. Adjacent fins, or adjacent groups of fins, are removed using pattern features from different ones of the multiple fin-cut masks. | 09-11-2014 |
20140317581 | REVISING LAYOUT DESIGN THROUGH OPC TO REDUCE CORNER ROUNDING EFFECT - The present disclosure provides a method of fabricating a semiconductor device. A first layout design for a semiconductor device is received. The first layout design includes a plurality of gate lines and an active region that overlaps with the gate lines. The active region includes at least one angular corner that is disposed adjacent to at least one of the gate lines. The first layout design for the semiconductor device is revised via an optical proximity correction (OPC) process, thereby generating a second layout design that includes a revised active region with a revised corner that protrudes outward. Thereafter, the semiconductor device is fabricated based on the second layout design. | 10-23-2014 |
20150364459 | N/P BOUNDARY EFFECT REDUCTION FOR METAL GATE TRANSISTORS - The present disclosure provides a semiconductor device. A first active region is formed in a substrate. The first active region is elongated in a first direction in a top view. A first gate is formed over the substrate. The first gate is elongated in a second direction in the top view. A portion of the first gate is located over the first active region. A second gate is formed over the substrate. The second gate is elongated in the second direction in the top view. A portion of the second gate is located over the first active region. The second gate is shorter than the first gate in the second direction. | 12-17-2015 |
20160042964 | METHOD FOR REMOVING SEMICONDUCTOR FINS USING ALTERNATING MASKS - A mask set and method for forming FinFET semiconductor devices provides a complementary set of fin-cut masks that are used in DPT (double patterning technology) to remove fins from non-active areas of a semiconductor device, after the fins are formed. Adjacent fins, or adjacent groups of fins, are removed using pattern features from different ones of the multiple fin-cut masks. | 02-11-2016 |
Chuen-Jinn Tsai, Zhubei City TW
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20130037971 | WETTED WALL VENTURI SCRUBBER WITH A 2-STAGE VENTURI THROAT - A venturi scrubber, which avoids clogging in the throat by dust particles, includes a venturi tube, two scrubbing fluid conduits and a scrubbing fluid tank. The venturi tube has a converging section, a diverging section and a throat section which is connected between the converging section and the diverging section. The scrubbing fluid conduit has a top end connected with the bottom end of the converging section of the venturi tube, and the scrubbing fluid conduit is connected with the scrubbing fluid tank. Thereby, scrubbing fluid can be guided directly into the scrubbing fluid tank without passing through the throat section. As a result, the clogging of dust particles on the converging section of the venturi throat can be minimized and the abnormal increase of the pressure drop of the throat can also be avoided. | 02-14-2013 |
Feng-Chi Eddie Tsai, Zhubei City TW
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20100060457 | ELONGATED TWIN FEED LINE RFID ANTENNA WITH DISTRIBUTED RADIATION PERTURBATIONS - An RFID antenna comprising an elongated structure existing along an axis that is long compared to the signal wavelength and including twin ribbon-like feed lines of electrically conductive material, the feed lines being in a common plane and being uniformly laterally spaced from one another, and a plurality of radiating perturbations associated with the feed lines at a plurality of locations spaced along the feed lines, at each location each feed line has its own individual perturbation or portion of a perturbation. | 03-11-2010 |
Hsiung-Yu Tsai, Zhubei City TW
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20100101640 | Optical structure and solar cell using the same - An optical structure is characterized by improving a primary lens of a photovoltaic concentrator system. The optical structure is accomplished by properly dividing the primary lens, determining required optical operational regions, and arranging the optical operational regions basing on an identical location into an annular array, thereby forming the complete optical structure. The optical structure facilitates enhancing uniformity of light distribution throughout the optical operational regions, improving photoelectric conversion efficiency of a solar cell having the optical structure, and reducing operational distance between the primary lens and the solar cell. | 04-29-2010 |
Huai-Fang Tsai, Zhubei City TW
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20120249924 | Display Apparatus - A display apparatus is provided. The display apparatus comprises a display device for displaying an image and a diffractive optical element. The diffractive optical element is disposed on a light emitting side of the display device. The diffractive optical element comprises first grating regions. Each of the first grating regions has first diffraction gratings having a constant cycle space and the same azimuth angle. An area of the first grating regions occupies 17.5%˜94% of an area of the diffractive optical element. | 10-04-2012 |
I-Cheng Tsai, Zhubei City TW
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20160112148 | LOW-COST TEST/CALIBRATION SYSTEM AND CALIBRATED DEVICE FOR LOW-COST TEST/CALIBRATION SYSTEM - A test/calibration system includes a device under test (DUT) and a calibrated device. The calibrated device is coupled to the DUT, transmits or receives a test signal to or from the DUT in response to a control signal for a test item to test, measure or calibrate functioning or performance of an internal component of the DUT. | 04-21-2016 |
Jang-Shiang Tsai, Zhubei City TW
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20140252625 | Method of Preventing a Pattern Collapse - A device includes a substrate and at least three conducting features embedded into the substrate. Each conducting feature includes a top width x and a bottom width y, such that a top and bottom width (x1, y1) of a first conducting feature has a dimension of (x1 | 09-11-2014 |
20150137265 | FIN FIELD EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME - A fin field effect transistor and method of forming the same. The fin field effect transistor includes a semiconductor substrate having a fin structure and between two trenches with top portions and bottom portions. The fin field effect transistor further includes shallow trench isolations formed in the bottom portions of the trenches and a gate electrode over the fin structure and the shallow trench isolation, wherein the gate electrode is substantially perpendicular to the fin structure. The fin field effect transistor further includes a gate dielectric layer along sidewalls of the fin structure and source/drain electrode formed in the fin structure. | 05-21-2015 |
20160027688 | Method Of Preventing Pattern Collapse - A device includes a substrate and at least three conducting features embedded into the substrate. Each conducting feature includes a top width x and a bottom width y, such that a top and bottom width (x1, y1) of a first conducting feature has a dimension of (x1 | 01-28-2016 |
Jia-Shian Tsai, Zhubei City TW
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20120242419 | OSCILLATOR AND CONTROL CIRCUIT THEREOF - An oscillator and a control circuit thereof are provided. The control circuit is configured to control an oscillator to adjust the amplitude and the level of an oscillation signal. The control circuit includes a peak amplitude detector, an average voltage detector, and an oscillation controller. The peak amplitude detector is configured to detect the amplitude of the oscillation signal, so as to generate an amplitude value. The average voltage detector is configured to detect the direct current (DC) level of the oscillation signal, so as to generate an average value. The oscillation controller is configured to generate two power signals according to the amplitude value and the average value. The two power signals are provided to the oscillator, so that the oscillator adjusts the amplitude and DC level of the oscillation signal. | 09-27-2012 |
Kuo-Chen Tsai, Zhubei City TW
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20130069614 | POWER SUPPLY CIRCUIT AND POWER SUPPLY CIRCUIT WITH ADAPTIVELY ENABLED CHARGE PUMP - The present invention discloses a power supply circuit with adaptively enabled charge pump. The power supply circuit includes: a buck switching regulator switching at least one power switch therein to convert an input voltage to a middle voltage according to a control signal; a charge pump coupled to the buck switching regulator, wherein when the charge pump is enabled, the charge pump boosts the middle voltage to provide an output voltage higher than the middle voltage, and when the charge pump is disabled, the middle voltage is supplied as the output voltage; and a controller generating the control signal to control the switching regulator, and determining to enable or disable the charge pump according to a level of the input voltage. | 03-21-2013 |
20130128395 | Short-circuit Detection Circuit and Short-circuit Detection Method - The present invention discloses a short-circuit detection circuit and a short-circuit detection method. The short-circuit detection circuit detects whether an output node is short-circuited to a first predetermined level. A first switch circuit which is controlled by a control signal is coupled between the output node and a second predetermined level. The short-circuit detection circuit includes: a determination circuit, which is coupled between the output node and the second predetermined level, wherein when the determination circuit is enabled, it generates a determination signal according to whether the output node is short-circuited to the first predetermined level; and a second switch circuit, which generates a short-circuit detection signal according to the determination signal. | 05-23-2013 |
Meng-Che Tsai, Zhubei City TW
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20140104232 | SELF-CAPACITIVE TOUCH CONTROL APPARATUS AND CONTROL METHOD THEREOF - A self-capacitive touch control apparatus includes a plurality of electrodes, a plurality of sensors, and a number determining module. The sensors detect capacitance changes in the electrodes to generate a plurality of sensing results. The number determining module calculates a total sensing amount according to the sensing results, and determines the number of touch points according to the total sensing amount. | 04-17-2014 |
20140292694 | DISPLAY CONTROL APPARATUS AND DISPLAY CONTROL METHOD - A display control device for controlling a display apparatus is provided. The display apparatus includes a touch panel and is for displaying an image signal of a computer host. The display control device includes a touch panel controller and a screen controller. The touch panel controller controls the touch panel to perform touch sensing and accordingly generates a touch control signal. The screen controller controls the display apparatus to operate between an adjustment mode and a display mode according a mode signal. When the display apparatus operates in the adjustment mode, the screen controller performs on-screen display (OSD) control according to the touch control signal to adjust the display apparatus. When the display apparatus operates in the display mode, the touch control signal is transmitted to the computer host to control the computer host. | 10-02-2014 |
20140359308 | DISPLAY DEVICE WITH MOBILE HIGH-DEFINITION LINK PORT AND SIGNAL PROCESSING METHOD THEREOF - A signal processing method for a display device is provided. The display device is capable of connecting a portable consumer electronic device via a high-definition link (MHL) port. Via the communication bus (CBUS) in the MHL port, a set of encryption codes is provided to the portable consumer electronic device. Based on an encrypted identification fed back from the portable consumer electronic device, it is determined whether the portable consumer electronic device passes authentication. If the portable consumer electronic device passes the authentication, when a human interface device provides a user command to the display device, the user command is encrypted according to the set of encryption codes to generate an encrypted user command compliant to the CBUS specification. Via the CBUS of the MHL port, the encrypted user command is provided to the portable consumer electronic device. | 12-04-2014 |
20150029147 | METHOD FOR DESIGNING PATTERN OF SENSING CHANNELS IN TOUCH PANEL - A method for designing a pattern of sensing channels is provided. The method is applied to a touch panel including a plurality of electrodes and a plurality of sections of sensing channels. The electrodes are connected to a plurality of sensors for the touch panel via the sections of sensing channels. According to a minimum sensing channel width, a minimum sensing channel gap, a maximum distribution width and lengths of the sections of sensing channels, a set of rules are established. According to the set of rules, a programming process is utilized to determine respective widths of the sections of sensing channels. | 01-29-2015 |
Ming-Chang Tsai, Zhubei City TW
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20120086656 | Touch Sensing Circuit and Associated Method - A touch sensing circuit and method is provided. The touch sensing circuit discriminates a common voltage change of a display panel couple to the touch sensor in a touch panel display apparatus. The touch sensor comprises a plurality of sensor electrodes. The touch sensing circuit includes a plurality of channel circuits, each of which includes a reset switch and a sensing switch for alternately conducting an associated sensor electrode to a reset voltage and a charge collecting circuit. The channel circuits are divided to different groups that operate according to interleaving timings for encompassing possible common voltage changes. | 04-12-2012 |
Ming-Hsuan Tsai, Zhubei City TW
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20120083088 | INTEGRATED CIRCUIT DEVICE WITH WELL CONTROLLED SURFACE PROXIMITY AND METHOD OF MANUFACTURING SAME - An integrated circuit device and method for manufacturing the integrated circuit device is disclosed. The disclosed method provides improved control over a surface proximity and tip depth of integrated circuit device. In an embodiment, the method achieves improved control by forming a doped region and a lightly doped source and drain (LDD) region in a source and drain region of the device. The doped region is implanted with a dopant type opposite the LDD region. | 04-05-2012 |
Ming-Tien Tsai, Zhubei City TW
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20140159752 | RAPID ANALYSIS OF BUFFER LAYER THICKNESS FOR THIN FILM SOLAR CELLS - A method and apparatus for measuring thickness of a film in a solar cell provides for directing light emitted at multiple emission wavelengths, to a surface of the solar cell. Each emission results in the generation of a responsive photo current. The photo currents are read by a current meter having one contact coupled to a surface of the solar cell and another contact coupled to another surface. The currents associated with each of the different light emissions are identified and the thickness of a film in the solar cell is calculated based on the two currents or associated quantum efficiencies, and associated absorption coefficients. In one embodiment, the film thickness is the thickness of a CdS or other buffer film in a thin film solar cell. | 06-12-2014 |
20140261657 | THIN FILM SOLAR CELL AND METHOD OF FORMING SAME - A solar cell comprises a back contact layer, an absorber layer on the back contact layer, a buffer layer on the absorber layer, and a front contact layer above the buffer layer. The front contact layer has a first portion and a second portion. The first and second portions of the front contact layer differ from each other in thickness or dopant concentration. | 09-18-2014 |
Ming-Zuan Tsai, Zhubei City TW
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20090013755 | Calibration jig and algorithms for accelerometer - The present invention provides a calibration system for accelerometer and the method of using the same. The calibration system includes a hexahedral calibration jig placed on a calibrated platform and a calibration module. The calibration jig includes at least four planes that are arranged in parallel or vertical with each other. The calibration module may be performing three algorithms for calibrating an accelerometer and calculating parameters for coordinate transfer. | 01-15-2009 |
Min-Hsiu Tsai, Zhubei City TW
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20110307749 | Low leakage boundary scan device design and implementation - A boundary scan circuit comprising a freeze circuit and a transparency circuit provides a capability to selectively place portions of a system logic in a sleep mode and thereby conserving power. There are two transparency circuit configurations, one that connects to an input pad cell and one that connects to an output pad cell. The circuitry in the transparency circuit is controlled in such a manner as to establish at the output of transparency circuit a known logic state to control leakage current resulting from the circuitry of the various pad cell configurations, which further conserves power during sleep mode. | 12-15-2011 |
20120012841 | Through-silicon via testing structure - A through-silicon via (TSV) testing structure is disclosed herein and includes a plurality of controllers, a plurality of transmitters and a plurality of receivers. The controllers are configured to output a first controlling signal and a second controlling signal. The transmitters are respectively connected to the output end of the through-silicon via and one of the controllers, and output a testing output signal in accordance with the first controlling signal and the second controlling signal. The receivers are respectively connected to the input end of the through-silicon via and another one of the controllers, and input a testing input signal in accordance with the first controlling signal and the second controlling signal. | 01-19-2012 |
Min-Yuan Tsai, Zhubei City TW
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20140372958 | TRIPLE-PATTERN LITHOGRAPHY LAYOUT DECOMPOSITION - Provided is a method for evaluating and decomposing a semiconductor device level for triple pattern lithography in semiconductor manufacturing. The method includes generating a conflict graph and simplifying the conflict graph using various methods to produce a simplified conflict graph which can either be further simplified or evaluated for decomposition validity. The disclosure also provides for applying decomposition validity rules to a simplified conflict graph to determine if the conflict graph represents a semiconductor device layer that is decomposable into three masks. Methods of the disclosure are carried out by a computer and instructions for carrying out the method may be stored on a computer readable storage medium. | 12-18-2014 |
20150379189 | TRIPLE-PATTERN LITHOGRAPHY LAYOUT DECOMPOSITION - Provided is a method for evaluating and decomposing a semiconductor device level for triple pattern lithography in semiconductor manufacturing. The method includes generating a conflict graph and simplifying the conflict graph using various methods to produce a simplified conflict graph which can either be further simplified or evaluated for decomposition validity. The disclosure also provides for applying decomposition validity rules to a simplified conflict graph to determine if the conflict graph represents a semiconductor device layer that is decomposable into three masks. Methods of the disclosure are carried out by a computer and instructions for carrying out the method may be stored on a computer readable storage medium. | 12-31-2015 |
Shin-Yeu Tsai, Zhubei City TW
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20150048475 | Semiconductor Structures With Shallow Trench Isolations - A method is disclosed that includes the operations outlined below. An insulating material is disposed within a plurality of trenches on a semiconductor substrate and over the semiconductor substrate. The first layer is formed over the insulating material. The first layer and the insulating material are removed. | 02-19-2015 |
20150206879 | METHOD OF MAKING PROTECTIVE LAYER OVER POLYSILICON STRUCTURE - A method includes forming a first polysilicon structure over a first portion of a substrate. A second polysilicon structure is formed over a second portion of the substrate. Two spacers are formed on opposite sidewalls of the second polysilicon structure. A layer of protective material is formed to cover the first and second portions of the substrate. The layer of protective material has a first thickness over the second polysilicon structure and a second thickness over the two spacers. The first thickness is equal to or greater than 500 Å, and the second thickness is equal to or less than 110% of the first thickness. A patterned photo resist layer is formed to cover a first portion of the layer of protective material that covers the first portion of the substrate. The second portion of the layer of protective material is removed. | 07-23-2015 |
Teng-Han Tsai, Zhubei City TW
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20140293808 | WIRELESS RECEIVING SYSTEM AND ASSOCIATED SIGNAL PROCESSING METHOD - A wireless receiving system includes a packet searching module and a memory module. The packet searching module performs packet searching that includes adopting at least one parameter. The memory module stores the at least one parameter corresponding to a packet as a set of reference parameters. At a predetermined time point, the packet searching module again performs packet searching according to the set of reference parameters stored in the memory module. | 10-02-2014 |
20140293892 | WIRELESS SIGNAL RECEIVER AND ASSOCIATED SIGNAL PROCESSING METHOD - A wireless signal receiver includes a receiving module, an automatic gain control (AGC) module, a measuring module, a decoding module, and a control module. The receiving module receives a wireless signal. The AGC module adjusts an amplitude of the wireless signal according to a gain to generate an adjusted signal. The measuring module measures a signal strength of the adjusted signal. The decoding module decodes the adjusted signal. When the decoding module determines that the adjusted signal corresponds to a beacon packet transmitted from a transmitting end, the control module adjusts the gain according to the signal strength. | 10-02-2014 |
Tzu-Jane Tsai, Zhubei City TW
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20100165911 | RELAY STATION AND COMMUNICATION METHOD THEREOF - An embodiment of a relay station for a base station and a mobile station is provided. The relay station includes a first base station module and a mobile station module. The first base station module receives a control packet and a data packet transmitted by a mobile station. The mobile station module receives and transmits the control packet and the data packet to the base station, wherein the first base station module transmits the control packet to the mobile station module via a tunnel mode, and transmits the data packet to the mobile station module via a bridge mode. | 07-01-2010 |
20140177600 | COMMUNICATIONS SYSTEM, USER EQUIPMENT, MOBILITY MANAGEMENT ENTITY AND METHOD THEREOF OF TRANSIENT HANDOVER FOR PERFORMING PACKET OFFLOADING - A method of a transient handover for performing packet offloading is disclosed. The method is used in a cellular network and includes: finding at least one qualified user equipment according to a determining method, and transmitting a handover-transient request to the qualified UE; finding and transmitting an access request to a wireless local area network after the UE receives the handover-transient request; transmitting a handover-transient ACK to a mobility management entity when the qualified user equipment accesses the wireless local area network; and releasing a bearer resource of the qualified user equipment when the MME receives the handover-transient ACK, retaining bearer information of the qualified user equipment, and handing over the qualified user equipment from the cellular network to the wireless local area network. | 06-26-2014 |
20150181504 | COMMUNICATION METHODS OF IP FLOW MOBILITY WITH RADIO ACCESS NETWORK LEVEL ENHANCEMENT - A communication method comprises the following steps: receiving an IFOM triggering message by a packet data network gateway (P-GW); selecting one or more evolved packet system (EPS) bearers by the P-GW based on the IFOM triggering message, and making a bearer division if IP flows associated with a user equipment (UE) are not allowed to a first access network; sending a first request to the first access network in response to the bearer division; updating a mapping table if the first request is acknowledged by the first access network; and initiating a third generation partnership project (3GPP) bearer update procedure to move the one or more EPS bearers selected by the P-GW to the first access network. | 06-25-2015 |
Wu-Liu Tsai, Zhubei City TW
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20160086978 | DISPLAY - A display is disclosed. The display includes a display panel including pixel units in an image-displaying region. Each of the pixel units includes an AND gate and a pixel electrode electrically connected to an output terminal of the AND gate. | 03-24-2016 |
Yao-Hsien Tsai, Zhubei City TW
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20150269303 | METHOD AND SYSTEM FOR VERIFYING THE DESIGN OF AN INTEGRATED CIRCUIT HAVING MULTIPLE TIERS - A method for verifying the design of an IC having a plurality of tiers includes conducting a layout versus schematic (“LVS”) check to separate a plurality of devices of a plurality of design layouts, wherein each design layout corresponds to a respectively different tier having the respective devices. A plurality of adjacent tier connections are generated between one of the devices in respectively different tiers from each other, using a computing device. A first RC extraction for each of the tiers is performed to compute couplings between each of the plurality of devices of the corresponding design layout. A second RC extraction for each of the adjacent tier connections is performed. | 09-24-2015 |
Yi-Hsin Tsai, Zhubei City TW
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20150180941 | Cloud Scene Sharing System - A cloud scene sharing system includes a first network device, a webcam device, and a second network device. The webcam device is provided for monitoring a scene of environment, wherein the first network device owns the initiative access privilege of the webcam device by means of a share master module. The share master module determines whether the initiative access privilege of the webcam device is to share with the second network device or not according to a relationship of network group configuration between the first network device and the second network device, wherein the first network device is operated to determine whether the initiative access privilege is to share with the second network device or not, wherein the network group configuration is provided for setting whether the first network device and the second network device are belonged to a same group or not. | 06-25-2015 |
20150181160 | CLOUD MONITORING SYSTEM - A cloud monitoring system includes at least one webcam device, at least one monitoring controlling module, at least one operation executing device, and an authorizing module. The webcam device is provided for monitoring a scene of environment and sending the scene via a network. The monitoring controlling module is provided in an end-user networking device. The operation executing device and the authorizing module are connected with the network. By the authorizing module, an observation privilege of the webcam device of the monitoring controlling module is authorized to another specific monitoring controlling module to display the scene on a screen of the end-user networking device of the specific monitoring controlling module, and/or the authorizing module authorizes a controlling privilege of the operation executing device to the monitoring controlling module specifically to allow the operation executing device to execute an operation by operating a controlling element of the monitoring controlling module. | 06-25-2015 |
Yi-Yun Tsai, Zhubei City TW
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20150340433 | Power Semiconductor Device of Stripe Cell Geometry - A power semiconductor device of stripe cell geometry including a substrate, a plurality of striped power semiconductor units, and a guard ring structure is provided. The substrate has an active area and a termination area surrounding the active area defined thereon. The striped semiconductor unit includes a striped gate conductive structure. The striped semiconductor units are located in the active area. The guard ring structure is located in the termination area and includes at least a ring-shaped conductive structure surrounding the striped power semiconductor units. The ring-shaped conductive structure and the striped gate conductive structures are formed on the same conductive layer, and at least one of the striped gate conductive structures is separated from the nearby ring-shaped conductive structure and electrically connected to the nearby ring-shaped conductive structure through the gate metal pad. | 11-26-2015 |