Van Meer
Andre Van Meer, Noordwolde NL
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20150274350 | PAPER AND CARDBOARD PACKAGING WITH BARRIER COATING - Described is paper or cardboard packaging produced from mineral oil contaminated, (e.g., recycled) paper, wherein the packaging includes a barrier layer obtainable by applying an aqueous polymer dispersion comprising a copolymer obtainable by emulsion polymerization of C | 10-01-2015 |
Andre Van Meer, Noorwolde NL
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20090082493 | STABILIZED WATER-BORNE POLYMER COMPOSITIONS FOR USE AS WATER-BASED COATINGS - Stable water-borne polymer compositions are disclosed. The compositions comprise a water-borne polymer, a metal cross-linking agent and a stabilizing agent comprising from 2 to 10 carbon atoms and at least two functional groups independently selected from hydroxy and carboxy. The stabilizing agent is present a 1.4 mole percent or more of the amount of metal cross-linking agent. Inventive compositions are particularly suitable for use in water-based inks and coatings. Methods of making and using the coating compositions are also described. | 03-26-2009 |
Aschwin Lodewijk Hendricus Van Meer, Roosendaal NL
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20080297758 | Lithographic support structure - The invention relates to a transfer apparatus for transferring an object (W). the transfer apparatus comprises a gripper ( | 12-04-2008 |
Berent Jan Van Meer, Eindhoven NL
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20130137132 | CARDIOMYOCYTE CONTAINING DEVICE, MANUFACTURING METHOD AND MEASURING METHOD - Disclosed is a device ( | 05-30-2013 |
Gary Van Meer, Tarpon Springs, FL US
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20080208131 | Cannula Having Unbreakable Tip - A cannula includes an elongate cannula body formed of a translucent polycarbonate plastic having a distal end and the distal end has a sharp edge that frays and weakens sutures that rub against it. A distal tip has a rounded leading end and is disposed in overlying, protective relation to the distal end of the cannula body and the sharp edge. The distal tip is formed of a material that is substantially unbreakable upon contact with bone or other hard material encountered during surgery. The material may be a metal, a thermoplastic urethane or a thermoplastic urethane rubber. An annular recess formed in a lumen of the cannula body at the distal end of the cannula body accommodates the distal tip so that the lumen of the cannular body and the lumen of the distal tip are flush with one another. | 08-28-2008 |
Gerardus Franciscus Bernardus Petrus Van Meer, Utrecht NL
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20110020837 | Method for isolating or identifying a target protein interacting with a lipid in a cell - The invention is in the field of molecular biology and cell biology. It provides tools and methods for studying the interaction of proteins and lipids in vivo as well as in vitro. The invention relates to a method for isolating or identifying a target protein interacting with a lipid in a cell. This method employs novel dual-labeled lipid precursors such as fatty acids or their derivatives. These lipid precurors comprise two functional groups: a photoactivatable group, such as a diazirine ring, as well as a terminal alkyne or azide moiety. | 01-27-2011 |
Hans Van Meer, Newburgh, NY US
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20130224945 | METHODS OF FORMING BULK FINFET DEVICES WITH REPLACEMENT GATES SO AS TO REDUCE PUNCH THROUGH LEAKAGE CURRENTS - One illustrative method disclosed herein includes forming a plurality of spaced-apart trenches in a semiconducting substrate to thereby define a fin structure for the device, forming a local isolation region within each of the trenches, forming a sacrificial gate structure on the fin structure, wherein the sacrificial gate structure comprises at least a sacrificial gate electrode, and forming a layer of insulating material above the fin structure and within the trench above the local isolation region. In this example, the method further includes performing at least one etching process to remove the sacrificial gate structure to thereby define a gate cavity, after removing the sacrificial gate structure, performing at least one etching process to form a recess in the local isolation region, and forming a replacement gate structure that is positioned in the recess in the local isolation region and in the gate cavity. | 08-29-2013 |
Hans Van Meer, Fishkill, NY US
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20100151660 | METHOD FOR FORMING SEMICONDUCTOR DEVICES WITH ACTIVE SILICON HEIGHT VARIATION - A method for forming different active thicknesses on the same silicon layer includes masking the silicon layer and exposing selected regions of the silicon layer. The thickness of the silicon layer at the exposed regions is changed, either by adding silicon or subtracting silicon from the layer at the exposed regions. Once the mask is removed, the silicon layer has regions of different active thicknesses, respectively suitable for use in different types of devices, such as diodes and transistors. | 06-17-2010 |
20110272791 | METHOD FOR FORMING SEMICONDUCTOR DEVICES WITH ACTIVE SILICON HEIGHT VARIATION - A method far farming different active thicknesses on the same silicon layer includes masking the silicon layer and exposing selected regions of the silicon layer. The thickness of the silicon layer at the exposed regions is changed, either by adding silicon or subtracting silicon from the layer at the exposed regions. Once the mask is removed, the silicon layer has regions of different active thicknesses, respectively suitable for use in different types of devices, such as diodes and transistors. | 11-10-2011 |
20120326279 | METHOD FOR FORMING SEMICONDUCTOR DEVICES WITH ACTIVE SILICON HEIGHT VARIATION - A semiconductor product has different active thicknesses of silicon on a single semiconductor substrate. The thickness of the silicon layer is changed either by selectively adding silicon or subtracting silicon from an original layer of silicon. The different active thicknesses are suitable for use in different types of devices, such as diodes and transistors. | 12-27-2012 |
20130270680 | METHOD FOR FORMING SEMICONDUCTOR DEVICES WITH ACTIVE SILICON HEIGHT VARIATION - A method for forming different active thicknesses on the same silicon layer includes masking the silicon layer and exposing selected regions of the silicon layer. The thickness of the silicon layer at the exposed regions is changed, either by adding silicon or subtracting silicon from the layer at the exposed regions. Once the mask is removed, the silicon layer has regions of different active thicknesses, respectively suitable for use in different types of devices, such as diodes and transistors. | 10-17-2013 |
Johannes Van Meer, Newburgh, NY US
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20090008718 | STRESS ENHANCED CMOS CIRCUITS - A CMOS circuit is provided that includes a PMOS transistor, an NMOS transistor adjacent the PMOS transistor in a channel width direction, a compressive stress liner overlying the PMOS transistor, and a tensile stress liner overlying the NMOS transistor. A portion of the compressive stress liner and a portion of the tensile stress liner are in a stacked configuration, and an overlap region of the compressive stress liner and the tensile stress liner is sufficient to result in an enhanced transverse stress in the compressive stress liner or the tensile stress liner. | 01-08-2009 |
Johannes M. Van Meer, Delmar, NY US
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20150364570 | STRESS MEMORIZATION TECHNIQUES FOR TRANSISTOR DEVICES - One illustrative method disclosed herein includes, among other things, performing a source/drain extension ion implantation to form a doped extension implant region in the source/drain regions of the device, performing an ion implantation process on the source/drain regions with a Group VII material (e.g., fluorine), after performing the Group VII material ion implantation process, forming a capping material layer above the source/drain regions, and, with the capping material layer in position, performing an anneal process so as to form stacking faults in the source/drain regions. | 12-17-2015 |
Johannes M. Van Meer, Newburgh, NY US
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20150021702 | SHALLOW TRENCH ISOLATION - A semiconductor structure with an improved shallow trench isolation (STI) region and method of fabrication is disclosed. The STI region comprises a lower portion filled with oxide and an upper portion comprising a high Young's modulus (HYM) liner disposed on the lower portion and trench sidewalls and filled with oxide. The HYM liner is disposed adjacent to source-drain regions, and serves to reduce stress relaxation within the shallow trench isolation (STI) oxide, which has a relatively low Young's modulus and is soft. Hence, the HYM liner serves to increase the desired stress imparted by the embedded stressor source-drain regions, which enhances carrier mobility, thus increasing semiconductor performance. | 01-22-2015 |
20150037945 | EPITAXIALLY FORMING A SET OF FINS IN A SEMICONDUCTOR DEVICE - Approaches for enabling epitaxial growth of silicon fins in a device (e.g., a fin field effect transistor device (FinFET)) are provided. Specifically, approaches are provided for forming a set of silicon fins for a FinFET device, the FinFET device comprising: a set of gate structures formed over a substrate, each of the set of gate structures including a capping layer and a set of spacers; an oxide fill formed over the set of gate structures; a set of openings formed in the device by removing the capping layer and the set of spacers from one or more of the set of gate structures; a silicon material epitaxially grown within the set of openings in the device and then planarized; and wherein the oxide fill is etched to expose the silicon material and form the set of fins. | 02-05-2015 |
20150097197 | FINFET WITH SIGMA CAVITY WITH MULTIPLE EPITAXIAL MATERIAL REGIONS - Embodiments of the present invention provide an improved finFET and methods of fabrication. A sigma cavity is used with an n-type finFET to allow multiple epitaxial layers to be disposed adjacent to a finFET gate. In some embodiments, stacking faults may be formed in the epitaxial layers using a stress memorization technique. | 04-09-2015 |
20150108586 | TRANSISTOR DEVICE WITH IMPROVED SOURCE/DRAIN JUNCTION ARCHITECTURE AND METHODS OF MAKING SUCH A DEVICE - One illustrative device disclosed herein includes a plurality of source/drain regions positioned in an active region on opposite sides of a gate structure, each of the source/drain regions having a lateral width in a gate length direction of the transistor and a plurality of halo regions, wherein each of the halo regions is positioned under a portion, but not all, of the lateral width of one of the plurality of source/drain regions. A method disclosed herein includes forming a plurality of halo implant regions in an active region, wherein an outer edge of each of the halo implant regions is laterally spaced apart from an adjacent inner edge of an isolation region. | 04-23-2015 |
20150221770 | EPITAXIALLY FORMING A SET OF FINS IN A SEMICONDUCTOR DEVICE - Approaches for enabling epitaxial growth of silicon fins in a device (e.g., a fin field effect transistor device (FinFET)) are provided. Specifically, approaches are provided for forming a set of silicon fins for a FinFET device, the FinFET device comprising: a set of gate structures formed over a substrate, each of the set of gate structures including a capping layer and a set of spacers; an oxide fill formed over the set of gate structures; a set of openings formed in the device by removing the capping layer and the set of spacers from one or more of the set of gate structures; a silicon material epitaxially grown within the set of openings in the device and then planarized; and wherein the oxide fill is etched to expose the silicon material and form the set of fins. | 08-06-2015 |
20150348830 | SHALLOW TRENCH ISOLATION - A semiconductor structure with an improved shallow trench isolation (STI) region and method of fabrication is disclosed. The STI region comprises a lower portion filled with oxide and an upper portion comprising a high Young's modulus (HYM) liner disposed on the lower portion and trench sidewalls and filled with oxide. The HYM liner is disposed adjacent to source-drain regions, and serves to reduce stress relaxation within the shallow trench isolation (STI) oxide, which has a relatively low Young's modulus and is soft. Hence, the HYM liner serves to increase the desired stress imparted by the embedded stressor source-drain regions, which enhances carrier mobility, thus increasing semiconductor performance. | 12-03-2015 |
Johannes Marinus Van Meer, Delmar, NY US
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20150115371 | FINFET SEMICONDUCTOR STRUCTURES AND METHODS OF FABRICATING SAME - The invention provides a method of forming a semiconductor structure, which include: providing an intermediate semiconductor structure having semiconductor substrate, a fin having an EG oxide layer in contact with at least a portion of the fin, and a gate stack disposed over a portion of the fin; forming a silicon nitride layer over portions of the fin that are not located under the gate stack; and after forming the silicon nitride layer, performing one or more ion implantation steps on the intermediate semiconductor structure. The invention also provides a method of forming a semiconductor structure including: providing an intermediate semiconductor structure having a semiconductor substrate, a fin having an EG oxide layer in contact with at least a portion of the fin, and a gate material disposed over the fin; forming, over the fin and gate material of the intermediate semiconductor structure, a gate stack hardmask including an oxide layer; forming a silicon nitride barrier layer on the oxide layer of the gate stack hardmask; performing one or more gate stack hardmask patterning steps; removing the EG oxide layer from portions of the fin that are not located under the gate; and subsequent to removing the EG oxide layer from portions of the fin that are not located under the gate, performing one or more ion implantation steps. | 04-30-2015 |
20150340501 | FORMING INDEPENDENT-GATE FINFET WITH TILTED PRE-AMORPHIZATION IMPLANTATION AND RESULTING DEVICE - Methods for producing independent-gate FinFETs with improved channel mobility and the resulting devices are disclosed. Embodiments may include forming an independent-gate fin field-effect transistor (FinFET) above a substrate; and forming stress within the fin between two independent gates of the independent-gate FinFET. | 11-26-2015 |
Philip Markus Van Meer, Delft NL
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20130014857 | Injecting Device and Method of Filling a Holder with Separated Liquid LayersAANM Kinds; Diederik JasperAACI HoogstratenAACO BEAAGP Kinds; Diederik Jasper Hoogstraten BEAANM Poppenk; Fedde MartijnAACI DelftAACO NLAAGP Poppenk; Fedde Martijn Delft NLAANM Van Meer; Philip MarkusAACI DelftAACO NLAAGP Van Meer; Philip Markus Delft NL - The present invention relates to an injecting device for filling a holder with separated liquid layers. The device comprises at least two containers for holding different liquids, an injector for filling a holder with separated liquid layers and moving means for setting the distance between the holder and the injector. The invention also comprises a method for filling a holder with separated liquid layers. The method comprises the steps of placing a holder with bottom, disposing inside the holder, and at a predetermined distance from the bottom of the holder, a feed conduit with an outflow opening for dispensing liquid, and allowing different liquids to flow sequentially out of the feed conduit, wherein the distance between the outflow opening and the bottom is maintained. | 01-17-2013 |