Patent application number | Description | Published |
20100315200 | AUTOMATIC PORTABLE ELECTRONIC DEVICE CONFIGURATION - A network- and/or client-side device configuration system facilitates automatic configuration of portable electronic devices. Predetermined configuration parameters for a particular portable electronic device are generated and stored. A computer-readable visual symbol such as an optical graphic code (for example, a tag, barcode, or matrix code) is generated by a network-side service and transmitted to an authorized user of the particular portable electronic device. The portable electronic device reproduces the visual symbol and transmits a message (which may or may not include the reproduced visual symbol) to the (same or different) network-side service. The network-side service authenticates the portable electronic device, and authorizes the portable electronic device to access and use the predetermined configuration parameters to automatically configure itself. | 12-16-2010 |
20100319064 | DIGITAL CONTENT ACQUISITION SYSTEM AND TECHNIQUES - A network- and/or client-side digital content acquisition system facilitates automatic and simplified transactions, between a user of a consumer electronic device (“CED”) and a digital content source, for authorizing access to digital content items (“DCIs”). Computer-readable visual symbols are associated with DCIs. A particular computer-readable visual symbol has a visual symbology, presented on a surface, which encodes information regarding DCIs, sources responsible for authorizing access to the DCIs, and consideration (if any) due from a user. A user of a particular CED identifies, and uses the CED to reproduce and decode, a particular computer-readable visual symbol. Upon reproduction and/or decoding, the CED automatically requests access to the DCI, and provides a security token that links the user and the CED, and automatically authorizes transfer of consideration (if any) due from the user. Upon authentication of the security token, the user automatically receives access to the DCI. | 12-16-2010 |
Patent application number | Description | Published |
20100129731 | MULTI-WIRE, LONG-LIFE INTERCONNECTS FOR FUEL CELL STACKS - An interconnect assembly for a solid oxide fuel cell includes a porous interconnect comprising a plurality of first wires of a first material and at least one second material combined to form a first portion defining a separator plate contact zone and a second portion defining an electrode contact zone. Various wire weave shapes and pre-buckled architectures are shown such as FIG. | 05-27-2010 |
20110248073 | HIGH TEMPERATURE SEAL FOR JOINING CERAMIC COMPONENTS SUCH AS CELLS IN A CERAMIC OXYGEN GENERATOR - A multi-layer seal arrangement includes a dissolution barrier between a braze alloy and a ceramic component. The inventive seal is useful for joining a ceramic component to another ceramic component or a metal component, for example. In one example, the braze comprises a gold alloy and the dissolution barrier comprises a layer of alumina on the order of 2-3 microns thick. A titanium wetting layer is provided between the alumina layer and the alloy. A metallization layer provided between the dissolution barrier and the ceramic component in one example comprises a layer of gold between two thin layers of titanium. In one particular example, a platinum mesh is included with the gold of the braze alloy to control braze flow during the brazing operation. | 10-13-2011 |
20110275006 | SOLID OXIDE FUEL CELL HAVING METAL SUPPORT WITH A COMPLIANT POROUS NICKEL LAYER - A fuel cell includes a cell having a solid oxide electrolyte between electrodes. The cell has a first coefficient of thermal expansion. A metallic support is in electrical connection with one of the electrodes. The metallic support includes a metal substrate and a compliant porous nickel layer that is bonded to the metal substrate between the cell and the metal substrate. The metal substrate has a second coefficient of thermal expansion that nominally matches the first coefficient of thermal expansion of the cell. The metal substrate has a first stiffness and the compliant porous nickel layer has a second stiffness that is less than the first stiffness such that the compliant porous nickel layer can thermally expand and contract with the metal substrate. | 11-10-2011 |
20130101915 | COMPOSITE SEAL FOR FUEL CELLS, PROCESS OF MANUFACTURE, AND FUEL CELL STACK USING SAME - A seal is provided for use in a solid oxide fuel cell, wherein the seal is formed of alternating adjacent layers of a fiber tow material and a foil material. A solid oxide fuel cell stack is also disclosed and is formed of repeating cell units, each cell unit having a plurality of fuel cell stack components defining opposed component surfaces, and the seal as described above positioned between the opposed component surfaces. A process is also provided for manufacturing a composite seal for a solid oxide fuel cell, and the process including the steps of: (a) feeding a quantity of spooled fiber tow material through an inert bonding agent to form a coated fiber tow material; (b) winding the coated fiber tow material about a mandrel to form a wound layer of fiber tow material; (c) feeding a quantity of spooled foil material about the wound layer of fiber tow material to form a wound layer of foil material; and (d) repeating steps (a) through (c) until forming a composite seal having desired thickness and width. | 04-25-2013 |
Patent application number | Description | Published |
20120084778 | MANAGING EXECUTION OF MIXED WORKLOADS IN A SIMULTANEOUS MULTI-THREADED (SMT) ENABLED SYSTEM - A kernel of a SMT enabled processor system facilitates construction of an exclusive set of processors to simulate an ST mode for handling the tasks of the ST workload, wherein the ST workload runs more efficiently on single threaded processors. The kernel schedules the ST workload on the exclusive set of processors by selecting one hardware thread per processor within said exclusive set of processors to handle a separate one of the tasks of the ST workload, while requiring the remaining hardware threads per processor within the exclusive set to idle. As a result, the ST workload is executed on the SMT enabled processor system as if the exclusive set of processors run in ST mode, but without actually deactivating the remaining idle hardware threads per processor within the exclusive set of processors. | 04-05-2012 |
20130152098 | TASK PRIORITY BOOST MANAGEMENT - According to one aspect of the present disclosure, a method and technique for task priority boost management is disclosed. The method includes: responsive to a thread executing in user mode an instruction to boost a priority of the thread, accessing a boost register, the boost register accessible in kernel mode; determining a value of the boost register; and responsive to determining that the boost register holds a non-zero value, boosting the priority of the thread. | 06-13-2013 |
20140143458 | Offloading Input/Output (I/O) Completion Operations - A mechanism is provided for offloading an input/output (I/O) completion operation. Responsive to a second processor identifying that a flag has been set by a first processor requesting assistance in completing an I/O operation, the second processor copies an I/O response from a first I/O response data structure associated with the first processor to a second I/O response data structure associated with the second processor. The second processor deletes the I/O response from the first I/O response data structure, clears the flag, and processes the I/O operation by addressing the I/O response in the second I/O response data structure. Responsive to completing the I/O operation, the second processor deletes the I/O response from the second I/O response data structure. | 05-22-2014 |
20140143465 | Offloading Input/Output (I/O) Completion Operations - A mechanism is provided for offloading an input/output (I/O) completion operation. Responsive to a second processor identifying that a flag has been set by a first processor requesting assistance in completing an I/O operation, the second processor copies an I/O response from a first I/O response data structure associated with the first processor to a second I/O response data structure associated with the second processor. The second processor deletes the I/O response from the first I/O response data structure, clears the flag, and processes the I/O operation by addressing the I/O response in the second I/O response data structure. Responsive to completing the I/O operation, the second processor deletes the I/O response from the second I/O response data structure. | 05-22-2014 |
Patent application number | Description | Published |
20080244168 | METHOD AND APPARATUS FOR A PRIMARY OPERATING SYSTEM AND AN APPLIANCE OPERATING SYSTEM - One embodiment includes a personal computer device comprising at least one machine to execute a primary user operating system, a first physical memory to be used by the primary user operating system, at least one appliance operating system that is independent from the primary user operating system, a second physical memory to be sequestered from the primary user operating system and an access violation monitor to restrict access from the at least one appliance operating system to the second physical memory, wherein the access violation monitor is to run only when the at least one appliance operating system is invoked and at least one appliance operating system is to be invoked only after the primary user operating system has been suspended to a standby state. | 10-02-2008 |
20080244598 | SYSTEM PARTITIONING TO PRESENT SOFTWARE AS PLATFORM LEVEL FUNCTIONALITY - Embodiments of apparatuses, methods for partitioning systems, and partitionable and partitioned systems are disclosed. In one embodiment, a system includes processors and a partition manager. The partition manager is to allocate a subset of the processors to a first partition and another subset of the processors to a second partition. The first partition is to execute first operating system level software and the second partition is to execute second operating system level software. The first operating system level software is to manage the processors in the first partition as resources individually accessible to the first operating system level software, and the second operating system level software is to manage the processors in the second partition as resources individually accessible to the second operating system level software. The partition manager is also to present the second partition, including the second operating system level software, to the first operating system level software as platform level functionality embedded in the system. | 10-02-2008 |
20090172346 | TRANSITIONING BETWEEN SOFTWARE COMPONENT PARTITIONS USING A PAGE TABLE POINTER TARGET LIST - Embodiments of apparatuses, articles, methods, and systems for intra-partitioning components within an execution environment, and transitioning between partitions using a page table pointer target list are generally described herein. Other embodiments may be described and claimed. | 07-02-2009 |
20110246698 | METHOD AND APPARATUS FOR A PRIMARY OPERATING SYSTEM AND AN APPLIANCE OPERATING SYSTEM - One embodiment includes a personal computer device comprising at least one machine configured to execute a primary user operating system and at least one appliance operating system independent from the primary user operating system. The personal computer device also including a system memory including a first portion of the system memory configured to be used by the primary user operating system; and a second portion of the system memory configured to be sequestered from the primary user operating system. The personal computer device further including an access violation monitor configured to restrict access from the at least one appliance operating system to the second portion of the system memory | 10-06-2011 |
20130290978 | System Partitioning To Present Software As Platform Level Functionality - Embodiments of apparatuses, methods for partitioning systems, and partitionable and partitioned systems are disclosed. In one embodiment, a system includes processors and a partition manager. The partition manager is to allocate a subset of the processors to a first partition and another subset of the processors to a second partition. The first partition is to execute first operating system level software and the second partition is to execute second operating system level software. The first operating system level software is to manage the processors in the first partition as resources individually accessible to the first operating system level software, and the second operating system level software is to manage the processors in the second partition as resources individually accessible to the second operating system level software. The partition manager is also to present the second partition, including the second operating system level software, to the first operating system level software as platform level functionality embedded in the system. | 10-31-2013 |
Patent application number | Description | Published |
20110154500 | Executing Trusted Applications with Reduced Trusted Computing Base - A system for executing trusted applications with a reduced trusted computing base. In one embodiment, the system includes a processor to dynamically instantiate an application protection module in response to a request by a program to be executed under a trusted mode. The system further includes memory to store the program which is capable of interacting with a remote service for security verification. In one embodiment, the application protection module includes a processor-measured application protection service (P-MAPS) operable to measure and to provide protection to the application. | 06-23-2011 |
20120072734 | PLATFORM FIRMWARE ARMORING TECHNOLOGY - A method, apparatus, method, machine-readable medium, and system are disclosed. In one embodiment the method includes is a processor. The processor includes switching a platform firmware update mechanism located in a computer platform to a platform firmware armoring technology (PFAT) mode on a boot of the computer platform. The computer platform includes a platform firmware storage location that stores a platform firmware. The method then persistently locks the platform firmware storage location in response to the platform firmware update mechanism switching to the PFAT mode. When persistently locked, writes are only allowed to the platform firmware storage location by an Authenticated Code Module in the running platform and only after a platform firmware update mechanism unlocking procedure. | 03-22-2012 |
20130219191 | PLATFORM FIRMWARE ARMORING TECHNOLOGY - A method, apparatus, machine-readable medium, and system are disclosed. In one embodiment the method includes a processor. The processor includes switching a platform firmware update mechanism located in a computer platform to a platform firmware armoring technology (PFAT) mode on a boot of the computer platform. The computer platform includes a platform firmware storage location that stores a platform firmware. The method then persistently locks the platform firmware storage location in response to the platform firmware update mechanism switching to the PFAT mode. When persistently locked, writes are only allowed to the platform firmware storage location by an Authenticated Code Module in the running platform and only after a platform firmware update mechanism unlocking procedure. | 08-22-2013 |