Patent application number | Description | Published |
20110156032 | METHOD OF REPAIRING PROBE PADS - A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad having a first surface, contacting the first probe pad with a probe tip that displaces a portion of the first probe pad above the first surface, and performing a chemical mechanical polish on the first probe pad to planarize the portion of the first probe pad above the first surface. The method also includes forming a second level of active circuitry overlying the first probe pad, forming a second probe pad electrically connected to the second level of active circuitry, contacting the second probe pad with a probe tip that displaces a portion of the probe pad, and chemically mechanically polishing the second probe pad to remove the portion displaced. | 06-30-2011 |
20130063173 | METHOD OF REPAIRING PROBE PADS - A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad having a first surface, contacting the first probe pad with a probe tip that displaces a portion of the first probe pad above the first surface, and performing a chemical mechanical polish on the first probe pad to planarize the portion of the first probe pad above the first surface. The method also includes forming a second level of active circuitry overlying the first probe pad, forming a second probe pad electrically connected to the second level of active circuitry, contacting the second probe pad with a probe tip that displaces a portion of the probe pad, and chemically mechanically polishing the second probe pad to remove the portion displaced. | 03-14-2013 |
20130072011 | METHOD OF REPAIRING PROBE PADS - A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad having a first surface, contacting the first probe pad with a probe tip that displaces a portion of the first probe pad above the first surface, and performing a chemical mechanical polish on the first probe pad to planarize the portion of the first probe pad above the first surface. The method also includes forming a second level of active circuitry overlying the first probe pad, forming a second probe pad electrically connected to the second level of active circuitry, contacting the second probe pad with a probe tip that displaces a portion of the probe pad, and chemically mechanically polishing the second probe pad to remove the portion displaced. | 03-21-2013 |
20130312791 | DUAL MEDIUM FILTER FOR ION AND PARTICLE FILTERING DURING SEMICONDUCTOR PROCESSING - The present disclosure is directed to fluid filtering systems and methods for use during semiconductor processing. One or more embodiments are directed to fluid filtering systems and methods for filtering ions and particles from a fluid as the fluid is being provided to a semiconductor wafer processing tool, such as to a semiconductor wafer cleaning tool. | 11-28-2013 |
20140061914 | DOPING OF COPPER WIRING STRUCTURES IN BACK END OF LINE PROCESSING - A method of forming a metal interconnect structure includes forming a copper line within an interlevel dielectric (ILD) layer; directly doping a top surface of the copper line with a copper alloy material; and forming a dielectric layer over the ILD layer and the copper alloy material; wherein the copper alloy material serves an adhesion interface layer between the copper line and the dielectric layer. | 03-06-2014 |
20140097539 | TECHNIQUE FOR UNIFORM CMP - Pitch-dependent dishing and erosion following CMP treatment of copper features is quantitatively assessed by atomic force microscopy (AFM) and transmission electron microscopy (TEM). A new sequence of processing steps presented herein is used to prevent dishing and to reduce significantly the local pitch- and pattern density-induced CMP non-uniformity for copper metal lines having widths and spacing in the range of about 32-128 nm. The new process includes a partial copper deposition step followed by deposition of a silicon carbide/nitride (SiC | 04-10-2014 |
20140246776 | DOPING OF COPPER WIRING STRUCTURES IN BACK END OF LINE PROCESSING - A method of forming a metal interconnect structure includes forming a copper line within an interlevel dielectric (ILD) layer; directly doping a top surface of the copper line with a copper alloy material; and forming a dielectric layer over the ILD layer and the copper alloy material; wherein the copper alloy material serves an adhesion interface layer between the copper line and the dielectric layer. | 09-04-2014 |
20140256133 | POST METAL CHEMICAL-MECHANICAL PLANARIZATION CLEANING PROCESS - A post metal chemical-mechanical planarization (CMP) cleaning process for advanced interconnect technology is provided. The process, which follows CMP, combines an acidic clean and a basic clean in sequence. The process can achieve a more than 60% reduction in CMP defects, such as polish residues, foreign materials, slurry abrasives, scratches, and hollow metal, relative to an all-basic clean process. The process also eliminates the circular ring defects that occur intermittently during roller brush cleans within a roller brush clean module. | 09-11-2014 |