Patent application number | Description | Published |
20140264493 | Semiconductor Device and Fabricating the Same - A semiconductor device includes a substrate, a gate stack having at least one gate vertex directed to an area in the substrate below the gate stack. The semiconductor device also includes a source structure having at least one vertex directed toward the area in the substrate and a drain structure having at least one vertex directed toward the area in the substrate. | 09-18-2014 |
20150041761 | Backside Illuminated Photo-Sensitive Device with Gradated Buffer Layer - A method for forming a backside illuminated photo-sensitive device includes forming a gradated sacrificial buffer layer onto a sacrificial substrate, forming a uniform layer onto the gradated sacrificial buffer layer, forming a second gradated buffer layer onto the uniform layer, forming a silicon layer onto the second gradated buffer layer, bonding a device layer to the silicon layer, and removing the gradated sacrificial buffer layer and the sacrificial substrate. | 02-12-2015 |
20150108430 | TRANSISTOR CHANNEL - A transistor device includes a substrate having a first region and a second region, a first semiconductor layer of a first semiconductor material having a first portion over the first region and a second portion over the second region, the first portion being separated from the second portion, a second semiconductor layer of a second semiconductor material over the second portion of the first semiconductor layer, a first transistor of a first conductivity type, the first transistor disposed within the first region and having a first set of source/drain regions formed in the first semiconductor layer, and a second transistor of a second conductivity type, the second transistor disposed within the second region and having a second set of source/drain regions formed in the second semiconductor layer. The second conductivity type is different than the second conductivity type, and the second semiconductor material is different from the first semiconductor material. | 04-23-2015 |
20150115397 | SEMICONDUCTOR DEVICE WITH TRENCH ISOLATION - A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes an epitaxial layer and a dielectric material. The epitaxial layer is in a trench of the semiconductor and is peripherally enclosed thereby, in which the epitaxial layer is formed by performing etch and epitaxy processes. The etch and epitaxy process includes etching out a portion of a sidewall of the trench and a portion of a bottom surface of the trench and forming the epitaxial layer conformal to the remaining portion of the sidewall and the remaining portion of the bottom surface. The dielectric material is peripherally enclosed by the epitaxial layer. | 04-30-2015 |
20150243763 | PERFORMANCE BOOST BY SILICON EPITAXY - The present disclosure relates to a method of generating a transistor device having an epitaxial layer disposed over a recessed active region. The epitaxial layer improves transistor device performance. In some embodiments, the method is performed by providing a semiconductor substrate. An epitaxial growth is performed to form an epitaxial layer onto the semiconductor substrate. An electrically insulating layer is then formed onto the epitaxial layer, and a gate structure is formed onto the electrically insulating layer. By forming the epitaxial layer over the semiconductor substrate the surface roughness of the semiconductor substrate is improved, thereby improving transistor device performance. | 08-27-2015 |
20150263123 | COMMON SOURCE OXIDE FORMATION BY IN-SITU STEAM OXIDATION FOR EMBEDDED FLASH - The present disclosure relates to an embedded flash memory cell having a common source oxide layer with a substantially flat top surface, disposed between a common source region and a common erase gate, and a method of formation. In some embodiments, the embedded flash memory cell has a semiconductor substrate with a common source region separated from a first drain region by a first channel region and separated from a second drain region by a second channel region. A high-quality common source oxide layer is formed by an in-situ steam generation (ISSG) process at a location overlying the common source region. First and second floating gate are disposed over the first and second channel regions on opposing sides of a common erase gate having a substantially flat bottom surface abutting a substantially flat top surface of the common source oxide layer. | 09-17-2015 |
20150279894 | CMOS Image Sensor with Epitaxial Passivation Layer - The present disclosure provides a complimentary metal-oxide-semiconductor (CMOS) image sensor (CIS) device. In accordance with some embodiments, the device includes a semiconductor region having a front surface and a back surface; a light-sensing region extending from the front surface towards the back surface within the semiconductor region; a gate stack formed over the semiconductor region; and at least one epitaxial passivation layer disposed at least one of over and below the light-sensing region. In some embodiments, the at least one epitaxial passivation layer includes a p-type doped silicon (Si) layer. | 10-01-2015 |
20150303265 | SEMICONDUCTOR DEVICE WITH TRENCH ISOLATION - A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes an epitaxial layer and a dielectric material. The epitaxial layer is in a trench of the semiconductor and is peripherally enclosed thereby, in which the epitaxial layer is formed by performing etch and epitaxy processes. The etch and epitaxy process includes etching out a portion of a sidewall of the trench and a portion of a bottom surface of the trench and forming the epitaxial layer conformal to the remaining portion of the sidewall and the remaining portion of the bottom surface. The dielectric material is peripherally enclosed by the epitaxial layer. | 10-22-2015 |