Patent application number | Description | Published |
20100180286 | OPTICAL DISK DRIVE WITH A CONNECTING DEVICE - The invention provides an optical disk drive with a connecting device. The optical disk drive includes two guiding tracks disposed on two sides of a casing for holding a tray to slide in/out the casing, a circuit board disposed on the tray and electrically connected to a spindle motor and a pick-up head, a main board disposed inside the casing, a detecting switch disposed on the main board, and the connecting device. The connecting device includes a first part disposed on the main board, and a second part disposed on the circuit board for connecting with the first part. The first part is connected with the second part and the optical disk drive is powered on so as to transmit the electricity and the signals between the main board and the circuit board via the connecting device when the detecting switch detects the tray is positioned inside the casing. | 07-15-2010 |
20120096480 | DETECTING METHOD FOR LIMIT SWITCH OF OPTICAL DISC DRIVE BY SAMPLING VOLTAGE OF LIMIT SWITCH PREDETERMINED TIMES - A method is disclosed to detect the voltage of a limit switch in an optical disc drive. The method includes following steps: loading an optical disc when the voltage of the limit switch is at a high level, completing the disc loading process when the voltage is changed to a low level, sampling the voltage of the limit switch predetermined times when the voltage is changed to the high level again, detecting the sampling voltages, completing the disc ejecting process when the sampling voltages are all at the high level, and determining a voltage bouncing to maintain the disc loaded status to avoid disc ejection misjudgment of the optical disc drive when the sampling voltages are not all at the high level. | 04-19-2012 |
20130254784 | OPTICAL DISK DRIVE - An optical disk drive is disclosed to fix a main board in the casing and a second board under the tray. A flat cable on the bottom of the casing connects the main board with one end, and forms a bent portion to connect the connector of the second board at the other end. A cable protection device close to the connector is fixed under the tray to face the bent portion with an incline for preventing the bent portion from bending. | 09-26-2013 |
20130305266 | SLOT-IN TYPE OPTICAL DISK DRIVE - A slot-in type optical disk drive is disclosed. An inclined flange is protruded on the lower end of a guide pin. When ejecting a disc, a power unit moves a slider backward to push a shifting lever at one end of a detecting rod. The detecting rod is rotated to move the guide pin at the other end such that the inclined flange pushes the back edge of the disc to ascend along the inclined flange to avoid jamming. | 11-14-2013 |
Patent application number | Description | Published |
20090138899 | RESTRAINING DEVICE OF OPTICAL DISK DRIVE - The invention is to provide a restraining device of an optical disk drive in which a traverse is disposed. A transmission unit rotates a roller to, load/unload a disc, and drives a slider to move the roller. The transmission unit includes the restraining device moving with the roller. When the optical disk drive carries a disc, the slider moves to release the traverse and push down the roller to move the restraining device away from the vibration range of the traverse. When the optical disk drive does not carry a disc, the slider moves to restrain the traverse and release the roller to move the restraining device close to the front end of the traverse. The vibration range of the traverse is restrained to protect the gear teeth from damage. | 05-28-2009 |
20100077414 | SLOT-IN OPTICAL DISK DRIVE - A slot-in type disk drive fastens a clamping unit with two protrusions around its periphery on the central hole of a base plate. A front positioning part utilizes a stick to link a front right positioning bar and a front left positioning bar to synchronously open or close. A locking rod has a limiting pin inserted into an arc slot on the side of the base plate, and protrudes a locking end from the rear end. A rear positioning part utilizes an idle gear to link rear right and rear left positioning bars to synchronously open or close. The locking end can insert a first or second positioning recess on the rear left positioning bar and a touch block of the locking rod leans against the first protrusion. A lever is disposed on the rear right positioning bar to link a linkage plate set by one end. | 03-25-2010 |
20100077416 | SLOT-IN OPTICAL DISK DRIVE - The invention is to provided an emergency ejection device for a slot-in optical drive, which utilizes a feeding motor to rotate a transmission shaft from one end of the transmission shaft without self-locking. The other end of the transmission shaft extending to the front of the drive forms as a pincer-like slot, and a worm is disposed between the two ends. One end of a gear set having a plurality of gears drives a clamping unit, and the other end rotates a roller. A worm wheel is disposed on one of the gears in the middle of the gear set and is engaged with the worm with self-locking so that the transmission shaft can be rotated by hand to eject a disk. | 03-25-2010 |
Patent application number | Description | Published |
20090127097 | Forming Seed Layer in Nano-Trench Structure Using Net Deposition and Net Etch - A method of forming an integrated circuit structure includes forming a dielectric layer; forming an opening in the dielectric layer; performing a net deposition step to form a seed layer having a portion in the opening, wherein the net deposition step comprises a first deposition and a first etching; performing a net etch step to the seed layer, wherein the net etch step comprises a first etching and a first deposition, wherein a portion of the seed layer remains after the net etch step; and growing a conductive material on the seed layer to fill a remaining portion of the opening. | 05-21-2009 |
20090181164 | Oxidation-Free Copper Metallization Process Using In-situ Baking - A method of forming an integrated circuit structure includes providing a substrate; forming a metal feature over the substrate; forming a dielectric layer over the metal feature; and forming an opening in the dielectric layer. At least a portion of the metal feature is exposed through the opening. An oxide layer is accordingly formed on an exposed portion of the metal feature. The method further includes, in a production tool having a vacuum environment, performing an oxide-removal process to remove the oxide layer. Between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool. The method further includes, in the production tool, forming a diffusion barrier layer in the opening, and forming a seed layer on the diffusion barrier layer | 07-16-2009 |
20120292768 | VIA/CONTACT AND DAMASCENE STRUCTURES - A semiconductor structure is provided and includes a dielectric layer disposed over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is disposed in the opening. | 11-22-2012 |
Patent application number | Description | Published |
20080211106 | VIA/CONTACT AND DAMASCENE STRUCTURES AND MANUFACTURING METHODS THEREOF - A method for forming a semiconductor structure includes forming a dielectric layer over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is then formed and a single polishing operation removes the seed layer and conductive layer. | 09-04-2008 |
20080251889 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. The device includes a substrate, a first metal layer, a dielectric layer, and a second metal layer. The first metal layer comprises a body-centered cubic lattice metal, and overlies the substrate. The dielectric layer overlies the first metal layer. The second metal layer overlies the dielectric layer. | 10-16-2008 |
20120241908 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. The device includes a substrate; a first metal layer overlying the substrate; a dielectric layer overlying the first metal layer; and a second metal layer overlying the dielectric layer, wherein the first metal layer comprises: a first body-centered cubic lattice metal layer; a first underlayer, underlying the first body-centered cubic lattice metal layer, wherein the first underlayer is metal of body-centered cubic lattice and includes titanium (Ti), tungsten (W), molybdenum (Mo) or niobium (Nb); and a first interface of body-centered cubic lattice between the first body-centered cubic lattice metal layer and the first underlayer. | 09-27-2012 |
20130171766 | Annealing Methods for Backside Illumination Image Sensor Chips - A method includes performing a grinding on a backside of a semiconductor substrate. An image sensor is disposed on a front side of the semiconductor substrate. An impurity is doped into a surface layer of the backside of the semiconductor substrate to form a doped layer. A multi-cycle laser anneal is performed on the doped layer. | 07-04-2013 |
20130207218 | Novel Condition Before TMAH Improved Device Performance - The present disclosure relates to a method of forming a back-side illuminated CMOS image sensor (BSI CIS). In some embodiments, the method comprises forming a plurality of photodetectors within a front-side of a semiconductor substrate. An implant is performed on the back-side of the semiconductor substrate to form an implantation region having a doping concentration that is greater in the center than at the edges of the semiconductor substrate. The back-side of the workpiece is then exposed to an etchant, having an etch rate that is inversely proportional to the doping concentration, which thins the semiconductor substrate to a thickness that allows for light to pass through the back-side of the substrate to the plurality of photodetectors. By implanting the substrate prior to etching, the etching rate is made uniform over the back- side of the substrate improving total thickness variation between the photodetectors and the back-side of the substrate. | 08-15-2013 |
20130273735 | Oxidation-Free Copper Metallization Process Using In-situ Baking - A method of forming an integrated circuit structure includes providing a substrate; forming a metal feature over the substrate; forming a dielectric layer over the metal feature; and forming an opening in the dielectric layer. At least a portion of the metal feature is exposed through the opening. An oxide layer is accordingly formed on an exposed portion of the metal feature. The method further includes, in a production tool having a vacuum environment, performing a plasma process to remove the oxide layer. Between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool. The method further includes, in the production tool, forming a diffusion barrier layer in the opening, and forming a seed layer on the diffusion barrier layer | 10-17-2013 |
20140264707 | NOVEL CONDITION BEFORE TMAH IMPROVED DEVICE PERFORMANCE - The present disclosure relates to a back-side illuminated CMOS image sensor (BSI CIS). In some embodiments, the BSI CSI has a semiconductor substrate with a front-side and a back-side. A plurality of photodetectors are located within the front-side of the semiconductor substrate. An implantation region is located within the semiconductor substrate at a position separated from the plurality of photodetectors. The implantation region is disposed below the plurality of photodetectors and has a non-uniform doping concentration along a lateral plane parallel to the back-side of the semiconductor substrate. The non-uniform doping concentration allows for the BSI CSI to achieve a small total thickness variation (TTV) between one or more photodetectors and a back-side of a thinned semiconductor substrate that provides for good device performance. | 09-18-2014 |