Patent application number | Description | Published |
20120025362 | Reinforced Wafer-Level Molding to Reduce Warpage - A method for forming an electrical package to reduce warpage. The method includes providing a wafer and coupling a die thereto. A mold compound material is applied to the wafer such that the mold compound material surrounds the die. The method further includes applying a reinforcing material to the mold compound material. The mold compound material is thereby disposed between the wafer and the reinforcing material. | 02-02-2012 |
20130020711 | Interconnect Pillars with Directed Compliance Geometry - Pillars having a directed compliance geometry are arranged to couple a semiconductor die to a substrate. The direction of maximum compliance of each pillar may be aligned with the direction of maximum stress caused by unequal thermal expansion and contraction of the semiconductor die and substrate. Pillars may be designed and constructed with various shapes having particular compliance characteristics and particular directions of maximum compliance. The shape and orientation of the pillars may be selected as a function of their location on a die to accommodate the direction and magnitude of stress at their location. A method includes fabricating pillars with particular shapes by patterning to increase surface of materials upon which the pillar is plated or deposited. | 01-24-2013 |
20130167103 | System and Method For Use Case-Based Thermal Analysis of Heuristically Determined Component Combinations and Layouts In A Portable Computing Device - Various embodiments of methods and systems for heuristic determination and thermal analysis of component placement on a printed circuit board (“PCB”) for use in a portable computing device (“PCD”) are disclosed. It is an advantage of embodiments that thermal energy generating components, such as processors, may be heuristically selected and arranged on a selected PCB according to varying layouts and combinations and then evaluated for thermal dissipation efficiency under an assortment of use case scenarios. In this way, users of the system and method may quickly narrow down commercially feasible component layouts, identify the most efficient layouts and then heuristically modify the layouts to develop an optimal arrangement. | 06-27-2013 |
20130285233 | THERMAL MANAGEMENT OF INTEGRATED CIRCUITS USING PHASE CHANGE MATERIAL AND HEAT SPREADERS - At least one feature pertains to an apparatus having passive thermal management that includes an integrated circuit die, a heat spreader thermally coupled to the integrated circuit die, a phase change material (PCM) thermally coupled to the heat spreader, and a molding compound that encases the heat spreader and the PCM. In one example, the heat spreader may include a plurality of fins, and at least a portion of the PCM is interposed between the plurality of fins. Another feature pertains to an apparatus that includes an integrated circuit die, and a molding compound having a phase change material intermixed therein. The resulting molding compound completely encases the die. | 10-31-2013 |
20140097535 | STACKED MULTI-CHIP INTEGRATED CIRCUIT PACKAGE - A multi-chip integrated circuit (IC) package is provided which is configured to protect against failure due to warpage. The IC package may comprise a substrate, a level-one IC die and a plurality of level-two IC dies. The level-one IC die having a surface that is electrically coupled to the substrate. The plurality of level-two IC dies is stacked above the level-one IC die. The plurality of level-two IC dies may each have an active surface that is electrically coupled to the substrate. The plurality of level-two IC dies may be arranged side by side such that the active surfaces of the plurality of level-two IC dies are positioned substantially in a same plane. Relative to a single die configuration, the level-two IC dies are separated thereby inhibiting cracking, peeling and/or other potential failures due to warpage of the IC package. | 04-10-2014 |
20140252544 | DC/ AC DUAL FUNCTION POWER DELIVERY NETWORK (PDN) DECOUPLING CAPACITOR - Some implementations provide a semiconductor device that includes a first substrate, a die coupled to the first substrate, and a set of solder balls coupled to the first substrate. The set of solder balls is configured to provide an electrical connection between the die and a second substrate. The semiconductor device also includes at least one decoupling capacitor coupled to the die through the first substrate. The at least one decoupling capacitor is configured to provide an electrical connection between the die and the second substrate. The at least one decoupling capacitor is coupled to the first substrate such that the at least one decoupling capacitor is positioned between the first substrate and the second substrate. In some implementations, the second substrate is a printed circuit board (PCB). In some implementations, the first substrate is a first package substrate, and the second substrate is a second package substrate. | 09-11-2014 |
20150048517 | CRACK STOPPING STRUCTURE IN WAFER LEVEL PACKAGING (WLP) - Some implementations provide a semiconductor device (e.g., die, wafer) that includes a substrate, metal layers and dielectric layers coupled to the substrate, a pad coupled to one of the several metal layers, a first metal redistribution layer coupled to the pad, an under bump metallization (UBM) layer coupled to the first metal redistribution layer. The semiconductor device includes several crack stopping structures configured to surround a bump area of the semiconductor device and a pad area of the semiconductor device. The bump area includes the UBM layer. The pad area includes the pad. In some implementations, at least one crack stopping structure includes a first metal layer and a first via. In some implementations, at least one crack stopping structure further includes a second metal layer, a second via, and a third metal layer. In some implementations, at least one crack stopping structure is an inverted pyramid crack stopping structure. | 02-19-2015 |