20th week of 2012 patent applcation highlights part 21 |
Patent application number | Title | Published |
20120119706 | Solid-state chemical current source and a method for increasing a discharge power - A solid-state chemical current source and a method for increasing a discharge power thereof are disclosed. The current source can be used in electrochemical engineering, in particular for primary and secondary solid-state chemical power sources. The solid-state chemical current source comprises a body provided with current leading-out wires and solid-state galvanic cells which are arranged therein, are connected to the current leading-out wires, are based on solid ion conductors and perform the function of heating elements. A heat insulation for reducing heat losses of the heated galvanic cells is arranged inside and\or outside the body. The inventive method for increasing the discharge power of the solid-state chemical current source by heating it consists in using the heat produced by the electric current flowing through the galvanic cells and in maintaining the hot state of the said galvanic cells during the discharge. | 2012-05-17 |
20120119707 | ELECTRIC CELLS FOR BATTERY PACK, BATTERY CONTROL SYSTEM, AND BATTERY CONTROL METHOD - There are provided a battery control system and a battery control method which can eliminate a management device controlling voltages of individual cells in a battery pack, resist the influence of noise, prevent an increase in size, and reduce the load on a management device. A cell for a battery pack will be interconnected with another cell to be used as a battery pack, the cell comprises unit cell | 2012-05-17 |
20120119708 | CHARGING BASE, CHARGING SYSTEM AND CHARGING METHOD - A charger includes a case | 2012-05-17 |
20120119709 | BATTERY PACK BALANCING CIRCUIT - A battery management balancing device provides local discharge circuits for individual cells of a battery pack, where the discharge circuits include a power transistor. The use of a power transistor yields a controllable balancing current through that transistor between a cathode and anode of the individual cell. A microcontroller monitors a state of charge of each cell, such as by measuring the cell voltages, and provides control signals, for example indicating a target voltage for each cell, that drive the power transistors in designated discharge circuits. | 2012-05-17 |
20120119710 | Charging Circuit for a Charge Accumulator and Method for Charging the Same - In one embodiment, a charging circuit for a charge accumulator comprises a first terminal (A | 2012-05-17 |
20120119711 | HIGH VOLTAGE DC POWER GENERATION - A DC power generating system includes a permanent magnet generator (PMG), an active rectifier in electrical communication with the PMG, and a controller in electrical communication with the active rectifier, wherein the controller is configured to regulate d-q components of a stator current of the PMG in a synchronous reference frame. | 2012-05-17 |
20120119712 | CONTROL METHOD FOR DOUBLY-FED ELECTRIC GENERATOR - Exemplary embodiments provide a method of controlling a doubly-fed electric generator using a frequency converter having a torque and flux controller. The frequency converter is connected to a rotor of the generator. The frequency converter calculates a stator flux positive sequence component from a stator flux. A rotor flux amplitude reference and an estimated torque is then calculated by using the stator flux positive sequence component. The frequency converter selects a voltage vector to steer the rotor flux by using the rotor flux amplitude reference and the estimated torque. | 2012-05-17 |
20120119713 | DEVICE FOR CONTROLLING POWER GENERATION OF ON-VEHICLE POWER GENERATOR - A device for controlling an on-vehicle power generator is provided with switching means, detecting means, voltage control means, startup control means and normal state control means. The voltage control means controls the output voltage of the power generator together with the switching means. The detecting means detects state of the power generation including a startup state where the engine is in startup condition and a normal state where normal power generation has been performed. The startup control means controls the voltage control means to start/stop of the power generation based on the frequency of the phase voltage of the power generator in the startup state. The normal state control means controls the voltage control means in the normal state such that the normal state control means controls the voltage control means to continue the power generation or stops the power generation based on the frequency of the phase voltage. | 2012-05-17 |
20120119714 | Method and apparatus for load identification - A load communication device and method is provided, that identifies and transmits to a PSU the load requirement to operate a load device that is powered by the PSU, by analyzing the characteristics of current applied to the load device by a given input voltage generated by the PSU. The load communication device is configured to transmit between the PSU and the load device solely over the 2 wire cable that extends between the PSU and the load device. | 2012-05-17 |
20120119715 | CONTROL CIRCUITRY IN A DC/DC CONVERTER FOR ZERO INDUCTOR CURRENT DETECTION - A converter controller for discharge of a coil used in a DC/DC converter including a voltage detector connected to monitor a state of a diode connected between the coil and ground and an offset comparator, having an adjustable offset, for causing a coil discharge path to be interrupted. The comparator is provided with an initial high offset so that for at least a first converter switching period, the coil will have sufficient charge when the coil discharge path is interrupted to cause the diode to become forward biased as determined by the voltage detector. The offset is periodically reduced until the coil is sufficiently discharged so that the diode is not forward biased, with that value of offset being optimum and thus used in subsequent switching periods. | 2012-05-17 |
20120119716 | POWER SUPPLY CIRCUIT - A power supply circuit is disclosed in embodiments of the present invention, which includes: a voltage output device, configured to generate an output voltage; a parasitic resistance, connected between an output end of the voltage output device and an external load, where two ends of the parasitic resistance generate a voltage drop; and a compensation circuit, connected to the output end of the voltage output device and configured to generate a compensation voltage, where the compensation voltage is loaded onto the voltage output device, so as to offset the voltage drop generated by the parasitic resistance, so that a voltage obtained at an input end of the load is roughly equal to the output voltage generated by the voltage output device. The circuit is applicable to improving load regulation of a power supply. | 2012-05-17 |
20120119717 | Voltage Regulator Module with Power Gating and Bypass - Mechanisms are provided for either power gating or bypassing a voltage regulator. Responsive to receiving an asserted power gate signal to power gate the output voltage of the voltage regulator, at least one of first control circuitry power gates the output voltage of a first circuit or second control circuitry power gates the output voltage of a second circuit such that substantially no voltage to is output by the first circuit to a primary output node. Responsive to receiving an asserted bypass signal to bypass the output voltage of the voltage regulator, at least one of the first control circuitry bypasses the output voltage of the first circuit or the second control circuitry bypasses the output voltage of a second circuit such that substantially the voltage of a voltage source is output by the first circuit to the primary output node. | 2012-05-17 |
20120119718 | SELF-ADAPTIVE CURRENT-MODE-CONTROL CIRCUIT FOR A SWITCHING REGULATOR - A current-mode-control circuit for a switching regulator is provided. The circuit includes a first transistor coupled to a power supply voltage, a second transistor, and an inductor. The circuit further includes a slope compensation generation circuit coupled to the output of the current control circuit through a feedback loop, the slope compensation generation circuit generating a slope compensation current related to the output voltage, an inductor current sensing circuit coupled to the first transistor and the second transistor, and configured to calculate a current through the inductor and output a inductor sense current, and a pulse-width modulation control circuit coupled to the slope generation circuit and the inductor current sense circuit, the pulse-width modulation control circuit receiving the output of the current control circuit, the slope compensation current and the inductor sense current as inputs. | 2012-05-17 |
20120119719 | POWER SUPPLY CIRCUIT - According to one embodiment, a power supply circuit includes a switching control unit that compares a DA converted value of the high order bit of a digital compensation value calculated from an output voltage of a smoothing circuit with a detection value of a current flowing into the smoothing circuit and controls the switching of a switching element on the basis of a signal obtained by shifting the timing of the comparison result on the basis of the low order bit of the digital compensation value. | 2012-05-17 |
20120119720 | Load Transient Booster - A switching regulator comprises a PWM controller that controls switching of a power converter via a PWM control signal. The switching regulator detects load transients in the load driven by the power converter. Responsive to the detection of a load transient, the switching regulator resets a PWM clock synchronously with a fast clock operating at a higher frequency than the PWM clock. By doing so, the switching regulator beneficially responds more quickly to changes in the load than with conventional architectures that utilize only the slower PWM clock. This provides improved transient response without sacrificing power efficiency. | 2012-05-17 |
20120119721 | CIRCUIT ARRANGEMENT INCLUDING VOLTAGE SUPPLY CIRCUIT - A circuit arrangement comprising a first semiconductor switching element, which has a load path and a drive terminal. A voltage supply circuit, is provided including an inductance connected in series with the load path of the first semiconductor switching element, and a capacitive charge storage arrangement, which is connected in parallel with the inductance and which has a first and a second output terminal for providing a supply voltage. | 2012-05-17 |
20120119722 | POWER CONVERTER CONTROL METHOD - Optimizes the operation and control of electric generators against events produced in the power grid, such as voltage dips or overvoltages, comprising the following steps: detecting that the DC bus voltage level (V | 2012-05-17 |
20120119723 | VOLTAGE CONVERSION APPARATUS AND ELECTRICAL LOAD DRIVING APPARATUS - A voltage conversion apparatus is disclosed in which a current passes through first and second loop circuits alternately in accordance with ON/OFF operation of a first switching element provided in the first circuit. The direction of a magnetic field through the first loop circuit formed at the ON operation is the same as a direction of a magnetic field through the second loop circuit formed at the OFF operation. The first loop circuit and the second loop circuit are provided on opposite sides of a printed circuit board, respectively, in such a manner that the first loop circuit and the second loop circuit are opposed to each other. A heat sink is provided on a surface of the printed circuit board. A solid pattern of a metal material is provided on an inner layer of the printed circuit board to be connected to the heat sink via a through hole. | 2012-05-17 |
20120119724 | CURRENT GENERATING CIRCUIT - A first current source generates a first current having positive temperature characteristics. A second current source generates a second current. A first current mirror circuit generates a third current by multiplying, by a first coefficient, the base current of a compensation transistor configured as an NPN bipolar transistor arranged on a path of the second current. A second current mirror circuit generates a fourth current that is proportional to the difference between the first current and the third current. A current generating circuit outputs the sum total of the fourth current and a fifth current that is proportional to the base current. | 2012-05-17 |
20120119725 | DEVICE AND METHOD FOR SURFACE - The invention relates to a device for treating surfaces of objects with rounded cross sections and at least one partially electrically conductive outer wall, comprising a plurality of treating stations; and a feed device including support devices for supporting objects to be treated, wherein the feed device is configured to transport the objects supported by a respective support device in a timed sequence from one treating station to another treating station, wherein one of the treating stations is a test station and includes a voltage source, an electrode coupled with the voltage source and a processing unit, wherein the processing unit is configured to detect voltage changes between the electrode and a respective object disposed at the respective test station. The invention also relates to an accordingly configured test station for a device for treating surfaces of objects with rounded cross sections and at least one partially electrically conductive outer wall and to a method for treating surfaces of objects with rounded cross sections and at least one partially electrically conductive outer wall. | 2012-05-17 |
20120119726 | MEASURING MACHINE AND MEASURING METHOD FOR MEASURING DIFFERENTIAL SIGNALS - A measuring device for the measurement of differential signals including a real-time portion, which contains two probes, a signal adder and a triggering device. The probes each record a partial signal of a differential signal. The signal adder adds the partial signals to form a differential signal. The triggering device implements a triggering on the basis of the differential signal. | 2012-05-17 |
20120119727 | SENSOR WITH HIGH FREQUENCY AC MAGNETIC FIELD - A sensor device for detecting one or more magnetic particles ( | 2012-05-17 |
20120119728 | INDUCTIVE DISTANCE SENSOR - Inductive adjustment of the core-fitted coil ( | 2012-05-17 |
20120119729 | ROTATING FIELD SENSOR - A rotating field sensor includes a first detection circuit that outputs a first signal indicating the intensity of a component of a rotating magnetic field in a first direction, a second detection circuit that outputs a second signal indicating the intensity of a component of the rotating magnetic field in a second direction, and an arithmetic circuit that calculates a detected angle value based on the first and second signals. Each of the first and second detection circuits includes at least one MR element row. Each MR element row is composed of a plurality of MR elements connected in series. Each MR element has a magnetization pinned layer. The plurality of MR elements forming each MR element row include one or more pairs of MR elements. Magnetization directions of the magnetization pinned layers in two MR elements making up a pair form a predetermined relative angle other than 0° and 180°. | 2012-05-17 |
20120119730 | AXIS AXIAL POSITION MEASUREMENT SYSTEM - Axis axial position measurement system uses the electric signal generated by one or more sensors at the passage of teeth of a cogwheel fixed on the axis. The cogwheel is cut with at least one group of teeth, including at least three types of teeth of different height: a first type of teeth ( | 2012-05-17 |
20120119731 | ANGLE SENSOR - A system for detecting the absolute rotational angle of a shaft rotatable more than one revolution includes a drive wheel connected to the shaft to rotate therewith. The drive wheel includes measurement sectors adjacent to one another in a circumferential direction. First and second driven wheels are engaged to the drive wheel. First and second sensors monitor rotational positions of the driven wheels to thereby detect an absolute rotational angle of the shaft. A third sensor monitors a relative angular position of the shaft in relation to a detected one of the measurement sectors to thereby detect the relative angular position of the shaft within one revolution of the shaft. The detected absolute rotational angle of the shaft is refined with the detected relative angular position of the shaft to thereby generate the absolute rotational angle of the shaft with more precision. | 2012-05-17 |
20120119732 | MAGNETOSTRICTIVE SENSOR ARRAY FOR ACTIVE OR SYNTHETIC PHASED-ARRAY FOCUSING OF GUIDED WAVES - A system includes at least one strip of ferromagnetic material and a plurality of pulsing/receiving coil circuits. The at least one strip of ferromagnetic material is induced with a bias magnetic field and is coupled to a surface of a structure under test. The plurality of pulsing/receiving coil circuits are aligned with a surface of the at least one strip of the ferromagnetic material. The plurality of pulsing/receiving coil circuits are individually controllable by a number of channels to excite guided waves in the structure under test using at least one of active phased-array focusing or synthetic phased-array focusing of the guided waves. | 2012-05-17 |
20120119733 | INSPECTION DEVICE - An inspection device that is capable of inspecting all heat-transfer-tube sealing portions in a steam generator and that is also capable of analyzing a defect shape is provided. An inspection device that employs the eddy-current flaw detection method to inspect the presence/absence of a defect in a welded portion ( | 2012-05-17 |
20120119734 | HALL INTEGRATED CIRCUIT USING RECTIFIER CIRCUIT - There is provided a hall integrated circuit using a rectifier circuit including: a hall device receiving a power supply voltage for excitation and outputting a hall voltage which is in proportion to the intensity of an applied magnetic field; an amplifier amplifying the hall voltage; and a rectifying unit rectifying the amplified hall voltage to improve sensitivity and modify for user convenience by ensuring a high headroom at even a low power supply voltage. | 2012-05-17 |
20120119735 | XMR SENSORS WITH HIGH SHAPE ANISOTROPY - Embodiments relate to xMR sensors having very high shape anisotropy. Embodiments also relate to novel structuring processes of xMR stacks to achieve very high shape anisotropies without chemically affecting the performance relevant magnetic field sensitive layer system while also providing comparatively uniform structure widths over a wafer, down to about 100 nm in embodiments. Embodiments can also provide xMR stacks having side walls of the performance relevant free layer system that are smooth and/or of a defined lateral geometry which is important for achieving a homogeneous magnetic behavior over the wafer. | 2012-05-17 |
20120119736 | Automated Teller Machine and Medium Detecting Device - A medium detecting device is provided. The medium detecting device includes a sensor adapted to detect magnetism of a medium being transferred; and a pressing unit adapted to press the medium toward the sensor, and the pressing unit includes at least one supporting part including a plurality of supporters to press the medium toward the sensor; and an elastic member adapted to elastically support the supporting part. | 2012-05-17 |
20120119737 | PHASE-DEPENDENT MAGNETIC-RESONANCE IMAGING WITH MULTIPLE COILS - In a method and magnetic resonance system to determine a magnetic resonance (MR) image of an examination subject, wherein multiple coil-specific MR data sets that are acquired by multiple coils are used for the MR image. Each pixel of the MR image is determined from at least two coil-specific MR data sets of different coils ( | 2012-05-17 |
20120119738 | METHODS AND APPARATUS FOR SAMPLE TEMPERATURE CONTROL IN NMR SPECTROMETERS - Described are methods and apparatus, referred to as “temperature-lock,” which can control and stabilize the sample temperature in an NMR spectrometer, in some instances with a precision and an accuracy of below about | 2012-05-17 |
20120119739 | ARRANGEMENT AND METHOD FOR INFLUENCING AND/OR DETECTING MAGNETIC PARTICLES AND FOR MAGNETIC RESONANCE IMAGING - Magnetic particle imaging allows the imaging of fast tracer dynamics, but there is no native tissue contrast. A combination with MRI solves this issue. However, coil geometries in MPI and MRI differ significantly, making direct use impractical. According to one aspect of the present invention it is proposed to use pre-polarized MRI to overcome these difficulties. Further, methods and arrangements are proposed to achieve MRI imaging with minimal additional hardware. | 2012-05-17 |
20120119740 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - According to one embodiment, a magnetic resonance imaging apparatus includes a spectrum acquisition unit, a resonance frequency acquisition unit and an imaging unit. The spectrum acquisition unit is configured to acquire frequency spectra of magnetic resonance signals from an object with changing a suppression effect or an enhancing effect of signals from a specific material. The resonance frequency acquisition unit is configured to obtain a resonance frequency of the specific material or another material based on an index representing a difference in intensities of signals from the specific material or the another material between the frequency spectra. The imaging unit is configured to perform imaging using a radio frequency pulse of which center frequency is set to the resonance frequency of the specific material or the another material. | 2012-05-17 |
20120119741 | GRADIENT COIL ARRANGEMENT AND PRODUCTION METHOD - The present embodiments optimize a gradient coil structure with a gradient coil arrangement for a magnetic resonance tomography device. The gradient coil arrangement includes a carrier plate with holes. Inserts are located in the holes. The inserts are made of an electrically isolating, thermally conductive material. | 2012-05-17 |
20120119742 | CAGE IN AN MRD WITH A FASTENING/ATTENUATING SYSTEM - A cage with a fastening system ( | 2012-05-17 |
20120119743 | MULTI-MODE ELECTROMAGNETIC SURVEYING - A method for providing information about a region below the earth's surface, comprises a) providing data from a system comprising an inductive source providing inductive signals in the region and a plurality of galvanic receivers for receiving galvanic signals resulting from the inductive signals, wherein the galvanic signals are the result of mode conversion occurring in the subsurface region; and b) processing the data. Step b) may include generating at least one galvanic virtual source signal. | 2012-05-17 |
20120119744 | SYSTEM AND METHOD FOR IMAGING PROPERTIES OF SUBTERRANEAN FORMATIONS - A system and method for imaging properties of subterranean formations in a wellbore is provided. The system comprises a formation sensor for collecting currents injected into the subterranean formations, the formation sensor positionable on a downhole tool deployable into the wellbore. The system comprises a controller for controlling the formation sensor and a formation imaging unit. The formation imaging unit comprises a current management unit for collecting data from the currents injected into the subterranean formations, the currents having at least two different frequencies. The formation imaging unit comprises a drilling mud data unit for determining at least one drilling mud parameter, a formation data unit for determining at least one formation parameter from the collected data, and an inversion unit for determining at least one formation property by inverting the at least one formation parameter. | 2012-05-17 |
20120119745 | BATTERY MONITOR WITH CORRECTION FOR INTERNAL OHMIC MEASUREMENTS OF BATTERY CELLS IN PARALLEL CONNECTED BATTERY STRINGS - A battery monitor determines an internal resistance of a battery cell of a battery having parallel connected battery strings which accounts for errors introduced by the parallel connected battery strings. When determining the internal resistance of a battery cell, the battery monitor determines a baseline intercell resistance of an intercell connecting the negative terminal of the battery cell to the positive terminal of an adjacent battery. The battery monitor then applies a momentary load across the battery cell and immediately prior to releasing the load, measures the voltage across the battery cell (loaded voltage) and the voltage across the intercell. The battery monitor then calculates the current flowing through the intercell (intercell current) by dividing the measured voltage across the intercell by the determined intercell resistance. Immediately after releasing the load, the battery monitor measures the voltage across the battery cell (recovered voltage) and determines the battery cell internal resistance by dividing the difference between the recovered voltage and the loaded voltage by the intercell current. | 2012-05-17 |
20120119746 | SYSTEMS AND METHODS FOR INTELLIGENT, ADAPTIVE MANAGEMENT OF ENERGY STORAGE PACKS - Systems and methods for intelligent, adaptive management of energy storage packs are disclosed. A method comprises receiving a first current measurement of a first energy storage cell electrically connected to a first converter circuit. The first converter circuit controls the charge and discharge of the first energy storage cell. A first voltage measurement of the first energy storage cell is received. A first temperature measurement of the first energy storage cell is received. The first current measurement, the first voltage measurement, and the first temperature measurement are translated into a state of charge of the first energy storage cell. | 2012-05-17 |
20120119747 | BATTERY CONFIRMATION SYSTEM AND METHOD FOR CONFIRMING STATE OF CHARGE IN VEHICLE BATTERY - A battery confirmation system and method for confirming a state of charge in a vehicle battery installed in a vehicle includes a vehicle having a controller, a battery powering the controller, and an onboard diagnostics connector operatively connected to the controller. A tester is connectable to the onboard diagnostics connector. The tester is configured to receive a vehicle operating voltage from the connector when an electrical load on the battery is within a predetermined load range and to determine a SOC value based on the vehicle operating voltage. | 2012-05-17 |
20120119748 | BATTERY VOLTAGE MEASUREMENT SYSTEM AND BATTERY VOLTAGE MEASUREMENT METHOD - The present invention provides a battery voltage measurement system and battery voltage measurement method that may reduce the size of the battery voltage measurement system. A regulator generates a constant voltage based on a battery voltage, and inputs the constant voltage to an analog input terminal of an AID converter. The battery voltage is directly inputted to a reference voltage terminal of the AID converter via a terminal (a pad). The A/D converter uses the battery voltage as a reference voltage, determines the level of the input voltage which is the constant voltage, in respect to the reference voltage, and outputs a conversion result. The conversion results increase with a decrease in the battery voltage. Accordingly, the battery voltage is measured and monitored by a processing section on the basis of the conversion results. | 2012-05-17 |
20120119749 | CHARGE STATE DETECTION CIRCUIT, BATTERY POWER SUPPLY DEVICE, AND BATTERY INFORMATION MONITORING DEVICE - A charge state detection circuit, which detects a state of charge of a battery block in which are parallel-connected a plurality of series circuits of a secondary battery and a cutoff element which assumes a cutoff state of cutting off the charge/discharge path of the secondary battery and a conducting state different from the cutoff state, the charge state detection circuit comprising: an effective battery number detection portion which detects, as the number of effective batteries, the number of cutoff elements in the conducting state from among the plurality of cutoff elements included in the battery block; a capacity information generation portion which, based on the number of effective batteries, generates capacity information related to actual full charge capacity, which is the actual full charge capacity of the battery block; a total current detection portion, which detects as a total current value a current flowing in the entire battery block; an electricity quantity calculation portion, which calculates, as a stored electricity quantity, an electricity quantity stored in the battery block, by integrating the total current value; and a charge state detection portion, which, based on the capacity information and the stored electricity quantity, detects a state of charge, which is a ratio of the stored electricity quantity to the actual full charge capacity. | 2012-05-17 |
20120119750 | Container for Measuring Cell Potential - A cellular electric potential measuring container includes a container body and an electrode substrate, the electrode substrate being attached to a lower end of the container body so as to form a plurality of wells. The container body is made from resin and comprises a plurality of tubular portions whose upper and lower ends are open, each of the tubular portions comprises in an inner cavity a measurement portion tapered toward the lower end and having a measurement hole at the lower end, and further on an inner wall at least two retaining means retaining the measurement portion. The electrode substrate comprises a substrate body, with a plurality of measurement electrodes and a plurality of reference electrodes being disposed on one surface of the substrate body. The container body is attached to the surface of the substrate body on which the measurement electrodes and the reference electrodes are disposed, such that the measurement electrodes are exposed through the measurement holes. | 2012-05-17 |
20120119751 | MULTI-POLE ARCING FAULT CIRCUIT BREAKER INCLUDING A NEUTRAL CURRENT SENSOR - A fault detection system is provided for a power distribution system having at least first and second line conductors carrying AC currents that are out of phase with each other from a source to a load, and a common neutral conductor. The system includes an arcing fault current sensor comprising a coil wound on a hollow core and coupled to both of the line conductors in a manner that the electrical currents in the line conductors flow in opposite directions inside the hollow core, thus inducing in the coil an output signal that is a function of the difference of the electrical currents in the line conductors. A neutral current sensor produces an output signal representing the magnitude and phase direction of current in the neutral conductor. An arcing fault detection circuit includes a processor programmed to (1) respond to a change in the first output signal to analyze the second output signal to determine whether the change in the first output signal is attributable at least in part to current in a line-to-line circuit, (2) if the answer is affirmative, determine a scaling factor to be used to adjust the value of the first output signal, and (3) analyze the adjusted first output signal to determine whether an arcing fault has occurred and produce a trip signal in response to the detection of an arcing fault. | 2012-05-17 |
20120119752 | TEST APPARATUS AND CIRCUIT MODULE - Provided are a first test substrate and a second test substrate opposing each other, a first test circuit testing a device under test and being disposed on a face of the first test substrate that faces the second test substrate, a second test circuit testing the device under test and being disposed on a face of the second test substrate that faces the first test substrate, and a sealing section that is formed by sealing a space between the first test substrate and the second test substrate to enclose the first test circuit and the second test circuit in a common space that is filled with coolant. | 2012-05-17 |
20120119753 | System and Method of Detecting and Locating Intermittent Electrical Faults In Electrical Systems - Signals are transmitted from at least one transmitter that is positioned in an electrical network. The signals that have been transmitted are received a single receiver positioned within the electrical network. At the single receiver, the received signals are analyzed and a determination from the analyzing the received signals is made as to whether a fault has occurred in the electrical network and the approximate location of the fault. | 2012-05-17 |
20120119754 | METHOD AND DEVICE FOR INSULATION MONITORING OF NON-GROUNDED ELECTRICAL DC AND AC GRIDS - Exemplary methods are directed to insulation monitoring of non-grounded electrical DC power supply systems and AC power supply systems which have a resistive (R | 2012-05-17 |
20120119755 | INSULATION RESISTANCE MEASUREMENT DEVICE AND INSULATION RESISTANCE MEASUREMENT METHOD - An object is to detect an insulation failure of a DC circuit with high sensitivity and in safety by means of a simple detection circuit. An insulation resistance measurement device of this invention is a device for measuring an insulation resistance to ground of a DC source circuit and is provided with connection terminals for connections to a positive electrode and a negative electrode of a series power supply, switch elements connected between the connection terminals and the ground potential and configured to switch connections between the connection terminals and the ground potential, resistive elements connected through the switch elements between the connection terminals, respectively, and the ground potential, and a voltage detection unit for detecting voltage drops in the resistive elements. | 2012-05-17 |
20120119756 | DETECTION METHOD OF LOW FREQUENCY HANDSHAKING SIGNAL - A detection method of low frequency handshaking signal is described. The method includes the following steps of: (a) performing first impedance calibration when host device is activated for sending a first low frequency signal based on the first impedance calibration and performing a second impedance calibration when a controlled device is activated for sending a second low frequency signal based on the second impedance calibration; (b) transmitting a first high frequency training signal from the host device to the second receiver of the controlled device when the first low frequency signal and the second low frequency signal are in a predetermined condition; and (c) transmitting a second high frequency training signal from the controlled device to the first receiver of the host device wherein the frequency of the first low frequency signal and the second low frequency signal is smaller than the frequency of the first high frequency training signal and the second high frequency training signal. | 2012-05-17 |
20120119757 | Electronic Device and Noise Current Measuring Method - A noise current passing through a substrate on which an electronic component is mounted is suppressed in a housing, to provide a malfunction of an electronic device. A substrate ( | 2012-05-17 |
20120119758 | METHOD FOR DETERMINING AND/OR MONITORING AT LEAST ONE PHYSICAL, PROCESS VARIABLE OF A MEDIUM - A method for determining and/or monitoring at least one physical, process variable of a medium with an oscillatable unit, wherein the oscillatable unit is excited by means of a frequency search sweep within a predetermined frequency band in the working range of the oscillatable unit in the form of transmitted signals successively to oscillate with discrete exciter frequencies wherein the corresponding oscillations of the oscillatable unit are received in the form of received signals, wherein, via the frequency search sweep, the exciter frequency is ascertained, in the case of which the oscillatable unit oscillates with an oscillation frequency, which has a predetermined phase shift between the transmitted signal and the received signal. The transmitting/receiving unit excites the oscillatable unit to oscillate with the ascertained oscillation frequency. The selected points in time depend on the predetermined phase shift between transmitted signal and received signal and that the voltage values sampled at the discrete exciter frequencies of the received signal are evaluated with reference to their amplitude. | 2012-05-17 |
20120119759 | SELF DIAGNOSTICS OF A PARTICULATE MATTER SENSOR - A particulate matter sensor includes first and second electrodes spaced from each other with a bias resistor connected between the first and second electrodes. The particulate matter sensor allows an open circuit fault condition in the sensor or in the connectors or wiring to the sensor to be detected. A sensing system using the particulate matter sensor and a method for diagnosing faults in a sensing system are also provided. | 2012-05-17 |
20120119760 | PERFORATED CONTACT ELECTRODE ON VERTICAL NANOWIRE ARRAY - Disclosed herein is a structure having: a support, a plurality of nanowires perpendicular to the support, and an electrode in contact with a first end of each nanowire. Each nanowire has a second end in contact with the support. The electrode contains a plurality of perforations. The electrode contains a plurality of perforations. Also disclosed herein is a method of: providing the above support and nanowires; depositing a layer of a filler material that covers a portion of each nanowire and leaves a first end of each nanowire exposed; depositing a plurality of nanoparticles onto the filler material; depositing an electrode material on the nanoparticles, the ends of the nanowires, and any exposed filler material; and removing the nanoparticles and filler material to form an electrode in contact with the first end of each nanowire; wherein the electrode contains a plurality of perforations. | 2012-05-17 |
20120119761 | METHOD OF ELECTRICALLY CHARACTERIZING A COMPOSITE MATERIAL FOR MANUFACTURING AN AIRCRAFT - In the method of electrically characterizing a composite material for manufacturing an aircraft, the following steps are performed: compressing two spacers against at least one test piece made of a composite material; determining an electrical resistance value for the assembly formed by the spacers and the test piece; and deducing from said value a value for the electrical resistance of the composite material. | 2012-05-17 |
20120119762 | Container for Measuring Cell Potential and Method for Producing Same - A cellular electric potential measuring container includes a container body and an electrode substrate, the electrode substrate being attached to a lower end of the container body so as to form a plurality of wells, the cellular electric potential measuring container being for measuring cellular electric potential after being mounted on an electric potential measuring device, wherein the container body comprises: a plurality of tubular portions whose upper and lower ends are open. The electrode substrate includes a substrate body, with a plurality of measurement electrodes and a plurality of reference electrodes being disposed on one surface of the substrate body, and the container body is attached to the surface of the substrate body on which the measurement electrodes and the reference electrodes are disposed, and a method for producing a cellular electric potential measuring container. | 2012-05-17 |
20120119763 | Circuits and Methods for Sensing Resistance - Embodiments of the present invention include circuits and methods for sensing resistance. In one embodiment, a current is generated into a node. The node is coupled to a first terminal of a resistor. A second terminal of the resistor is coupled in series with a capacitance and a reference voltage. The current is turned off when a voltage on the node meets a threshold. A second voltage is detected on the node after the current is turned off. A resistance value is determined based on the first voltage on the node and the second voltage on the node. In one embodiment, the resistor is external to an integrated circuit and sensed through a single pin of the integrated circuit. The integrated circuit may include a current source, comparator, and a digital-to-analog converter. | 2012-05-17 |
20120119764 | TEST MODE CONTROL CIRCUIT OF SEMICONDUCTOR APPARATUS AND CONTROL METHOD THEREOF - Various embodiments of a test mode control circuit of a semiconductor apparatus and related methods are disclosed. In one exemplary embodiment, the test mode control circuit may include: a test mode control block configured to generate a plurality of control signal sets in response to a first address signal set and a second address signal set which are sequentially inputted; a test mode transfer block configured to transfer a plurality of test mode signals, which are generated according to a combination of the plurality of control signal sets, to a plurality of circuit blocks of the semiconductor apparatus; and a plurality of global lines configured to transmit the plurality of control signal sets to the test mode transfer block. | 2012-05-17 |
20120119765 | BATTERY SIMULATION SYSTEM HAVING FAULT SIMULATION - A battery emulation device for simulating a battery cell voltage at a terminal of a battery control unit in accordance with a setpoint value includes a control unit configured to determine the setpoint value and provide the determined setpoint value via a galvanically isolated interface; and at least one emulation channel, each including: a voltage source; an amplifier unit; connection lines for connecting the emulation channel; measurement lines; and a fault simulation device configured to simulate fault states. | 2012-05-17 |
20120119766 | PROBE APPARATUS AND METHOD FOR CORRECTING CONTACT POSITION - A probe apparatus includes a movable mounting table for supporting an object to be tested; a probe card disposed above the mounting table and having a plurality of probes to come into contact with electrodes of the object; a support body for supporting the probe card; and a control unit for controlling the mounting table. Electrical characteristics of the object are tested based on a signal from a tester by bringing the object and the probes into electrical contact with each other by overdriving the mounting table in a state where a test head is electrically connected with the probe card by a predetermined load. Further, one or more distance measuring devices for measuring a current overdriving amount of the mounting table are provided at one or more locations of the test head or the probe card. | 2012-05-17 |
20120119767 | POWER CYCLING TEST ARRANGEMENT - A device instructs a power supply to provide a current to a power cycling test structure that includes a heat source interconnected with a package, via a first level interconnect mechanism, and a printed circuit board (PCB) interconnected with the package, via a second level interconnect mechanism. The device also monitors thermal feedback associated with the heat source, and monitors, based on the provided current, voltage feedback associated with the power cycling test structure. The device further determines a thermal profile of the power cycling test structure based on the thermal feedback and the voltage feedback. | 2012-05-17 |
20120119768 | Method and System of Improved Reliability Testing - A method and system of improved reliability testing includes providing a first substrate and a second substrate, each substrate comprising only a first metallization layer; processing regions on a first substrate by combinatorially varying at least one of materials, unit processes, and process sequences; performing a first reliability test on the processed regions on the first substrate to generate first results; processing regions on a second substrate in a combinatorial manner by varying at least one of materials, unit processes, and process sequences based on the first results of the first reliability test; performing a second reliability test on the processed regions on the second substrate to generate second results; and determining whether the first substrate and the second substrate meet a predetermined quality threshold based on the second results. | 2012-05-17 |
20120119769 | APPARATUS FOR THERMAL TESTING OF A PRINTED CIRCUIT BOARD - An apparatus for thermal testing of a printed circuit board being electrically energized and being unpopulated or populated with electrical or electronic components is disclosed. The apparatus includes a device for pyrometrical scanning of surface temperatures, wherein the scanning device comprises a pyrometric sensor being movable for the purpose of scanning and being adjustable with respect to its distance from the printed circuit board. A method for operating such an apparatus is disclosed. The method includes adjusting the distance between the sensor and the printed circuit board during scanning. | 2012-05-17 |
20120119770 | AUTOMATED MULTI-POINT PROBE MANIPULATION - A multi-point probe particularly suitable for automated handling is disclosed. An automated multi-point measuring system including the multi-point probe and a probe manipulator head is also disclosed In addition, an automated multi-point probe gripping system including a probe holder and the probe manipulator head is revealed. Further, a loaded probe loader comprising a probe loader and a probe cassette for handling the multi-point probe is also revealed, where the probe cassette is provided with the probe holder for securing the multi-point probe. | 2012-05-17 |
20120119771 | METHOD AND APPARATUS FOR INDEXING AN ADJUSTABLE TEST PROBE TIP - Embodiments of the present invention are directed to adjustable test probe tips that are indexable. In one embodiment a mechanism is coupled to a probe tip so that the mechanism may be used to index the probe tip to a plurality of particular positions. A label portion may be provided to communicate to a user that the length of the exposed probe tip is less than a particular length, such as the maximum length an exposed probe tip may be for a particular application. | 2012-05-17 |
20120119772 | INSPECTING JIG - Inspecting jig operable to bring a probe into contact with a connector on a board includes a probe holding body; a guide guiding the probe to be in contact with the connector on the board, the guide being engaged with the connector to be positioned with respect to the connector; and a coupling unit coupling the probe holding body and the guide to move relative to each other between a first relative position and a second relative position, the first relative position where a distal end of the probe is brought into contact with the connector when the guide is positioned with respect to the connector, the second relative position where the distal end of the probe is separated from the board and is separated from an imaginary line perpendicular to the board and passing the connector, when the guide is positioned with respect to the connector. | 2012-05-17 |
20120119773 | Testing Auxiliary Apparatus - A testing auxiliary apparatus for assisting a testing apparatus to test signals of testing points of a circuit board, includes: a testing base having a testing platform with probes vertically disposed thereon and corresponding to the testing points, and extension testing points exposed from the testing platform and electrically connected to the probes so as for the testing apparatus to test signals; a carrier board disposed on the testing base and capable of ascending and descending relative to the testing platform and including a positioning portion for positioning the circuit board and through holes corresponding to the probes; and a pressing member disposed on the testing base for pressing the circuit board and driving the carrier board to descend such that the probes come into contact with the testing points through the through holes, thereby avoiding the inconvenience of searching for testing points on the circuit board with high-density pins. | 2012-05-17 |
20120119774 | ELECTRICAL TESTING APPARATUS FOR TESTING AN ELECTRICAL TEST SAMPLE AND ELECTRICAL TESTING METHOD - An electrical testing apparatus for testing an electrical test sample. The apparatus includes a conductor substrate which is electrically connected via a contact spacing converter to a test head. The conductor substrate is mechanically connected to a first stiffening device and is thereby stiffened. At least one spacer which penetrates the conductor substrate is mechanically connected to the contact spacing converter and is held on the first stiffening device via at least one tilt adjusting arrangement. | 2012-05-17 |
20120119775 | CIRCUITRY FOR HOT-SWAPPABLE CIRCUIT BOARDS - Electronic circuits and methods are provided for use in hot-swappable circuit board applications. Circuitry detects an electrical ground connection and signals operation of a hot-swap controller. Detection of stable operating power causes a hierarchical startup of plural voltage regulators. Sensing stable output power from the last of the voltage regulators triggers the configuration of one or more programmable devices. Circuitry and other resources of a hot-swappable circuit board are protected against electrical transient-related damage by virtue of the present teachings. | 2012-05-17 |
20120119776 | TEST CIRCUIT AND TEST METHOD FOR DETECTING ELECTRICAL DEFECT IN TFT-LCD - The present disclosure discloses a test circuit and a test method for detecting a TFT-LCD electrical defect, which relates to the field of liquid crystal display and is able to distinguish effectively between a capacitive defect and a TFT defect. The test circuit for detecting a TFT-LCD electrical defect includes: a test apparatus connected with the input terminals of a first reference voltage and a second reference voltage corresponding to the same gray scale, the test apparatus controls the output terminals of the first reference voltage and the second reference voltage to output a constant voltage to a data line. The present disclosure can be applied to a liquid crystal display. | 2012-05-17 |
20120119777 | Dynamic Voltage and Frequency Management - In one embodiment, an integrated circuit includes a self calibration unit configured to iterate a test on a logic circuit in the integrated circuit at respectively lower supply voltage magnitudes until the test fails. A lowest supply voltage magnitude at which the test passes is used to generate a requested supply voltage magnitude for the integrated circuit. In an embodiment, an integrated circuit includes a series connection of logic gates physically distributed over an area of the integrated circuit, and a measurement unit configured to launch a logical transition into the series and detect a corresponding transition at the output of the series. The amount of time between the launch and the detection is used to request a supply voltage magnitude for the integrated circuit. | 2012-05-17 |
20120119778 | POST SILICIDE TESTING FOR REPLACEMENT HIGH-K METAL GATE TECHNOLOGIES - A test structure for testing transistor gate structures in an IC device includes one or more probe pads formed at an active area of the IC device; one or more first conductive lines formed at the active area of the IC device, in electrical contact with the one or more probe pads; one or more second conductive lines formed at a gate conductor level of the IC device, in electrical contact with the one or more first conductive lines; and a gate electrode structure to be tested in electrical contact with the one or more second conductive lines; wherein the electrical contact between the one or more second conductive lines and the one or more first conductive lines is facilitated by a localized dielectric breakdown of a gate dielectric material disposed between the one or more second conductive lines and the one or more first conductive lines. | 2012-05-17 |
20120119779 | SIGNAL SENSING DEVICE AND CIRCUIT BOARDS - Apparatus are provided for use in testing circuit boards. A signal sensing device includes one or more probes. Each probe includes a length of rigid coaxial conductor configured to define a sensing pin at one end. A circuit board defines a number of through vias lined in metal and configured to receive the sensing pin of a corresponding probe. The signal sensing device also includes a ground pin. Electrical pathways extending away from adjacent pairs of the through vias can be tested for electrical impedance and other signal propagating characteristics by way of the signal sensing device. | 2012-05-17 |
20120119780 | SINGLE EVENT TRANSIENT DIRECT MEASUREMENT METHODOLOGY AND CIRCUIT - A circuit and method of directly measuring the Single Event Transient (SET) performance of a combinatorial circuit includes a measurement chain. The measurement chain includes a plurality of cells, each in turn including a pair of SR latches, a dual-input inverter, and a target. During measurement and testing, the targets are irradiated, and a pulse signal caused by an SET event is allowed to propagate through the measurement chain only if the pair of SR latches are active at the same time. The pulse signal is latched by the measurement chain, thus allowing the presence of an SET event to be detected. | 2012-05-17 |
20120119781 | RECONFIGURABLE LOGIC FABRICS FOR INTEGRATED CIRCUITS AND SYSTEMS AND METHODS FOR CONFIGURING RECONFIGURABLE LOGIC FABRICS - In accordance with the present invention there are provided herein asynchronous reconfigurable logic fabrics for integrated circuits and methods for designing asynchronous circuits to be implemented in the asynchronous reconfigurable logic fabrics. | 2012-05-17 |
20120119782 | Logic for Metal Configurable Integrated Circuits - A metal programmable logic unit of a semiconductor device is disclosed. The programmable logic unit comprises: an interconnect structure comprising: a plurality of fixed interconnects including metal and via geometries; and a plurality of selectable interconnect geometries, each selectable geometry coupling a said first fixed interconnect to a said second fixed interconnect; and a programmable logic block comprising a plurality of multiplexers, each multiplexer having a plurality of regular inputs, wherein each said regular input is selectively coupled to one of a zero state, a one state, a first input state, and the compliment of the first input state; and a programmable multiplexer having a plurality of regular inputs, wherein each said regular inputs is selectively coupled to one of a zero state, a one state, and one or more input signals; wherein, selecting a subset of the selectable interconnect geometries program the logic block and the multiplexer regular inputs to implement a logic function. | 2012-05-17 |
20120119783 | LATCH CIRCUIT, FLIP-FLOP HAVING THE SAME AND DATA LATCHING METHOD - A latch circuit includes a first tri-state inverter configured to invert an input voltage in response to a pulse and to output the inverted voltage to a first node, a second tri-state inverter connected between the first node and a second node and to invert a voltage of the second node in response to an inverted pulse being an inverted version of the pulse, and a variable inversion unit connected between the first node and the second node. The variable inversion unit adjusts a logical threshold value according to a logical value corresponding to a voltage of the first node and inverts a voltage of the first node based upon the adjusted logical threshold value, the logical threshold value indicating a voltage for discriminating the logical value. | 2012-05-17 |
20120119784 | DIGITAL LOGIC CIRCUIT WITH DYNAMIC LOGIC GATE - A digital logic gate suitable for a high-speed operation of a central processing unit. The digital logic gate comprises the first dynamic logic gate configured to logically gate a plurality of first input data in response to the first clock signal, a second dynamic logic gate configured to logically gate a gating output of the first dynamic logic gate and a plurality of second input data, and a latching device configured to latch a gating output of the second dynamic logic gate. The digital logic circuit need not adopt a keeper circuit, and thus a gate delay is reduced and the digital logic circuit performs a high-speed gating operation with robust characteristic against a current leakage or an input noise. | 2012-05-17 |
20120119785 | INPUT/OUTPUT CORE DESIGN AND METHOD OF MANUFACTURE THEREFOR - One aspect provides an input/output cell. The input/output cell, in one example, includes an input/output layout boundary delineated on a substrate, wherein the input/output layout boundary defines a first side parallel and opposing a second side, a third side parallel and opposing a fourth side, wherein the first and second sides are substantially perpendicular the third and fourth sides. The input/output cell, in this example, further includes input/output transistors positioned within the input/output layout boundary over the substrate. The input/output cell, in this example, further includes first and second power conductors and first and second ground conductors located over the substrate, the first power conductor and first ground conductor extending entirely between the first and second sides and the second power conductor and second ground conductor extending entirely between the third and fourth sides. | 2012-05-17 |
20120119786 | SEMICONDUCTOR DEVICE - A stop of a detection object clock is detected by inverting a signal level of an output signal of a level output unit at a count completion time at a counter unit operated by a detection clock and of which count value is changeable, and by determining whether or not a signal level change passes through a clock detection unit operated by the detection object clock by comparing signal levels of an output signal of a level output unit and an output signal of a clock detection unit. | 2012-05-17 |
20120119787 | IMAGING DEVICE - An imaging device includes a pixel section and an amplification unit which amplifies the signal of the pixel section. The amplification unit includes an input capacitor having first and second nodes, an amplification circuit, a first feedback capacitor connected between the input capacitor and an output portion of the amplification circuit, a first MOS transistor switch connected in series with the first feedback capacitor, a second MOS transistor switch which is connected in series with the first feedback capacitor, and has a drain and a source connected to each other, a second feedback capacitor connected between the input capacitor and the output portion, a third MOS transistor switch connected in series with the second feedback capacitor, and a fourth MOS transistor switch which is connected in series with the second feedback capacitor, and has a drain and a source connected to each other. | 2012-05-17 |
20120119788 | On-chip Power Supply Monitoring Using a Network of Modulators - An apparatus for monitoring at least supply voltage in an IC includes a plurality of monitor circuits distributed throughout the integrated circuit. Each of the monitor circuits is operative to receive the supply voltage, or a signal representative thereof, and to generate an output signal indicative of a comparison between the supply voltage and a reference voltage. The apparatus further includes a control circuit coupled to the plurality of monitor circuits. The control circuit is operative to receive the respective output signals from the plurality of monitor circuits and to generate an output of the apparatus which is a function of information conveyed in the respective output signals from the plurality of monitor circuits. | 2012-05-17 |
20120119789 | Peak Detector Extension System - The different illustrative embodiments provide a method and apparatus for managing peak detector circuits. A first number of voltages for a first number of signals detected by a peak detector circuit connected to a wire in a bus system is identified. The first number of signals is used to send data over the wire. The first number of voltages is for a first number of transmission speeds for the first number of signals. A second number of voltages for a second number of signals detected by the peak detector circuit is identified. The second number of signals is present in the wire in an absence of the data being sent over the wire. The second number of voltages is for a second number of transmission speeds for the second number of signals. A number of settings are selected for the peak detector circuit based on the first number of voltages and the second number of voltages. | 2012-05-17 |
20120119790 | DYNAMIC COMPARATOR BASED COMPARISON SYSTEM - A comparison system including a dynamic comparator, a background offset calibration circuit, and an asynchronous reset timing control circuit is presented. The background offset calibration circuit is coupled to the dynamic comparator, and generates calibration signals in response to reference switching control signals. Where calibration signals are used to calibrate the input refer offset of the dynamic comparator. The asynchronous reset timing control circuit is coupled to the dynamic comparator and the background offset calibration circuit, and generates a control clock signal and the reference switching control signals in response to the output signals of the dynamic comparator and a plurality of basic clock signals. During each clock cycle of the first basic clock signal, the control clock signal is used to control the dynamic comparator to perform two data comparison, one for the input refer offset and the other for a differential input signal. | 2012-05-17 |
20120119791 | DIGITALIZED SENSOR SYSTEM - A digitalized sensor system includes a portable electronic device, a sensor unit, a transmission unit and a signal converting unit. The portable electronic device has a first connection portion. The sensor unit is configured for measuring and/or monitoring physical and/or chemical parameters of a target object to generate a digital signal. The transmission unit includes a connecting wire and a second connection portion, the connecting wire adapted to be connected with the sensor unit and the second connection portion, the second connection portion adapted to connect to the first connection portion, and the second connection portion and the first connection portion forming a pluggable interface. The signal converting unit is configured on the transmission unit and adapted for converting the digital signal into a second signal, the second signal adapted to be transmitted to the portable electronic device by the transmission unit. | 2012-05-17 |
20120119792 | ADJUSTABLE FINITE IMPULSE RESPONSE TRANSMITTER - Apparatus and methods are provided for generating output signals representative of bits of serial data. A transmitter includes driver circuitry configured to generate an output signal at an output node and an allocation control module coupled to the driver circuitry. The driver circuitry includes a plurality of driver legs configured to generate the output signal based on a plurality of data bits. The allocation control module is configured to allocate a respective subset of the plurality of driver legs to a respective data bit of a plurality of data bits, wherein the each subset generates a component of the output signal that is influenced by its respective data bit. | 2012-05-17 |
20120119793 | INTERFERENCE-TOLERANT COMMUNICATION CIRCUIT - An interference-tolerant transmitter is provided. In accordance with various example embodiments, a transmitter circuit includes a control circuit configured to maintain the sum of current as applied to a load from respective high-side and low-side current sources at a target level (e.g., range). In some applications, clamp circuits are used to clamp current to high and low sides of the load respectively in response to changes at the low-side and high-side of the load. | 2012-05-17 |
20120119794 | POWER REDUCTION IN SWITCHED-CURRENT LINE-DRIVERS - A differential switched-current line-driver implements a method to reduce power consumption by eliminating output current that does not contribute to the required differential output signal. This output current is used for example during a training phase, and the current elimination can take place after the training phase is complete. | 2012-05-17 |
20120119795 | SYSTEM INCLUDING DRIVER CIRCUIT FOR ELECTRICAL SIGNALING AND OPTICAL SIGNALING - A system including a driver circuit. The driver circuit is configured to provide first output signals in a first mode for electrical signaling and second output signals in a second mode for optical signaling. The driver circuit is configured to provide the first output signals in the first mode with at least one of a lower frequency and higher power and the second output signals in the second mode with at least one of a higher frequency and lower power. | 2012-05-17 |
20120119796 | PASS TRANSISTOR CAPACITANCE AND JITTER REDUCTION - A system comprises a pass switch circuit and a first pass switch activation circuit. The pass switch circuit includes an impedance circuit and a pass transistor having a first source/drain connection, a second source/drain connection, and a gate input. The pass switch circuit passes an electronic signal from the first source/drain connection to the second source/drain connection in response to activation of the gate input. An impedance transfer function of the pass switch circuit is determined at least in part by an impedance of the impedance circuit and the impedance is sized to minimize attenuation of the electronic signal due to the impedance transfer function of the pass switch circuit. The first pass switch activation circuit provides a first activation signal to the gate input in response to an enable signal. | 2012-05-17 |
20120119797 | CAPACITIVE LOAD DRIVE CIRCUIT, LIQUID INJECTOR, AND MEDICAL DEVICE - A drive waveform signal is pulse-modulated and a modulated signal is generated, the obtained modulated signal is power-amplified, and then, a drive signal is demodulated using a low pass filter. Thus obtained drive signal is negatively fed back, and thereby, the resonance peak of the low pass filter is suppressed. In this regard, by bringing gain in a wider frequency domain to take a fixed value or more, a drive signal having a voltage exceeding a power supply voltage may be stably generated. | 2012-05-17 |
20120119798 | METHOD AND DEVICE FOR DIVIDING A FREQUENCY SIGNAL - A method for dividing a frequency includes the steps of receiving a first signal having a first frequency as a clock input to a first digital counter and outputting a second signal as a clock input to a second digital counter having a higher counting capacity than the first counter. The output occurs when the first counter reaches a first number of count cycles. The method also includes generating a third signal having a high cycle and a low cycle, which are determined at least as a function of the first number of count cycles. Depending on a desired division ratio, the high and low cycles may also be a function of a second number of count cycles associated with the second counter. The third signal has a frequency lower than the first frequency. | 2012-05-17 |
20120119799 | WAKE-UP CIRCUIT AND AN ON BOARD UNIT INCLUDING THE SAME, A FILTER, METHODS FOR FREQUENCY DETECTION AND FILTERING - A wake-up circuit, comprising: a control signal generation circuit comprising: a pulse generator configured to receive a digital signal and generate a pulse sequence signal with a frequency thereof; a first comparison circuit and a second comparison circuit both coupled to the pulse generator and configured to receive the pulse sequence signal; the first comparison circuit is configured to compare the frequency of the pulse sequence signal with a first threshold frequency and generate a first control signal; the second comparison circuit is configured to compare the frequency of the pulse sequence signal with a second threshold frequency and generate a second control signal; the frequency detector further comprises: an indication generation circuit configured to generate a wake-up indication if the frequency of the pulse sequence signal falls within a frequency range defined by the first and second threshold frequencies. | 2012-05-17 |
20120119800 | PLL FREQUENCY SYNTHESIZER - In a digital PLL frequency synthesizer, after lock detection, first oscillating signal phase information is switched to second oscillating signal phase information by an estimation section based on previous oscillating signal phase information and a phase difference. As a result, the first oscillating signal phase information which has a risk of an error in the normal state (locked state) is not used. In addition, a conventional high-speed latch circuit for reclocking is not required. As a result, power consumption can be reduced, compared to the conventional art, while reducing or avoiding a degradation in phase-noise characteristics. | 2012-05-17 |
20120119801 | Phase-Locked Loop - A phase-locked loop (PLL) including an active filter, a voltage-controlled oscillator (VCO), two phase detectors, a charge pump and a digital-to-analog converter (DAC) is provided. The VCO generates an oscillation signal according to a control signal provided at an output of the active filter. The first phase detector generates a phase difference signal according to a reference signal and a feedback signal associating with the oscillation signal. The charge pump provides a charging current to a first input of the active filter according to the phase difference. The second phase detector generates a digital reference signal according to the phase difference between the reference signal and the feedback signal. The DAC converts the digital reference signal to an analog reference voltage and provides the analog reference voltage to the second input of the active filter. | 2012-05-17 |
20120119802 | DELAY LOCKED LOOP WITH DELAY PROGRAMMABILITY - A delay locked loop (DLL) with delay programmability includes a pair of delay blocks, each containing multiple delay elements, but configurable to connect a desired subset of the delay elements between input and output nodes of the respective delay blocks. The subsets of the delay elements in the two delay blocks are connected in series. The ratio of the number of delay elements programmed to form each of the two subsets determines a delay provided as an output by the DLL. In operation, a phase discriminator and a loop filter in combination with the programmed subsets in the delay blocks, operate to generate an analog error signal to compensate for process, temperature and voltage (PTV) variations in the delay provided as an output by the DLL. | 2012-05-17 |
20120119803 | DLL HAVING A DIFFERENT TRAINING INTERVAL DURING A VOLTAGE CHANGE - A delay locked loop (DLL) having an accelerated training interval during a voltage change. An integrated circuit (IC) includes a master DLL configured to generate a clock signal based upon a reference clock signal. The master DLL may train to the reference clock signal in response to a control signal. The IC also includes a control unit that is coupled to the master DLL and may provide the control signal at a first interval in response to receiving an indication that a supply voltage is being changed, and provide the control signal at a second interval in the absence of the indication. | 2012-05-17 |
20120119804 | MULTI-PHASE DUTY-CYCLE CORRECTED CLOCK SIGNAL GENERATOR AND MEMORY HAVING SAME - Memories, multi-phase clock signal generators, and methods for generating multi-phase duty cycle corrected clock signals are disclosed. For example, one such clock signal generator includes a delay-locked loop having a first multi-tap adjustable delay line configured to delay a reference signal to provide a plurality of clock signals having different phases relative to the reference clock signal. A periodic signal generated by the delay-locked loop is provided to a second multi-tap adjustable delay line as an input clock signal. Clock signals from taps of the second multi-tap adjustable delay line are provided as the multi-phase duty cycle corrected clock signals. | 2012-05-17 |
20120119805 | CLOCK GATER WITH PROGRAMMABLE DELAY - An integrated circuit device includes first circuitry including first logic devices and a clock tree for distributing a clock signal to the first logic devices and second circuitry including second logic devices and a clock gater operable to receive the clock signal and distribute the clock signal to the second logic devices. The clock gater comprises a programmable delay circuit. | 2012-05-17 |