43rd week of 2021 patent applcation highlights part 58 |
Patent application number | Title | Published |
20210335531 | INDEPENDENT TYPE INSTANTANEOUS CURRENT DETECTION PCB CT DEVICE APPLIED TO BREAKER - The present invention relates to an independent type instantaneous current detection PCB CT device applied to a breaker, and more particularly relates to an independent type instantaneous current detection PCB CT device including a coil pattern-based PCB type air-core coil sensor mounted on a main PCB formed in the breaker or configured independently of the breaker. | 2021-10-28 |
20210335532 | COIL COMPONENT - A coil component includes a body, a support substrate disposed in the body, and a coil portion including a first coil pattern on one surface of the support substrate, a first lead-out pattern extending from the first coil pattern to an end surface of the body, and a second lead-out pattern disposed on the one surface of the support substrate to be spaced apart from the first coil pattern and extending to another end surface of the body. A reinforcing pattern portion is disposed between each lead-out pattern and the one surface of the support substrate, first and second slit portions are disposed in edge portions of the body and respectively expose the first and second lead-out patterns, and first and second external electrodes are respectively disposed on the inner surfaces of the first and second slit portions and respectively connected to the first and second lead-out patterns. | 2021-10-28 |
20210335533 | COIL DEVICE, PHASE SHIFT CIRCUIT, AND COMMUNICATION APPARATUS - In a coil device, a first coil includes a common terminal side first coil conductor connected to a ground terminal, an intermediate first coil conductor, and an input/output terminal side first coil conductor connected to a first input/output terminal, and a second coil includes a common terminal side second coil conductor connected to the ground terminal, an intermediate second coil conductor, and an input/output terminal side second coil conductor connected to a second input/output terminal. The input/output terminal side first coil conductor is located between the intermediate second coil conductor and the input/output terminal side second coil conductor, and the input/output terminal side second coil conductor is located between the intermediate first coil conductor and the input/output terminal side first coil conductor. | 2021-10-28 |
20210335534 | COIL COMPONENT - According to one or more embodiments of the present invention, a coil element includes a base body, an internal conductor provided within the base body, a first external electrode electrically connected to one of ends of the internal conductor, and a second external electrode electrically connected to the other end of the internal conductor. The base body contains a plurality of metal magnetic particles, a resin portion between the metal magnetic particles and a void. The base body includes a first region and a second region surrounding the first region, and a second area void ratio of the second region is higher than a first area void ratio of the first region. The internal conductor is provided in the first region of the base body. | 2021-10-28 |
20210335535 | ASSEMBLY FOR A LOW-PROFILE WIRELESS CHARGER - In at least one embodiment, a transformer assembly including a bobbin, a first winding and a second winding is provided. The bobbin defines a first chamber, a second chamber, and a gap. The first winding is positioned in the first chamber. The second winding is positioned in the second chamber. The gap separates the first chamber from the second chamber to cause the first winding and the second winding to generate a leakage inductance such that the leakage inductance and a capacitance of a capacitor that is operably coupled to the transformer assembly generate a resonant frequency to enable inductive mode charging with a vehicle pad. | 2021-10-28 |
20210335536 | Method of Reducing Leakage Magnetic Flux for a Shell-type transformer or Inductor - A Method of reducing leakage magnetic flux for a shell-type transformer or inductor is disclosed. The magnetic flux density is reduced between flux transitional areas and corner losses are reduced. | 2021-10-28 |
20210335537 | IGNITION COIL FOR INTERNAL COMBUSTION ENGINE - An ignition coil for an internal combustion engine includes a plug boot with a hole having a length extending in an axial direction of the ignition coil. The length of the hole has a portion which includes a plurality of small distance-to-center sections and a plurality of large distance-to-center sections which are arranged alternately in a circumferential direction of the hole. Each of the small distance-to-center sections is located at a first distance away from the center of the hole, while each of the large distance-to-center sections is located at a second distance away from the center of the hole. The second distance is larger than the first distance. The small distance-to-center sections are placed to be contactable with an outer periphery of the coil spring. This structure of the ignition coil has enhanced resistance to mechanical vibration of the coil spring and also has enhanced withstand voltage. | 2021-10-28 |
20210335538 | THREE-DIMENSIONAL WOUND IRON CORE, METHOD AND DEVICE FOR MANUFACTURING THE SAME BY USING SINGLE-LAYER AMORPHOUS STRIP - A method for manufacturing a three-dimensional wound iron core by using a single-layer amorphous strip includes: step 1) of cutting, step 2) of positioning, including positioning a raw material at a positioning location by using a first location detecting apparatus, a control apparatus collecting information from the first location detecting apparatus and transmitting the information to the cutting apparatus, step 3) of tension detecting including a tension detecting apparatus detecting a tension of the raw material, the control apparatus collecting information from the tension detecting apparatus and transmitting the information to a winding apparatus, step 4) of trimming to obtain a winding strip, step 5) of winding location detecting including positioning the winding strip at a positioning location by using a second location detecting apparatus, the control apparatus collecting information from the second location detecting apparatus and transmitting the information to the winding apparatus, and step 6) of winding. | 2021-10-28 |
20210335539 | ADDITIVE MANUFACTURING OF MAGNET ARRAYS - A method of forming a magnet is provided. The method includes disposing an anisotropic magnetic powder and a binder within a bed, the anisotropic magnetic powder having a defined magnetization direction. An energy beam selectively melts the binder such that the anisotropic magnetic powder forms a permanent magnet with the defined magnetization direction. The energy beam is a laser beam, a microwave beam and the like. | 2021-10-28 |
20210335540 | METHOD OF MANUFACTURING RARE-EARTH PERMANENT MAGNET AND RARE-EARTH PERMANENT MAGNET MANUFACTURED BY THE SAME - Disclosed are a method of manufacturing a rare-earth permanent magnet capable of offsetting a partially uneven demagnetization by varying the amount of heavy rare-earth element diffused to a grain boundary for each region and a Nd—Fe—B-based permanent magnet manufactured by the same. | 2021-10-28 |
20210335541 | MULTILAYER CERAMIC CAPACITOR - A multilayer ceramic capacitor includes a multilayer body and two external electrodes. The multilayer body includes a multilayer main body including an inner layer portion including dielectric layers and internal electrode layers alternately stacked, and outer layer portions on opposite sides of the inner layer portion in a stacking direction, two side gap portions on opposite sides in a width direction, main surfaces on opposite sides in the stacking direction, side surfaces on opposite sides in the width direction, and end surfaces respectively provided on opposite sides in a length direction. The two external electrodes are provided at the end surfaces, each including a foundation electrode layer in contact with the multilayer body, and a conductive resin layer on the foundation electrode layer. An end region of the internal electrode layers in contact with the foundation electrode layer is thicker than other regions of the internal electrode layers. | 2021-10-28 |
20210335542 | MULTI-LAYER CERAMIC ELECTRONIC COMPONENT, CIRCUIT BOARD, AND METHOD OF PRODUCING A MULTI-LAYER CERAMIC ELECTRONIC COMPONENT - A multi-layer ceramic electronic component includes a ceramic body and an external electrode. The ceramic body includes an end surface facing in a first direction, and internal electrodes exposed from the end surface and laminated in a second direction orthogonal to the first direction. The external electrode is provided on the end surface and includes two protrusions that are formed along two peripheral portions of the end surface and protrude in the first direction, the two peripheral portions being disposed in a third direction orthogonal to the first direction and the second direction. | 2021-10-28 |
20210335543 | MULTILAYER CERAMIC CAPACITOR - A multilayer ceramic capacitor includes, on a side of a first external electrode in a length direction of an interposer, a first joining electrode on a first surface and a first mounting electrode on a second surface, a first through conductive portion penetrating the interposer, and a first conductive joining agent providing electrical conduction between the first external electrode and the first joining electrode, and includes on a side of a second external electrode, a second joining electrode on the first surface and a second mounting electrode on the second surface, a second through conductive portion penetrating the interposer, and a second conductive joining agent providing electrical conduction between the second external electrode and the second joining electrode. A first joining region joining the first external electrode and the first conductive joining agent extends directly above an end at an upper end of the first through conductive portion, and a second joining region joining the second external electrode and the second conductive joining agent extends directly above an end at an upper end of the second through conductive portion. | 2021-10-28 |
20210335544 | MULTILAYER CERAMIC CAPACITOR - In a multilayer ceramic capacitor, an interposer includes, on a side of a first external electrode in a length direction, a first through conductive portion that penetrates the interposer in a stacking direction, and provides electrical conduction between a first joining electrode and a first mounting electrode. The interposer includes, on a side of a second external electrode in the length direction, a second through conductive portion that penetrates the interposer in the stacking direction, and provides electrical conduction between a second joining electrode and a second mounting electrode. The first joining electrode includes a first portion that covers a portion of a first interposer end surface on the one side in the length direction of the interposer. The second joining electrode includes a second portion that covers a portion of a second interposer end surface on the other side in the length direction of the interposer. | 2021-10-28 |
20210335545 | METHOD FOR PRODUCING MULTILAYER CERAMIC ELECTRONIC COMPONENT AND DISAPPEARING INK - A method to produce a multilayer ceramic electronic component includes forming supports by an ink jet printing method to produce a green multilayer ceramic capacitor. A green ceramic layer and outer electrodes of the multilayer ceramic electronic component are formed by the ink jet printing method while the supports define peripheries of the green ceramic layer and the outer electrodes. When fired, the green multilayer ceramic electronic component is converted to a sintered multilayer ceramic electronic component, and the supports disappear by heating. | 2021-10-28 |
20210335546 | MULTILAYER CERAMIC ELECTRONIC COMPONENT AND BOARD FOR MOUNTING OF THE SAME - A multilayer ceramic electronic component includes a ceramic body including a dielectric layer, first and second internal electrodes disposed to face each other with the dielectric layer interposed therebetween in the ceramic body, and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second electrodes. At least one of the first and second external electrodes includes a first electrode layer including a first glass and a second electrode layer disposed on the first electrode layer and including a second glass. The first glass contains a larger amount of barium-zinc (Ba—Zn) than the second glass, and the second glass contains a larger amount of silicon (Si) than the first glass. | 2021-10-28 |
20210335547 | MULTILAYER CERAMIC CAPACITOR - An interposer of a multilayer ceramic capacitor includes a first through-hole in which a first pass-through conductive portion is provided on an inside wall thereof. A first surface side of the first through-hole is filled with a first conductive joining material that recessed at a central portion thereof as the first through-hole is seen from a second surface toward a first surface. The interposer includes a second through-hole in which a second pass-through conductive portion is provided on an inside wall thereof. A first surface side of the second through-hole is filled with a second conductive joining material that is recessed at a central portion thereof as the second through-hole is seen from a second surface toward a first surface. | 2021-10-28 |
20210335548 | MULTILAYER CERAMIC CAPACITOR - A multilayer ceramic capacitor includes a multilayer body and external electrodes. The multilayer body includes an inner layer portion including dielectric layers and internal electrode layers alternately stacked, and first and second outer layer portions on opposite sides of the inner layer portion in a stacking direction, side gap portions on opposite sides in a width direction, main surfaces on opposite sides in the stacking direction, side surfaces on opposite sides in the width direction, and end surfaces on opposite sides in a length direction. Each external electrode is provided at one end surfaces of the multilayer body, and extends from the end surface to a portion of the main surface. A difference in location between ends at the side surface of two adjacent internal electrode layers is about 0.5 μm or less. The second outer layer portion is thicker than the first outer layer portion. | 2021-10-28 |
20210335549 | MULTILAYER CERAMIC CAPACITOR - A multilayer ceramic capacitor includes a multilayer main body including an inner layer portion including dielectric layers and internal electrode layers alternately stacked, and outer layer portions on both sides of the inner layer portion in a stacking direction, two external electrodes at two end surfaces of the multilayer body in which side gap portions are provided on both sides of the multilayer main body in the width direction, and an interposer on any of the main surfaces, the side surfaces, and the end surfaces of a capacitor main body including the multilayer and the external electrodes. The difference in location between ends at side surfaces of two adjacent internal electrode layers in the stacking direction is about 0.5 μm or less. In the two side gap portions, a portion in contact with the multilayer main body has a thickness of about 10 μm or less. | 2021-10-28 |
20210335550 | MULTILAYER CERAMIC CAPACITOR - A multilayer ceramic capacitor includes a multilayer body, and two external electrodes. The multilayer body includes a multilayer body main portion including an inner layer portion including dielectric layers and internal electrode layers that are stacked, and two outer layer portions on opposite sides of the inner layer portion in a stacking direction, two side gap portions on opposite sides of the multilayer main body in a width direction, two main surfaces on opposite sides in the stacking direction, two side surfaces on opposite sides in the width direction, and two end surfaces on opposite sides in a length direction. Each of the two external electrodes are at an end surface of the multilayer body, and extend from the end surface to a portion of the main surface. An end of the side gap portion on a side of the main surface protrudes farther than the multilayer main body. | 2021-10-28 |
20210335551 | MULTILAYER CERAMIC CAPACITOR - A multilayer ceramic capacitor includes a multilayer body, two external electrodes, and two wall portions. The multilayer body includes a multilayer main body including an inner layer portion in which dielectric layers and internal electrode layers are stacked, and two outer layer portions on opposite sides of the inner layer portion in a stacking direction, two side gap portions on opposite sides of the multilayer main body in a width direction, two main surfaces on opposite sides in the stacking direction, two side surfaces on opposite sides in the width direction, and two end surfaces on opposite sides in a length direction. The two external electrodes each are provided at one of the two end surfaces of the multilayer body, and each extend from the one of the two end surfaces to a portion of the main surface. The wall portions cover portions of the external electrodes at the two end surfaces, and each include a protruding portion that protrudes from the main surface. | 2021-10-28 |
20210335552 | SUBSTRATES EMPLOYING SURFACE-AREA AMPLIFICATION, FOR USE IN FABRICATING CAPACITIVE ELEMENTS AND OTHER DEVICES - A substrate that includes a base layer having a first principal surface defining a plurality of first trenches and intervening first lands, and a cover layer provided over the first principal surface of the base layer and covering the first trenches and first lands substantially conformally, wherein the surface of the cover layer remote from the first principal surface of the base layer comprises a plurality of second trenches and intervening second lands defined at a smaller scale than the first trenches and first lands. The substrate may be used to fabricate a capacitive element in which thin film layers are provided and conformally cover the second trenches and second lands of the cover layer, to create a metal-insulator-metal structure having high capacitance density. | 2021-10-28 |
20210335553 | SOLID ELECTROLYTIC CAPACITOR - In a solid electrolytic capacitor having an electrolyte layer consisting of a solid electrolyte layer and a liquid, the solid electrolytic capacitor, which suppresses a dedoping reaction and which ESR thereof does not keenly increase, in particular, after a loading of heat stress, is provided. In the solid electrolytic capacitor, the electrolyte layer is formed in the capacitor element which is formed by opposing an anode foil and a cathode foil. This electrolyte layer includes the solid electrolyte layer and the liquid. The solid electrolyte layer includes a conductive polymer consisting of a dopant and a conjugated polymer. The liquid is filled in air gaps in the capacitor element on which the solid electrolyte layer is formed. The electrolyte layer includes ammonia as a cation component, and a molecular ratio of the cation component relative to 1 mol of a functional group which can contribute to a doping reaction of the dopant, in the electrolyte layer is 23 or less. | 2021-10-28 |
20210335554 | METHOD FOR PRODUCING ELECTRODE FOR ALUMINUM ELECTROLYTIC CAPACITOR - In production of an electrode for an aluminum electrolytic capacitor, a hydrated film is formed onto an aluminum electrode including a porous layer by immersing the aluminum electrode into a first hydration treatment liquid having a temperature of 80° C. or more in a first hydration treatment step (ST | 2021-10-28 |
20210335555 | ENERGY STORAGE DEVICE AND METHOD OF MAKING - A coaxial supercapacitor and method of manufacture such that the supercapacitor has an elongated shape resembling that of a wire and which can be bent to a desired shape and which can optionally be used in place of a wire for a given application while providing the benefits and characteristics of a supercapacitor. The supercapacitor can be manufactured without the necessity of complex manufacturing techniques. | 2021-10-28 |
20210335556 | ELECTRODE FOR SUPERCAPACITOR, PREPARATION METHOD AND USE THEREOF - The present disclosure relates to an electrode for supercapacitor, preparation method and use thereof. The electrode comprises an electrode terminal, an active layer and a coating layer from inside to outside. A material for preparing the coating layer comprises an oxygenated compound, which contains at least one of transition metal elements or is doped with a substance containing a transition metal element. Providing the coating layer on the surface of the active layer prevents organic electrolytes from being easily adsorbed and nucleated in the porous structure of the electrode surface due to interface defects, and facilitates to weaken the interface problems existing between the electrolyte and the electrode surface. The capacitor prepared by means of the electrode according to the embodiments of the present disclosure can significantly increase the operating voltage window (may be up to above 4V) and capacitance of the supercapacitor, and further increase energy density thereof. | 2021-10-28 |
20210335557 | WIRELESS BATTERY-POWERED SWITCH - An apparatus for a wireless switch. In some embodiments, the wireless switch includes a button, a battery, a radio, a memory, and an electronic processor. The electronic processor may be configured to operate the wireless switch in a wireless mesh network communication mode; and in response to a user input from the button, reboot the wireless switch; operate the wireless switch in a Bluetooth operating mode; receive a switch configuration; store the switch configuration in the memory; reboot the wireless switch a second time, and operate the switch in the wireless mesh network communication mode. | 2021-10-28 |
20210335558 | PUSH SWITCH - A push switch includes a case having a housing space with an upper opening, fixed contacts provided at a bottom of the housing space in the case, a movable contact member having a dome-shaped member, the movable contact member being disposed in the housing space, and having a central portion that is brought into contact with the fixed contacts by inverting the movable contact member in response to the movable contact member being pushed by an operator, and a pushing member is disposed above the movable contact member, and the pushing member is configured to push the movable contact portion directly or through other portions upon being pushed by the operator. The pushing member pushes a portion being situated outside of a central portion of the movable contact member directly or through other portions. | 2021-10-28 |
20210335559 | PUSH SWITCH - A push switch contains a circuit substrate, two fixed contacts disposed on the circuit substrate, a dome-shaped spring which is disposed above the two fixed contacts and can be displaced between a first position in which the two fixed contacts are in a non-conductive state and a second position in which the two fixed contacts are in a conductive state and a conductive elastic member disposed on a surface of the dome-shaped spring facing the circuit substrate and having a surface facing the two fixed contacts. At least the surface of the conductive elastic member facing the two fixed contacts has conductivity. When the dome-shaped spring is displaced to the second position, the two fixed contacts are in the conductive state through the conductive elastic member. | 2021-10-28 |
20210335560 | INTERKEY SUPPORT FOR KEYBOARDS - Keyboards and other input devices are provided with at least one flexible layer that extends over or under the keycaps. The flexible layer spans interkey spaces and provides finger support and key definition as the user feels the top surface of the keycaps and flexible layer. The flexible layer therefore smooths the top surface of the keyboard, supports fingers during key travel, prevents ingress of contaminants, fluids, or debris into the keyboard, and provides a surface that can be used as a touch interface that coincides with the keyboard. | 2021-10-28 |
20210335561 | LIGHTING CONTROL CONSOLE HAVING A ROTARY CONTROL - The invention concerns a lighting control console ( | 2021-10-28 |
20210335562 | HIGH POWER, SINGLE-USE ELECTRICAL SWITCH - A high power, single-use electrical switch includes a spring-biased plunger contact that mates with a corresponding socket contact, a spacer that provides a separation clearance between the contacts prior to activation of the switch, and a shear tab that supports the spacer and is removed from the switch to enable engagement between the contacts and activation of the switch. Using the shear tab for activation of the switch enables a compact and small form factor assembly that is suitable for use in smaller electronic assemblies. | 2021-10-28 |
20210335563 | TWO WIRE PRESSURE INDICATING SWITCH WITH ALL ELECTRONIC ARCHITECTURE WITH MILLIVOLT OPERATING SUPPLY - Systems, devices, and methods for a two wire detection circuit powered system comprising: an electronic switch circuit configured to sense a pressure level above or below a predetermined value and indicate an open or closed switch condition, wherein the electronic switch circuit provides a contact resistance voltage of about 20 mV in the closed switch condition; and an energy harvester configured to convert 20 mV when the electronic switch circuit is in the closed switch condition to an operating voltage between 3.6 Volts and 5 Volts for the electronic switch circuit to operate without an additional power source. | 2021-10-28 |
20210335564 | LASER REMOTE CONTROL SWITCHING SYSTEM - A laser remote control switching system comprises a laser source and a control circuit. The control circuit comprises a power, an electronic device, a first electrode, a second electrode, and a photosensitive element electrically connected in sequence to form a loop. Each of the two nanofiber actuators comprises a composite structure and a vanadium dioxide layer. The composite structure comprises a carbon nanotube wire and an aluminum oxide layer. The aluminum oxide layer is coated on a surface of the carbon nanotube wire, and the aluminum oxide layer and the carbon nanotube wire are located coaxially with each other. The vanadium dioxide layer is coated on a surface of the composite structure, and the vanadium dioxide layer and the composite structure are located non-coaxially with each other. | 2021-10-28 |
20210335565 | RELAY - A relay includes a first fixed contact, a second fixed contact, a movable contact piece having first and second movable contacts, a contact piece holding unit configured to hold the movable contact piece, and first to fourth magnets. The first magnet and the second magnet are disposed so that same poles thereof face each other. The movable contact piece is disposed between the first magnet and the second magnet in a width direction of the movable contact piece. The third magnet is disposed so as to increase a magnetic flux in a longitudinal direction of the movable contact piece at a position between the first fixed contact and the first movable contact. The fourth magnet is disposed so as to increase a magnetic flux in the longitudinal direction of the movable contact piece at a position between the second fixed contact and the second movable contact. | 2021-10-28 |
20210335566 | ELECTRONICALLY ADDRESSABLE DISPLAY INCORPORATED INTO A TRANSMISSION MODE SECONDARY ELECTRON IMAGE INTENSIFIER - A night vision system along with an image intensifier tube and method for forming the tube are provided. The night vision system incorporates the image intensifier tube in both an analog channel as well as a digital channel, with an addressable display within the analog image intensifier tube analog channel configured to create an electronically addressable output. An analog image intensifier tube is included in the digital imager for presenting binary digital signals representative of an image, or of symbol indicia, and registering those digital representation from the digital imager onto one or more electron multipliers of the analog image intensifier tube within the analog channel. The provided night vision system also utilizes a cathodoluminescent screen, which is a highly efficient light source that reduces system power. | 2021-10-28 |
20210335567 | ARRANGEMENT OF CONDUCTION-COOLED TRAVELLING WAVE TUBES AND METHOD FOR MANUFACTURING AN ARRANGEMENT - An arrangement of conduction-cooled travelling wave tubes includes multiple travelling wave tubes mounted on a common base, wherein the travelling wave tubes are thermally connected to the base so that during operation of the travelling wave tubes the base forms a heat sink for the travelling wave tubes, and the base is designed to accommodate multiple travelling wave tubes in terms of their dimensions along their beam axes so as to increase the number of travelling wave tubes per surface area unit of the base. | 2021-10-28 |
20210335568 | Pattern Enhancement Using a Gas Cluster Ion Beam - A method of processing a substrate includes loading the substrate on a substrate holder. The substrate includes a major surface and a feature disposed over the major surface. The feature has a first width along an etch direction. The method includes exposing portions of the major surface and changing the first width of the feature to a second width along the etch direction by etching a first portion of the sidewalls of the feature with a gas cluster ion beam oriented along a beam direction. | 2021-10-28 |
20210335569 | SCANNING ELECTRON MICROSCOPE AND A METHOD FOR OVERLAY MONITORING - A scanning electron microscope and a method for evaluating a sample, the method may include (a) illuminating the sample with a primary electron beam, (b) directing secondary electrons emitted from the sample and propagated above a first scintillator, towards an upper portion of the first scintillator, wherein the first scintillator and a second scintillator are positioned between the sample and a column electrode of the column; wherein the first scintillator is positioned above the second scintillator; (c) detecting the secondary electrons by the first scintillator; (d) directing backscattered electrons emitted from the sample towards a lower portion of the second scintillator; and (e) detecting the backscattered electrons by the second scintillator. | 2021-10-28 |
20210335570 | Scanning Transmission Electron Microscope and Adjustment Method of Optical System - A scanning transmission electron microscope that scans a specimen with an electron probe to acquire an image. The scanning transmission electron microscope includes: an optical system which includes a condenser lens and an objective lens; an imaging device which is arranged on a back focal plane or a plane conjugate to the back focal plane of the objective lens and which is capable of photographing a Ronchigram; and a control unit which performs adjustment of the optical system. The control unit is configured or programed to: acquire an image of a change in a Ronchigram that is attributable to a change in a relative positional relationship between the specimen and the electron probe; and determine a center of the Ronchigram based on the image of the change in the Ronchigram. | 2021-10-28 |
20210335571 | ADAPTIVE GEOMETRY FOR OPTIMAL FOCUSED ION BEAM ETCHING - A method of evaluating a region of a sample that includes alternating layers of different material. The method includes milling, with a focused ion beam, a portion of the sample that includes the alternating layers of different material; reducing the milling area; and repeating the milling and reducing steps multiple times during the delayering process until the process is complete. | 2021-10-28 |
20210335572 | MODULAR PARALLEL ELECTRON LITHOGRAPHY - Systems and methods are described herein for electron-beam lithography. In some aspects, a photo electron emitter and channel array assembly (PEECAA) may include a photo-electron emitting cathode having a uniform planar surface and an array of beam channels proximate to the cathode. In some cases, at least one of the cathode or the array of beam channels is removable from the PEECAA. The array of beam channels may include a grid of apertures, a plurality of beam channels, and a shared lens array including a plurality of lenses proximate to an exit of the plurality of beam channels. Individual apertures of the grid of apertures align with individual beam channels to allow electrons from the cathode to pass through the array of beam channels and the shared lens array to form a pixelated pattern, such that, upon exposure to the target, the pixelated pattern is permanently formed on the target. | 2021-10-28 |
20210335573 | Charged-Particle Source - A charged-particle source for generating a charged-particle comprises a sequence of electrodes, including an emitter electrode with an emitter surface, a counter electrode held at an electrostatic voltage with respect to the emitter electrode at a sign opposite to that of the electrically charged particles, and one or more adjustment electrodes surrounding the source space between the emitter electrode and the counter electrode. These electrodes have a basic overall rotational symmetry along a central axis, with the exception of one or more steering electrodes which is an electrode which interrupts the radial axial-symmetry of the electric potential of the source, for instance tilted or shifted to an eccentric position or orientation, configured to force unintended, secondary charged particles away from the emission surface. | 2021-10-28 |
20210335574 | FACEPLATE WITH EDGE FLOW CONTROL - Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a plurality of recesses extending about and radially outward of the plurality of apertures. Each recess of the plurality of recesses may extend from the second surface of the faceplate to a depth less than a thickness of the faceplate. | 2021-10-28 |
20210335575 | CERAMIC STRUCTURE, LOWER ELECTRODE, AND DRY ETCHING MACHINE - Disclosed are a ceramic structure, a lower electrode, and a dry etching machine. The ceramic structure includes at least two ceramic plates, and a clamping slot and a boss are arranged on one side of each ceramic plate close to a neighboring ceramic plate. In two neighboring ceramic plates, a boss of one ceramic plate is clamped into a clamping slot of the other ceramic plate, so that no through gap is generated between the two neighboring ceramic plates in a thickness direction. | 2021-10-28 |
20210335576 | Control Method of Driving Frequency of Pulsed Variable Frequency RF Generator - A frequency tuning impedance matching method includes analyzing a start driving frequency, set by a user, and an RF output signal to vary a driving frequency. Specifically, a next frequency may be predicted using susceptance which is an imaginary part of measured admittance in an n-th pulse. Accordingly, impedance matching may be completed at high speed or an optimal frequency may be reached at high speed. | 2021-10-28 |
20210335577 | SUBSTRATE PROCESSING APPARATUS AND CONTROL METHOD OF SUBSTRATE PROCESSING APPARATUS - A substrate processing apparatus includes a substrate stage on which a substrate is disposed, a first radio-frequency power supply configured to supply first radio-frequency power having a first frequency to the substrate stage, an impedance converter configured to convert an impedance on a load side seen from the first radio-frequency power supply into a set impedance, a second radio-frequency power supply configured to supply second radio-frequency power having a second frequency lower than the first frequency to the substrate stage, and a controller configured to control the set impedance of the impedance converter, and the controller sets the set impedance according to a substrate processing. | 2021-10-28 |
20210335578 | PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD - The disclosed plasma processing apparatus is provided with a chamber, a substrate support, and a power source system. The substrate support has an electrode and configured to support a substrate in the chamber. The power source system is electrically connected to the electrode and configured to apply a bias voltage to the electrode to draw ions from a plasma in the chamber into the substrate on the substrate support. The power source system is configured to output a first pulse to the electrode in a first period and output a second pulse to the electrode in a second period after the first period, as the bias voltage. Each of the first pulse and the second pulse is a pulse of a voltage. A voltage level of the first pulse is different from a voltage level of the second pulse. | 2021-10-28 |
20210335579 | CORRECTION METHOD AND PLASMA PROCESSING APPARATUS - A correction method is provided. In the correction method, a detection of an impedance of a chamber is started, the chamber having therein a substrate support on which a substrate is placed. A supply of a processing gas into the chamber is started. Further, an arrival time at which the processing gas reaches the chamber from a start of the supply of the processing gas to the chamber is calculated based on a change in the detected impedance. | 2021-10-28 |
20210335580 | A method and device for plasma-chemical gas/gas mixture conversion - A method and a device are proposed for plasma-chemical conversion of gas or gas mixture using a pulsed electrical discharge. They allow increasing efficiency of the process for converting gas/gas mixture into desired products by stimulating forward reactions and minimizing reverse reactions. This is achieved by converting the gas/gas mixture using a pulsed electrical discharge in the form of hot plasma channels formed between electrodes in the moving flow of gas/gas mixture, wherein the ratio of the flow velocity to the average discharge current falls within the following range: 250 J/(m | 2021-10-28 |
20210335581 | PRECLEAN CHAMBER UPPER SHIELD WITH SHOWERHEAD - Embodiments of process kits for use in a process chamber are provided herein. In some embodiments, a process kit for use in a process chamber, includes: a top plate having a central recess disposed in an upper surface thereof; a channel extending from an outer portion of the top plate to the central recess; a plurality of holes disposed through the top plate from a bottom surface of the recess to a lower surface of the top plate; a cover plate configured to be coupled to the top plate and to form a seal along a periphery of the central recess such that the covered recess forms a plenum within the top plate; and a tubular body extending down from the lower surface of the top plate and surrounding the plurality of holes, the tubular body further configured to surround a substrate support. | 2021-10-28 |
20210335582 | METHODS AND APPARATUS FOR REDUCING DEFECTS IN PRECLEAN CHAMBERS - Apparatus and methods use a unique process kit to protect a processing volume of a process chamber. The process kit includes a shield with a frame configured to be insertable into a shield and a foil liner composed of a metallic material that is attachable to the frame at specific points. The specific attachment points are spaced apart to produce an amount of flexibility based on a malleability of the metallic material. The amount of flexibility ranges from approximately 2.5 to approximately 4.5. | 2021-10-28 |
20210335583 | STRUCTURE VARIABLE TYPE OF A PLASMA SOURCE COIL AND A METHOD FOR CONTROLLING THE SAME - Provided is a structure variable type of a plasma source coil and a method for controlling the same. The plasma source coil comprises a plurality of coil branches extending in a spiral shape based on a central part, wherein at least one coil branch has a structure in which the extending direction or a tilting level can be adjusted. | 2021-10-28 |
20210335584 | STAGE AND SUBSTRATE PROCESSING APPARATUS - A stage includes: a substrate mounting member having a mounting surface on which a target substrate is mounted; a support member configured to support the substrate mounting member; a refrigerant flow path formed inside the support member along the mounting surface, and including a ceiling surface disposed on the mounting surface side, a bottom surface opposite to the ceiling surface, and an introduction port for introducing a refrigerant formed on the bottom surface; and a heat insulating member including at least a first planar portion covering a portion of the ceiling surface, which faces the introduction port, and a second planar portion covering an inner side surface of a curved portion of the refrigerant flow path. | 2021-10-28 |
20210335585 | CONTINUOUS FLOW SYSTEM AND METHOD FOR COATING SUBSTRATES - A continuous machine ( | 2021-10-28 |
20210335586 | METHODS AND APPARATUS FOR CLEANING A SHOWERHEAD - Methods and apparatus for cleaning a showerhead are provided. For example, the methods includes moving a substrate support including a heater disposed therein from a substrate processing position a first distance away from the showerhead to a cleaning position a second distance away from the showerhead, wherein the second distance is less than the first distance; heating the showerhead using the heater disposed in the substrate support to a predetermined temperature; at least one of supplying at least one cleaning gas to the processing chamber to form a plasma or supplying the plasma from a remote plasma source; and providing a predetermined pressure within an inner volume of the processing chamber and maintaining the plasma within the inner volume of the processing chamber while heating the showerhead to the predetermined temperature. | 2021-10-28 |
20210335587 | GLOBAL SHUTTER FOR TRANSMISSION MODE SECONDARY ELECTRON INTENSIFIER BY A LOW VOLTAGE SIGNAL - A night vision system along with an image intensifier tube and method for shuttering the continued draw of electrons from an electron multiplier are provided. The night vision system includes the electron multiplier, or possibly two electron multipliers, each comprising a silicon membrane. A shutter voltage is applied between a first surface and a substantially parallel, opposed second surface of the silicon membrane to discontinue draw of electrons through the electron multiplier and for substantially discontinuing display of an image from the image intensifier tube under certain bright light conditions. Utilizing a global shutter control on the electron multiplier, and the significantly lower voltage for such control mitigates power consumption within the image intensifier, as well as electromagnetic interference and delay response time. A relatively low voltage negative bias shutter voltage on only the electron multiplier selectively provides global shutter to the image intensifier device. | 2021-10-28 |
20210335588 | PROCESSING OF SPATIALLY RESOLVED, ION-SPECTROMETRIC MEASUREMENT SIGNAL DATA TO DETERMINE MOLECULAR CONTENT SCORES IN TWO-DIMENSIONAL SAMPLES - The invention relates to methods for processing ion-spectrometric measurement signal data which are recorded spatially resolved across a two-dimensional sample, comprising: —providing the measurement signal data which have a plurality of measurement signal histograms, where a histogram contains a measurement signal tuple with intensity dimension (J), mass dimension (m), and collision cross-section dimension (σ), or quantities derived therefrom; —specifying first and second selections of ionic species for the sample, whose presence in histograms is detectable and distinguishable using the collision cross-section dimension or proxy; —determining the spatially resolved content of ionic species from the first and second selections in histograms of the finite areas (A | 2021-10-28 |
20210335589 | INTERACTIVE ANALYSIS OF MASS SPECTROMETRY DATA INCLUDING PEAK SELECTION AND DYNAMIC LABELING - This invention relates to graphical user-interactive displays for use in MS-based analysis of protein impurities, as well as methods and software for generating and using such. One aspect provides a user-interactive display comprising interactive and dynamic selection of one or more masses and concurrent display of peaks (points) corresponding to that predicted mass value across other displays (MS1, deconvolved mass spectrum, etc.). | 2021-10-28 |
20210335590 | ANALYSIS DEVICE - An analysis device includes an electron emission element, a collector, an electric field former, a power source, and a controller. The electron emission element includes a bottom electrode, a surface electrode, and an intermediate layer arranged between the bottom electrode and the surface electrode. The power source and the controller allow application of a voltage between the bottom electrode and the surface electrode. The electric field former forms an electric field in an ion movement region where anions directly or indirectly generated by electrons emitted from the electron emission element move toward the collector. The collector and the controller allow measurement of a current waveform of an electric current made to flow by arrival of anions at the collector. The controller regulates, based on the current waveform, a voltage applied between the bottom electrode and the surface electrode. | 2021-10-28 |
20210335591 | Small-Volume UHV Ion-Trap Package and Method of Forming - Aspects of the present disclosure describe systems, methods, and structures that enable a compact, UHV ion trap system that can operate at temperatures above cryogenic temperatures. Ion trap systems in accordance with the present disclosure are surface treated and sealed while held in a UHV environment, where disparate components are joined via UHV seals, such as weld joints, compressible metal flanges, and UHV-compatible solder joints. As a result, no cryogenic pump is required, thereby enabling an extremely small-volume system. | 2021-10-28 |
20210335592 | MASS SPECTROMETRY VIA FREQUENCY TAGGING - The invention generally relates to mass spectrometry via frequency tagging. | 2021-10-28 |
20210335593 | ULTRAVIOLET IRRADIATION APPARATUS - A ultraviolet irradiation apparatus includes: a first electrode block and a second electrode block located apart from each other in a first direction or located in an electrically-insulated state in the first direction; a recessed groove formed on a side surface of each of both the blocks; a first discharge lamp partially fitted into the recessed grooves formed in both the blocks and located across the both blocks; a power supply part for supplying electrical power to the first discharge lamp; a first current-carrying member electrically connecting the first electrode block and the power supply part; a second current-carrying member capable of electrically connecting the second electrode block and the power supply part at an electrical potential different from that of the first current-carrying member; and a light irradiation window for extracting ultraviolet light emitted from the first discharge lamp to outside. | 2021-10-28 |
20210335594 | METHOD FOR PROCESSING SEMICONDUCTOR STRUCTURE - The present disclosure relates to the field of semiconductor fabrication technology, and in particular to a method for processing a semiconductor structure, including the following steps: providing a semiconductor structure, the semiconductor structure including a substrate and a plurality of etched structures positioned on the surface region of the substrate; forming a transition layer at least covering the inner walls of the etched structures, the transition layer being configured to reduce a capillary force exerted by a fluid on the etched structures and to serve as a sacrificial layer configured to repair a collapsed structure; drying the semiconductor structure; and removing the transition layer. According to the method provided by the present disclosure, the probability of the collapse or deformation of the etched structures during a cleaning process is reduced, the performance of the semiconductor structure is improved, and the productivity and the yield of the semiconductor devices are increased. | 2021-10-28 |
20210335595 | METHOD AND APPARATUS FOR FILLING A GAP - There is provided a method of filling one or more gaps by providing the substrate in a reaction chamber and introducing a first reactant to the substrate with a first dose, thereby forming no more than about one monolayer by the first reactant on a first area; introducing a second reactant to the substrate with a second dose, thereby forming no more than about one monolayer by the second reactant on a second area of the surface, wherein the first and the second areas overlap in an overlap area where the first and second reactants react and leave an initially unreacted area where the first and the second areas do not overlap; and, introducing a third reactant to the substrate with a third dose, the third reactant reacting with the first or second reactant remaining on the initially unreacted area. | 2021-10-28 |
20210335596 | SUBSTRATE TREATING APPARATUS AND LIQUID SUPPLYING METHOD - The inventive concept provides a substrate treating apparatus. In an embodiment, the substrate treating apparatus includes a housing having a treatment space for treating a substrate in an interior thereof, a support unit that supports the substrate in the treatment space, a nozzle that supplies a liquid to the substrate positioned on the support unit, a liquid supply unit that supplies the liquid to the nozzle, and a controller that controls the liquid unit, the liquid supply unit includes a tank having an interior space for storing the liquid, and a first circulation line that circulates the liquid stored in the interior space and in which a first heater is installed, and the controller controls the first heater such that the first heater heats the liquid to a first temperature, at which particles in the interior of the liquid are not eluted. | 2021-10-28 |
20210335597 | PARTICLE REMOVAL METHOD - A particle removal method for removing particles on the backside of a reticle is provided. The method includes disposing the reticle on a reticle holder. In addition, the method includes moving a baffle defining an enclosed area that encompasses a particle to be removed on a backside of the reticle. The method further includes spraying, by a solution spraying module of a particle removal device, a solution onto the particle. The method further includes sucking, by a sucking module of the particle removal device, the solution on the reticle with the particle. The method further includes emitting, by the particle removal device, a gas onto the backside of the reticle for drying the backside. | 2021-10-28 |
20210335598 | PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS - A processing method of a substrate includes placing the substrate having a mask film; forming a deposit on the mask film by plasma of a processing gas which includes a first gas and a second gas and in which a flow rate ratio R | 2021-10-28 |
20210335599 | EUV PHOTOMASK AND RELATED METHODS - A method of fabricating a semiconductor device includes providing a first substrate and forming a resist layer over the first substrate. In some embodiments, the method further includes performing an exposure process to the resist layer. The exposure process includes exposing the resist layer to a radiation source through an intervening mask. In some examples, the intervening mask includes a second substrate, a multi-layer structure formed over the second substrate, a capping layer formed over the multi-layer structure, and an absorber layer disposed over the capping layer. In some embodiments, the absorber layer includes a first main pattern area and an opening area spaced a distance from the first main pattern area. In various examples, the method further includes, after performing the exposure process, developing the exposed resist layer to form a patterned resist layer. | 2021-10-28 |
20210335600 | LIGHT GENERATOR INCLUDING DEBRIS SHIELDING ASSEMBLY, PHOTOLITHOGRAPHIC APPARATUS INCLUDING THE LIGHT GENERATOR - A method of manufacturing an integrated circuit (IC) device includes forming a photoresist layer on a substrate, and exposing the photoresist layer to light by using a photolithographic apparatus including a light generator. The light generator includes a chamber having a plasma generation space, an optical element in the chamber, and a debris shielding assembly between the optical element and the plasma generation space in the chamber, and the debris shielding assembly includes a protective film facing the optical element and being spaced apart from the optical element with a protective space therebetween, the protective space including an optical path, and a protective frame to support the protective film and to shield the protective space from the plasma generation space. | 2021-10-28 |
20210335601 | METHOD OF FABRICATION AND CONTROL OF NANO-STRUCTURE ARRAY BY ANGLE-RESOLVED EXPOSURE IN PROXIMITY-FIELD NANO PATTERNING - A method for fabricating a nano-structure includes: providing a phase mask having an uneven lattice structure to contact a photoresist film; exposing the photoresist film to a light through the phase mask such that the light is obliquely incident on a surface of the photoresist film; and developing the photoresist film to form a nano-structure. | 2021-10-28 |
20210335602 | PARTICLE PREVENTION IN WAFER EDGE TRIMMING - In some embodiments, the present disclosure relates to method for trimming and cleaning an edge of a wafer. The method includes trimming an outer edge portion of the wafer with a blade along a continuously connected trim path to define a new sidewall of the wafer. The trimming produces contaminant particles on the wafer. Further, the method includes applying deionized water to the new sidewall of the wafer with water nozzles to remove the contaminant particles. The method also includes applying pressurized gas to the wafer at a first top surface area of the wafer with an air jet nozzle. The pressurized gas is directed outward from a center of the wafer to remove remaining contaminant particles. The applying of deionized water and the applying of pressurized gas are performed in a same chamber as the trimming. | 2021-10-28 |
20210335603 | PLASMA BLOCK WITH INTEGRATED COOLING - Exemplary semiconductor processing systems may include a remote plasma source. The remote plasma source may include a first plasma block segment defining an inlet to an internal channel of the first plasma block segment. The first plasma block segment may also define a cooling channel between the internal channel of the first plasma block segment and a first exterior surface of the first plasma block segment. The remote plasma source may include a second plasma block segment defining an outlet from an internal channel of the second plasma block segment. The second plasma block segment may also define a cooling channel between the internal channel of the second plasma block segment and a first exterior surface of the second plasma block segment. The systems may include a semiconductor processing chamber defining an inlet fluidly coupled with the outlet from the remote plasma source. | 2021-10-28 |
20210335604 | METHOD OF FABRICATING DISPLAY SUBSTRATE, DISPLAY SUBSTRATE, AND DISPLAY APPARATUS - A method of fabricating a display substrate is provided. The method includes forming a conductive layer on a base substrate; and performing a chemical vapor deposition process to form an oxide layer on a side of an exposed surface of the conductive layer away from the base substrate, the exposed surface of the conductive layer including copper, the oxide layer formed to include an oxide of a target element M. The chemical vapor deposition process is performed using a mixture of a first reaction gas including oxygen and a second reaction gas including the target element M, at a reaction temperature in a range of 200 Celsius degrees to 280 Celsius degrees. A mole ratio of oxygen element to the target element M in the mixture of the first reaction gas and the second reaction gas is in a range of 40:1 to 60:1. | 2021-10-28 |
20210335605 | SIC MOSFET AND METHOD FOR MANUFACTURING THE SAME - A method of making a silicon carbide MOSFET device can include: providing a substrate with a first doping type; forming a patterned first barrier layer on a first surface of the substrate; forming a source region with a first doping type in the substrate; forming a base region with a second doping type and a contact region with a second doping type in the substrate, and forming a gate structure. The first barrier layer can include a first portion and a second portion, the first portion can include a semiconductor layer and a removable layer different from the semiconductor layer, and the second portion can only include the removable layer. | 2021-10-28 |
20210335606 | CONTINUOUS PLASMA FOR FILM DEPOSITION AND SURFACE TREATMENT - Disclosed are apparatuses and methods for flowing a reactant process gas into a processing chamber containing a substrate, generating a plasma at a first power level in the processing chamber during the flowing of the reactant process gas, thereby depositing a layer of a material on the substrate by plasma-enhanced chemical vapor deposition, maintaining the plasma while ceasing flowing the reactant process gas into the processing chamber, thereby stopping the depositing, without extinguishing the plasma, adjusting the plasma to a second power level, flowing an inert process gas into the processing chamber, thereby modifying the layer of the material while the plasma is at the second power level, and extinguishing the plasma after the modifying. | 2021-10-28 |
20210335607 | METHOD FOR MANUFACTURING A SILICON CARBIDE DEVICE - A method of forming a semiconductor structure, the method comprises:
| 2021-10-28 |
20210335608 | GALLIUM OXIDE-BASED SEMICONDUCTOR AND PRODUCTION METHOD THEREOF - To provide a gallium oxide-based semiconductor with its bandgap being sufficiently reduced, and a manufacturing method thereof. | 2021-10-28 |
20210335609 | CRYSTALLINE FILM AND METHOD FOR MANUFACTURING THE SAME - A high-quality crystalline film having less impurity of Si and the like and useful in semiconductor devices is provided. A crystalline film containing a crystalline metallic oxide including gallium as a main component, wherein the crystalline film includes a Si in a content of 2×10 | 2021-10-28 |
20210335610 | METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - A method for producing a semiconductor device includes forming, on a substrate, a film to be processed. The method further includes forming, on the film to be processed, a first film containing a metallic element and a second film containing at least one of carbon or boron. The method further includes forming an insulating film on the first and second films. The method further includes processing the film to be processed using the first film, the second film, and the insulating film, as a mask. | 2021-10-28 |
20210335611 | PATTERNING METHOD - A method that provides patterning of an underlying layer to form a first set of trenches and a second set of trenches in the underlying layer is based on a combination of two litho-etch (LE) patterning processes supplemented with a spacer-assisted (SA) technique. The method uses a layer stack comprising three memorization layers: an upper memorization layer allowing first memorizing upper trenches, and then one or more upper blocks; an intermediate memorization layer allowing first memorizing intermediate trenches and one or more first intermediate blocks, and then second intermediate blocks and intermediate lines; and a lower memorization layer allowing first memorizing first lower trenches and one or more first lower blocks, and then second lower trenches and one or more second lower blocks. | 2021-10-28 |
20210335612 | METHODS OF FORMING STRUCTURES INCLUDING VANADIUM BORIDE AND VANADIUM PHOSPHIDE LAYERS - Methods and systems for depositing a layer, comprising one or more of vanadium boride and vanadium phosphide, onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process. The deposition process can include providing a vanadium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. Exemplary structures can include field effect transistor structures, such as gate all around structures. The layer comprising one or more of vanadium boride and vanadium phosphide can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like. | 2021-10-28 |
20210335613 | FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME - A method includes forming a gate trench over a semiconductor fin. The gate trench includes an upper portion surrounded by first gate spacers and a lower portion surrounded by second gate spacers and the first gate spacers. The method includes forming a metal gate in the lower portion of the gate trench. The metal gate is disposed over a first portion of a gate dielectric layer. The method includes depositing a metal material in the gate trench to form a gate electrode overlaying the metal gate in the lower portion of the gate trench, while keeping sidewalls of the first gate spacers and upper surfaces of the second gate spacer overlaid by a second portion of the gate dielectric layer. The method includes removing the second portion of the gate dielectric layer, while remaining the gate electrode substantially intact. | 2021-10-28 |
20210335614 | SEMICONDUCTOR DEVICE WITH AIR GAP IN PATTERN-DENSE REGION AND METHOD FOR FORMING THE SAME - The present disclosure provides a semiconductor device with an air gap for reducing capacitive coupling in a pattern-dense region and a method for preparing the semiconductor device. The semiconductor device includes a first metal plug and a second metal plug disposed over a pattern-dense region of a semiconductor substrate. The semiconductor device also includes a third metal plug and a fourth metal plug disposed over a pattern-loose region of the semiconductor substrate. The semiconductor device further includes a dielectric layer disposed over the pattern-dense region and the pattern-loose region of the semiconductor substrate. A first portion of the dielectric layer between the first metal plug and the second metal plug is separated from the semiconductor substrate by an air gap, and a second portion of the dielectric layer between the third metal plug and the fourth metal plug is in direct contact with the semiconductor substrate. | 2021-10-28 |
20210335615 | METHODS AND SYSTEMS FOR DEPOSITING A LAYER COMPRISING VANADIUM, NITROGEN, AND A FURTHER ELEMENT - Disclosed are methods and systems for depositing layers comprising vanadium, nitrogen, and element selected from the list consisting of molybdenum, tantalum, niobium, aluminum, and silicon. The layers are deposited onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors. | 2021-10-28 |
20210335616 | CONTACT STRUCTURE - A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures. | 2021-10-28 |
20210335617 | ATOMIC LAYER DEPOSITION ON 3D NAND STRUCTURES - Methods and apparatuses are described that provide tungsten deposition with low roughness. In some embodiments, the methods involve co-flowing nitrogen with hydrogen during an atomic layer deposition process of depositing tungsten that uses hydrogen as a reducing agent. In some embodiments, the methods involve depositing a cap layer, such as tungsten oxide or amorphous tungsten layer, on a sidewall surface of a 3D NAND structure. The disclosed embodiments have a wide variety of applications including depositing tungsten into 3D NAND structures. | 2021-10-28 |
20210335618 | Dielectric Structure to Prevent Hard Mask Erosion - A novel dielectric cap structure for VTFET device fabrication is provided. In one aspect, a method of forming a VTFET device includes: patterning fins in a substrate using fin hardmasks, including a first fin(s) and a second fin(s); depositing a liner over the fins and the fin hardmasks; selectively forming first hardmask caps on top of the fin hardmasks/liner over the first fin(s); forming first bottom source and drain at a base of the first fin(s) while the fin hardmasks/liner over the first fin(s) are preserved by the first hardmask caps; selectively forming second hardmask caps on top of the fin hardmasks/liner over the second fin(s); and forming second bottom source and drains at a base of the second fin(s) while the fin hardmasks/liner over the second fin(s) are preserved by the second hardmask caps. A device structure is also provided. | 2021-10-28 |
20210335619 | ALTERNATING HARDMASKS FOR TIGHT-PITCH LINE FORMATION - A method for forming fins includes forming a three-color hardmask fin pattern on a fin base layer. The three-color hardmask fin pattern includes hardmask fins of three mutually selectively etchable compositions. Some of the fins of the first color are etched away with a selective etch that does not remove fins of a second color or a third color and that leaves at least one fin of the first color behind. The fins of the second color are etched away. Fins are etched into the fin base layer by anisotropically etching around remaining fins of the first color and fins of the third color. | 2021-10-28 |
20210335620 | WET ETCHING METHOD AND WET ETCHING SYSTEM - There is provided a wet etching method including an etchant supply step of supplying an etchant from an etchant supply nozzle to a to-be-etched surface of a workpiece, an etching step of etching the to-be-etched surface with the etchant remaining on the to-be-etched surface, and an etchant removal step of, after performing the etching step, removing the etchant, which still remains on the resulting etched surface, from the etched surface. The etchant supply step, the etching step, and the etchant removal step are repeated a plurality of times in this order. | 2021-10-28 |
20210335621 | SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS - An etching method includes a first etching step, a processing step, and a second etching step. The first etching step is performed to etch a substrate on which a silicon oxide film and a silicon nitride film are formed with an etching liquid. The processing step is performed to process a pattern in the silicon oxide film on the substrate with a pattern shape processing liquid after the first etching step. The second etching step is performed to etch the substrate with the etching liquid after the processing step. | 2021-10-28 |
20210335622 | SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor manufacturing apparatus includes: a stage installed inside a processing chamber and holding a semiconductor substrate having a high-k insulating film including silicate; and a gas supply line including a first system supplying reactive gas to the processing chamber and a second system supplying catalytic gas to the processing chamber, wherein mixed gas which includes complex forming gas reacting with a metal element included in the high-k insulating film to form a first volatile organometallic complex and complex stabilizing material gas increasing stability of the first organometallic complex is supplied as the reactive gas, and catalytic gas using a second organometallic complex, which modifies the high-k insulating film and promotes a formation reaction of the first organometallic complex, as a raw material is supplied. | 2021-10-28 |
20210335623 | METHOD OF ETCHING AND PLASMA PROCESSING APPARATUS - A method includes etching a first region by plasma etching such that an upper surface of the first region is provided at a deeper position within a substrate than a second region; forming a deposit containing carbon on the substrate by forming plasma of a hydrocarbon gas inside a chamber of a plasma processing apparatus; and further etching the first region by plasma etching. In the forming of the plasma of the hydrocarbon gas, magnetic field distribution in which a horizontal component on an edge side of the substrate is larger than a horizontal component on a center of the substrate is formed by an electromagnet. | 2021-10-28 |
20210335624 | METHOD FOR ETCHING AN ETCH LAYER - A method of etching features in a stack comprising a dielectric material on a substrate is provided. In a step (a) an etch plasma is generated from an etch gas, exposing the stack to the etch plasma, and partially etching features in the stack. In a step (b) after step (a) an atomic layer deposition process is provided to deposit a protective film on sidewalls. The atomic layer deposition process comprises a plurality of cycles, wherein each cycle comprises exposing the stack to a first reactant gas comprising WF6, wherein the first reactant gas is adsorbed onto the stack and exposing the stack to a plasma formed from a second reactant gas, wherein the plasma formed from the second reactant gas reacts with the adsorbed first reactant gas to form the protective film over the stack. In a step (c) steps (a)-(b) are repeated at least one time. | 2021-10-28 |
20210335625 | DRY ETCHING APPARATUS AND DRY ETCHING METHOD - According to a dry etching method using plasma, when an organic film is etched, a first step of irradiating an organic film of a sample only with oxygen radicals while Ar ions are shielded, and a second step of irradiating the organic film with ions of a noble gas are alternately repeated, thereby an accurate etching process can be performed while a variation in etching of the organic film is suppressed. This makes it possible to suppress collapse of an LS pattern formed in a silicon substrate or the like. | 2021-10-28 |
20210335626 | SELECTIVELY ETCHING FOR NANOWIRES - A method for selectively etching layers of a first material with respect to layers of a second material in a stack is provided. The layers of the first material are partially etched with respect to the layers of the second material. A deposition layer is selectively deposited on the stack, wherein portions of the deposition layer covering the layers of the second material are thicker than portions covering the layers of the first material, the selective depositing comprising providing a first reactant, purging some of the first reactant, wherein some undeposited first reactant is not purged, and providing a second reactant, wherein the undeposited first reactant combines with the second reactant and selectively deposits on the layers of the second material with respect to the layers of the first material. The layers of the first material are selectively etched with respect to the layers of the second material. | 2021-10-28 |
20210335627 | BACKSIDE INTERCONNECT FOR INTEGRATED CIRCUIT PACKAGE INTERPOSER - Methods are provided for forming an integrated circuit (IC) package interposer configured for back-side attachment. A porous silicon double layer is formed on a bulk silicon wafer, e.g., using a controlled anodization, the porous silicon double layer including two porous silicon layers having different porosities. An interposer is formed over the porous silicon double layer, the interposer including back-side contacts, front-side contacts, and conductive structures (e.g., vias and metal interconnect) extending through the interposer to connect selected back-side contacts with selected front-side contacts. The structure is then split at the interface between the first and second porous silicon layers of the silicon double layer, and the interposer including the second porous silicon layers is inverted and etched to remove the second silicon layer and expose the back-side contacts, such that the exposed back-side contacts can be used for back-side attachment of the interposer to a package substrate or other structure. | 2021-10-28 |
20210335628 | FLIP-CHIP PACKAGE WITH REDUCED UNDERFILL AREA - A flip-chip package and a method for assembling a flip-chip package includes positioning the die on a substrate and introducing an underfill material into a space between the die and the substrate, where a portion of the underfill material extends beyond an edge of the die and forms a fillet that at least partially surrounds the die. The underfill material is cured, and a portion of the fillet is removed to reduce the area of the fillet. | 2021-10-28 |
20210335629 | SYSTEM FOR THINNING SUBSTRATE - A system for thinning a substrate includes a chuck and a first liquid supply unit. The chuck includes a base portion and a frame portion disposed on the base portion, where the substrate is configured to be placed on a carrying surface of the chuck. The first liquid supply unit extends along sidewalls the frame portion and the base portion, an outlet of the first liquid supply unit is disposed next to the carrying surface of the chuck, the first liquid supply unit delivers a first liquid from a bottom of the chuck to the outlet, and the first liquid discharges from the outlet to cover a sidewall of the substrate. | 2021-10-28 |
20210335630 | DYNAMIC ROUTING METHOD AND APPARATUS FOR OVERHEAD HOIST TRANSPORT SYSTEM - A dynamic routing method and apparatus for an Overhead Hoist Transport (OHT) system are disclosed. The present disclosure in some embodiments provides a dynamic routing method for an OHT system, including generating a Q table of records of at least one Q value which is a time for a vehicle to move through an edge between two adjacent nodes to a node other than the two adjacent nodes, measuring a transit time of the vehicle when assigned a destination node and passing a transit edge between a current node and next node, extracting target edges to be updated according to the transit time from a plurality of edges, and differentially updating Q values for the target edges according to distances to the transit edge partially based on the transit time, the Q values for the target edges being time values for the vehicle to move through the target edges to the destination node. | 2021-10-28 |