Top Inventors for class "Electrical computers: arithmetic processing and calculating" |
Rank | Inventor's name | Country | City/State | Last publication | # of patent apps in this class |
1 | David Raymond Lutz | US | Austin, TX | Jun 07, 2018 / 20180157464 - APPARATUS AND METHOD FOR PERFORMING ARITHMETIC OPERATIONS TO ACCUMULATE FLOATING-POINT NUMBERS | 23 |
2 | Eric M. Schwarz | US | Gardiner, NY | Aug 20, 2020 / 20200267001 - COMPUTE DIGITAL SIGNATURE AUTHENTICATION SIGN INSTRUCTION | 22 |
3 | Phil C. Yeh | US | Poughkeepsie, NY | Jul 13, 2017 / 20170199724 - Round For Reround Mode In A Decimal Floating Point Instruction | 18 |
4 | Neil Burgess | US | Austin, TX | May 26, 2016 / 20160147503 - DATA PROCESSING APPARATUS HAVING COMBINED DIVIDE-SQUARE ROOT CIRCUITRY | 17 |
5 | Steven R. Carlough | US | Poughkeepsie, NY | Apr 16, 2020 / 20200119843 - USE OF A CYCLIC REDUNDANCY CODE MULTIPLE-INPUT SHIFT REGISTER TO PROVIDE EARLY WARNING AND FAIL DETECTION | 14 |
6 | Shawn D. Lundvall | US | Midlothian, VA | Jun 26, 2014 / 20140181481 - DETECTION OF POTENTIAL NEED TO USE A LARGER DATA FORMAT IN PERFORMING FLOATING POINT OPERATIONS | 13 |
7 | Silvia M. Mueller | DE | Altdorf | Aug 20, 2020 / 20200264890 - DIGIT VALIDATION CHECK CONTROL IN INSTRUCTION EXECUTION | 12 |
8 | Ronald M. Smith | US | Wappingers Falls, NY | Mar 10, 2016 / 20160070538 - Round For Reround Mode In A Decimal Floating Point Instruction | 12 |
9 | Silvia Melitta Mueller | DE | Altdorf | Sep 01, 2022 / 20220276867 - VECTOR CONVERT HEXADECIMAL FLOATING POINT TO SCALED DECIMAL INSTRUCTION | 12 |
10 | Sun-Soo Shin | KR | Seoul | Feb 04, 2016 / 20160034255 - Arithmetic Devices, Montgomery Parameter Calculation Method and Modular Multiplication Method Thereof | 11 |
11 | Benny Eitan | IL | Haifa | Jul 13, 2017 / 20170199726 - MULTIPLY ADD FUNCTIONAL UNIT CAPABLE OF EXECUTING SCALE, ROUND, GETEXP, ROUND, GETMANT, REDUCE, RANGE AND CLASS INSTRUCTIONS | 10 |
12 | Martin Langhammer | GB | Alderbury | Sep 15, 2022 / 20220292366 - METHODS AND APPARATUS TO PERFORM LOW OVERHEAD SPARSITY ACCELERATION LOGIC FOR MULTI-PRECISION DATAFLOW IN DEEP NEURAL NETWORK ACCELERATORS | 10 |
13 | Kenichi Kitamura | JP | Kawasaki | Feb 27, 2014 / 20140059106 - ARITHMETIC CIRCUIT FOR PERFORMING DIVISION BASED ON RESTORING DIVISION | 9 |
14 | Joseph Williams | US | Holmdel, NJ | Dec 31, 2020 / 20200409903 - APPARATUSES, METHODS, AND SYSTEMS FOR VECTOR PROCESSOR ARCHITECTURE HAVING AN ARRAY OF IDENTICAL CIRCUIT BLOCKS | 9 |
15 | Eberhard Boehl | DE | Reutlingen | Jul 16, 2015 / 20150199174 - Method for Checking an Output | 9 |
16 | Shaohua Yang | US | San Jose, CA | Jan 26, 2017 / 20170024274 - Systems and Methods for Correlation Based Data Alignment | 8 |
17 | Maarten J. Boersma | DE | Holzgerlingen | Sep 17, 2020 / 20200293328 - METHOD TO DETERMINE THE OLDEST INSTRUCTION IN AN INSTRUCTION QUEUE OF A PROCESSOR WITH MULTIPLE INSTRUCTION THREADS | 8 |
18 | Albert W. Wegener | US | Aptos Hills, CA | Dec 04, 2014 / 20140355683 - Data Encoding for Attenuating Image Encoders | 8 |
19 | Samer Hijazi | US | Bethlehem, PA | Mar 28, 2013 / 20130080855 - METHODS AND APPARATUS FOR SEARCH SPHERE LINEAR BLOCK DECODING | 8 |
20 | Jochen Preiss | DE | Boeblingen | Jul 18, 2013 / 20130181743 - Binary Logic Unit and Method to Operate a Binary Logic Unit | 8 |
21 | Kameran Azadet | US | Morganville, NJ | Mar 28, 2013 / 20130080855 - METHODS AND APPARATUS FOR SEARCH SPHERE LINEAR BLOCK DECODING | 8 |
22 | Simon Rubanovich | IL | Haifa | Jun 30, 2022 / 20220206805 - INSTRUCTIONS TO CONVERT FROM FP16 TO BF8 | 8 |
23 | Kyoung-Moon Ahn | KR | Seoul | Feb 16, 2017 / 20170046537 - ELECTRONIC DEVICE AGAINST SIDE CHANNEL ATTACKS | 8 |
24 | Wajdi K. Feghali | US | Boston, MA | Nov 25, 2021 / 20210365264 - ADDITION INSTRUCTIONS WITH INDEPENDENT CARRY CHAINS | 8 |
25 | Jian-Guo Chen | US | Basking Ridge, NJ | Dec 31, 2020 / 20200409701 - APPARATUSES, METHODS, AND SYSTEMS FOR A USER DEFINED FORMATTING INSTRUCTION TO CONFIGURE MULTICAST BENES NETWORK CIRCUITRY | 7 |
26 | Jeffrey S. Brooks | US | Austin, TX | Feb 16, 2017 / 20170046128 - PROCESSING FIXED AND VARIABLE LENGTH NUMBERS | 7 |
27 | Tomoko Yonemura | JP | Kanagawa | Sep 19, 2013 / 20130246489 - COMPUTING DEVICE | 7 |
28 | Ji-Su Kang | KR | Seoul | Oct 21, 2021 / 20210328010 - SEMICONDUCTOR DEVICE | 7 |
29 | Nathan T. Hayes | US | Minneapolis, MN | Sep 12, 2019 / 20190278826 - APPARATUS FOR PERFORMING MODAL INTERVAL CALCULATIONS BASED ON DECORATION CONFIGURATION | 7 |
30 | Thomas Elmer | US | Austin, TX | Sep 17, 2020 / 20200293284 - ACCELERATED QUANTIZED MULTIPLY-AND-ADD OPERATIONS | 7 |
31 | Vinodh Gopal | US | Westboro, MA | Apr 10, 2014 / 20140101460 - ARCHITECTURE AND INSTRUCTION SET FOR IMPLEMENTING ADVANCED ENCRYPTION STANDARD (AES) | 7 |
32 | Timothy D. Anderson | US | Dallas, TX | Jun 26, 2014 / 20140181165 - Three-Term Predictive Adder and/or Subtracter | 7 |
33 | Hirofumi Muratani | JP | Kanagawa | Sep 19, 2013 / 20130246489 - COMPUTING DEVICE | 7 |
34 | Christopher H. Olson | US | Austin, TX | Feb 16, 2017 / 20170046128 - PROCESSING FIXED AND VARIABLE LENGTH NUMBERS | 7 |
35 | Michael T. Everest | US | Sunnyvale, CA | Sep 25, 2014 / 20140289298 - MODULO PARTIAL MAPPING OF FRACTAL POTENTIAL AND FIELD LINES | 7 |
36 | Ronald M. Smith, Sr. | US | Wappingers Falls, NY | Jul 13, 2017 / 20170199724 - Round For Reround Mode In A Decimal Floating Point Instruction | 6 |
37 | Gilbert Wolrich | US | Framingham, MA | Jun 30, 2016 / 20160191238 - SMS4 ACCELERATION HARDWARE | 6 |
38 | Amit Gradstein | IL | Binyamina | Jun 30, 2022 / 20220207107 - APPARATUS AND METHOD FOR COMPLEX MATRIX MULTIPLICATION | 6 |
39 | Shay Gueron | IL | Haifa | Jan 06, 2022 / 20220006612 - SM3 HASH ALGORITHM ACCELERATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS | 6 |
40 | Andreas Menkhoff | DE | Oberhaching | Sep 15, 2022 / 20220291338 - Electronic Devices with Background-Cancelled Ultra Short Range Object Detection | 6 |
41 | Leonard Rarick | US | San Diego, CA | Jun 30, 2016 / 20160188295 - UNIFIED MULTIPLY UNIT | 6 |
42 | Tarek Eldeeb | EG | Cairo | Apr 10, 2014 / 20140101215 - DPD/BCD TO BID CONVERTERS | 6 |
43 | Christopher Neal Hinds | US | Austin, TX | Jan 14, 2021 / 20210011638 - NON-VOLATILE STORAGE CIRCUITRY ACCESSIBLE AS PRIMARY STORAGE FOR PROCESSING CIRCUITRY | 6 |
44 | Taichi Isogai | JP | Tokyo | Sep 19, 2013 / 20130243191 - ENCRYPTION KEY GENERATING APPARATUS | 6 |
45 | Vinodh Gopal | US | Westborough, MA | Aug 18, 2022 / 20220263770 - APPLICATION-TO-APPLICATION RESOURCE RESERVATION SCHEMES FOR PRECISION NETWORKING | 6 |
46 | Alan J. Michaels | US | West Melbourne, FL | Jan 27, 2011 / 20110019817 - PERMISSION-BASED TDMA CHAOTIC COMMUNICATION SYSTEMS | 6 |
47 | Shinichi Yasuda | JP | Kawasaki-Shi | Aug 30, 2012 / 20120221616 - RANDOM NUMBER GENERATION CIRCUIT | 6 |
48 | Xu Yang | CN | Beijing | Jan 13, 2022 / 20220012082 - HARDWARE ACCELERATION METHOD AND RELATED DEVICE | 6 |
49 | Kerstin Schelm | DE | Stuttgart | Dec 17, 2015 / 20150363170 - CALCULATION OF A NUMBER OF ITERATIONS | 6 |
50 | Atsufumi Shibayama | JP | Tokyo | Sep 01, 2022 / 20220277498 - PROCESSING APPARATUS, SYSTEM, BIOMETRIC AUTHENTICATION SYSTEM, PROCESSING METHOD, AND COMPUTER READABLE MEDIUM | 6 |
51 | John A. Gunnels | US | Yorktown Heights, NY | Nov 15, 2012 / 20120290816 - Optimized Scalar Promotion with Load and Splat SIMD Instructions | 6 |
52 | Kenji Ohkuma | JP | Kanagawa | Aug 22, 2013 / 20130218939 - EXPONENTIATION CALCULATION APPARATUS AND METHOD FOR CALCULATING SQUARE ROOT IN FINITE EXTENSION FIELD | 5 |
53 | Debjit Das Sarma | US | San Jose, CA | Apr 30, 2015 / 20150121050 - BANDWIDTH INCREASE IN BRANCH PREDICTION UNIT AND LEVEL 1 INSTRUCTION CACHE | 5 |
54 | Adam B. Collura | US | Hyde Park, NY | May 29, 2014 / 20140149481 - Decimal Multi-Precision Overflow and Tininess Detection | 5 |
55 | Erdinc Ozturk | US | Worcester, MA | May 05, 2011 / 20110106872 - Method and apparatus for providing an area-efficient large unsigned integer multiplier | 5 |
56 | Yuichi Komano | JP | Kanagawa | Jul 30, 2015 / 20150215119 - INFORMATION PROCESSING APPARATUS AND PROGRAM PRODUCT | 5 |
57 | Michael K. Kroener | DE | Ehningen | Jun 12, 2014 / 20140164463 - EXPONENT FLOW CHECKING | 5 |
58 | Larry M. Mennemeier | US | Boulder Creek, CA | Oct 03, 2013 / 20130262836 - PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA | 5 |
59 | Leo G. Dehner | US | Austin, TX | Feb 25, 2016 / 20160054995 - SINGLE-INSTRUCTION MULTIPLE DATA PROCESSOR | 5 |
60 | Wen H. Li | US | Poughkeepsie, NY | Sep 24, 2009 / 20090240753 - METHOD, HARDWARE PRODUCT, AND COMPUTER PROGRAM PRODUCT FOR USING A DECIMAL FLOATING POINT UNIT TO EXECUTE FIXED POINT INSTRUCTIONS | 5 |
61 | Matthew Ray Tubbs | US | Rochester, MN | Nov 29, 2012 / 20120303691 - EXECUTION UNIT WITH INLINE PSEUDORANDOM NUMBER GENERATOR | 5 |
62 | Kenichiro Furuta | JP | Tokyo | Sep 19, 2013 / 20130247211 - AUTHORITY CHANGING DEVICE, GENERATING DEVICE, AND COMPUTER PROGRAM PRODUCT | 5 |
63 | Leonard D. Rarick | US | San Jose, CA | Feb 16, 2012 / 20120041997 - FUSED MULTIPLY-ADD ROUNDING AND UNFUSED MULTIPLY-ADD ROUNDING IN A SINGLE MULTIPLY-ADD MODULE | 5 |
64 | David B. Chester | US | Palm Bay, FL | Sep 15, 2022 / 20220295495 - SYSTEMS AND METHODS FOR CONTROLLING COMMUNICATIONS BASED ON MACHINE LEARNED INFORMATION | 5 |
65 | Adam James Muff | US | Rochester, MN | Nov 29, 2012 / 20120303691 - EXECUTION UNIT WITH INLINE PSEUDORANDOM NUMBER GENERATOR | 5 |
66 | Michael K. Gschwind | US | Chappaqua, NY | Apr 16, 2020 / 20200117360 - AUTOMATIC PINNING OF UNITS OF MEMORY | 5 |
67 | International Business Machines Corporation | US | Armonk, NY | Sep 18, 2014 / 20140282563 - DEPLOYING PARALLEL DATA INTEGRATION APPLICATIONS TO DISTRIBUTED COMPUTING ENVIRONMENTS | 5 |
68 | Christophe J. Layer | DE | Boeblingen | Apr 03, 2014 / 20140095568 - Fused Multiply-Adder with Booth-Encoding | 5 |
69 | Son T. Dao | DE | Stuttgart | May 12, 2016 / 20160132390 - USING ERROR CORRECTING CODES FOR PARITY PURPOSES | 5 |
70 | Berndt Gammel | DE | Markt-Schwaben | Dec 31, 2015 / 20150381351 - CRYPTOGRAPHIC PROCESSOR, METHOD FOR IMPLEMENTING A CRYPTOGRAPHIC PROCESSOR AND KEY GENERATION CIRCUIT | 5 |
71 | Yoshikazu Hanatani | JP | Tokyo | Mar 17, 2016 / 20160080340 - COMMUNICATION CONTROL DEVICE | 5 |
72 | Hyeong-Seok Yu | KR | Seoul | Jul 31, 2014 / 20140214913 - ADDER CAPABLE OF SUPPORTING ADDITION AND SUBTRACTION OF UP TO N-BIT DATA AND METHOD OF SUPPORTING ADDITION AND SUBTRACTION OF A PLURALITY OF DATA TYPE USING THE ADDER | 5 |
73 | Carole Dulong | US | Saratoga, CA | Oct 03, 2013 / 20130262836 - PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA | 5 |
74 | Jong-Hoon Shin | KR | Hwaseong-Si | Feb 16, 2017 / 20170046537 - ELECTRONIC DEVICE AGAINST SIDE CHANNEL ATTACKS | 5 |
75 | Deepak K. Singh | US | Apex, NC | Dec 04, 2014 / 20140358979 - GENERATING A FAST 3x MULTIPLAND TERM FOR RADIX-8 BOOTH MULTIPLICATION | 5 |
76 | Meng-Lin Yu | US | Morganville, NJ | Dec 31, 2020 / 20200409701 - APPARATUSES, METHODS, AND SYSTEMS FOR A USER DEFINED FORMATTING INSTRUCTION TO CONFIGURE MULTICAST BENES NETWORK CIRCUITRY | 5 |
77 | Klaus M. Kroener | DE | Ehningen | Dec 17, 2015 / 20150363170 - CALCULATION OF A NUMBER OF ITERATIONS | 5 |
78 | Matthew P. Delaquil | US | Rockwall, TX | Aug 11, 2011 / 20110196907 - RECONFIGURABLE NETWORKED PROCESSING ELEMENTS PARTIAL DIFFERENTIAL EQUATIONS SYSTEM | 5 |
79 | Shriram D. Moharil | US | Allen, TX | Oct 17, 2013 / 20130275485 - Technique for Optimization and Re-Use of Hardware in the Implementation of Instructions Used in Viterbi and Turbo Decoding, Using Carry Save Arithmetic | 5 |
80 | Young-Sik Kim | KR | Hwaseong-Si | Aug 01, 2013 / 20130198253 - METHODS OF CALCULATING NEGATIVE INVERSE OF MODULUS | 5 |
81 | Atsushi Shimbo | JP | Tokyo | Aug 20, 2015 / 20150234752 - MEMORY CHIP | 5 |
82 | Deepak Prasanna | US | Rockwall, TX | Jun 23, 2011 / 20110154012 - Multi-phased computational reconfiguration | 5 |
83 | Andrew T. Tauferner | US | Rochester, MN | May 28, 2015 / 20150149984 - DETERMINING INSTRUCTION EXECUTION HISTORY IN A DEBUGGER | 4 |
84 | Wolfgang Fischer | DE | Gerlingen | Feb 25, 2016 / 20160053698 - MEMS BOLOMETER SENSOR FOR MEASURING TEMPERATURE IN AN EXHAUST PIPE OF AN AUTOMOTIVE VEHICLE | 4 |
85 | Earl E. Swartzlander, Jr. | US | Austin, TX | Mar 13, 2014 / 20140074903 - Dual-Path Fused Floating-Point Add-Subtract | 4 |
86 | Mostafa Elkhouly | EG | Cairo | Jan 12, 2012 / 20120011187 - PARALLEL REDUNDANT DECIMAL FUSED-MULTIPLY-ADD CIRCUIT | 4 |
87 | Reid T. Copeland | CA | Markham | Mar 31, 2016 / 20160092165 - MACHINE INSTRUCTIONS FOR CONVERTING FROM DECIMAL FLOATING POINT FORMAT TO PACKED DECIMAL FORMAT | 4 |
88 | Hongwei Song | US | Longmont, CO | Aug 21, 2014 / 20140233130 - Systems and Methods for Determining Noise Components in a Signal Set | 4 |
89 | Liang-Kai Wang | US | Austin, TX | Dec 30, 2021 / 20210406031 - SIMD Operand Permutation with Selection from among Multiple Registers | 4 |
90 | Seung H. Kang | US | San Diego, CA | Jun 22, 2017 / 20170178741 - OTP CELL WITH REVERSED MTJ CONNECTION | 4 |
91 | Todd A. Inglett | US | Rochester, MN | Aug 07, 2014 / 20140223149 - METHOD OF ENTROPY RANDOMIZATION ON A PARALLEL COMPUTER | 4 |
92 | Thomas E. Tkacik | US | Phoenix, AZ | Mar 26, 2015 / 20150085557 - MEMORY HAVING ONE TIME PROGRAMMABLE (OTP) ELEMENTS AND A METHOD OF PROGRAMMING THE MEMORY | 4 |
93 | Ihor Vasyltsov | KR | Suwon-Si | Jul 28, 2022 / 20220237513 - METHOD AND APPARATUS WITH OPTIMIZATION FOR DEEP LEARNING MODEL | 4 |
94 | Jayakrishnan C. Mundarath | US | Austin, TX | Apr 14, 2016 / 20160105226 - Methods for Opportunistic Multi-User Beamforming in Collaborative MIMO-SDMA | 4 |
95 | Alexei V. Nikitin | US | Lawrence, KS | Jan 28, 2016 / 20160028308 - METHOD AND APPARATUS FOR CONTROL OF SWITCHED-MODE POWER SUPPLIES | 4 |
96 | Geordie Rose | CA | Vancouver | Aug 18, 2022 / 20220258342 - Systems, Devices, and Methods for Training Multi-Purpose Robots | 4 |
97 | Michael Hirsch | IL | Mazkeret Batya | Nov 17, 2016 / 20160335285 - SYSTEMS AND METHODS FOR EFFICIENT DATA SEARCHING, STORAGE AND REDUCTION | 4 |
98 | Matthew Lewis | DE | Reutlingen | Sep 15, 2022 / 20220293383 - CAPACITIVELY OPERABLE MEMS SWITCH | 4 |
99 | Shmuel T. Klein | IL | Rehovot | Nov 17, 2016 / 20160335285 - SYSTEMS AND METHODS FOR EFFICIENT DATA SEARCHING, STORAGE AND REDUCTION | 4 |
100 | Eric B. Olsen | US | Las Vegas, NV | Nov 26, 2015 / 20150339103 - PRODUCT SUMMATION APPARATUS FOR A RESIDUE NUMBER ARITHMETIC LOGIC UNIT | 4 |